JPH0746727B2 - Manufacturing method of semiconductor device - Google Patents

Description

The present invention relates to a method of manufacturing a semiconductor device such as a MOS integrated circuit device (MOSIC), and more particularly to improvement of an impurity ion implantation process.

SUMMARY OF THE INVENTION According to the present invention, a polysilicon layer is formed on the surface of a semiconductor substrate via a thin insulating film, and a silicide forming metal such as titanium is deposited on the polysilicon layer to prevent charging. While performing the ion implantation process while preventing the electrostatic breakdown of the insulating film, the resistance of the polysilicon layer can be reduced by silicidation.

[Prior Art] Conventionally, in manufacturing a MOSIC or the like, in order to form a high-concentration impurity-doped region such as a source or a drain,
A medium current ion implanter with a relatively small ion current has been used. As described above, when the medium current ion implantation apparatus is used, there is a disadvantage that the time required for the ion implantation process becomes long, the throughput is reduced, and the cost is increased.

In recent years, a high current ion implantation apparatus has been developed, and it has become possible to shorten the time required for the ion implantation process. However, when ion implantation is performed using a high-current ion implanter, for example, as shown in FIG. 11, a thin insulating film such as a gate insulating film is electrostatically destroyed, resulting in a significant decrease in yield. It turned out to be. That is, in FIG. 11, a thick field oxide film 12 and a thin silicon oxide film are formed on the surface of a semiconductor substrate 10 made of silicon.
After forming 14, a polysilicon layer 16 is formed so as to overlap these films, and boron ions B ⁺ are selectively implanted into the substrate surface using the field oxide film 12 and the polysilicon layer 16 as a mask. 16 is rapidly charged up. Discharge occurs when the charged-up potential exceeds the withstand voltage of the silicon oxide film 14. At this time, if the amount of charge that has been charged up is large, the insulating property of the silicon oxide film 14 is permanently destroyed by the heat accompanying the discharge. When the medium current ion implanter is used as described above, it is considered that the discharge due to the leak did not lead to the dielectric breakdown for suppressing the potential rise while the charge was being increased.

As a method of coping with the above situation, as shown in FIG. 12, an aluminum film 18 is formed on the entire surface of the substrate including the end face of the substrate.
And the aluminum film 18 is used to hold the wafer
It has been proposed to implant ions via ground via 20. In this case, since the charges of boron ions are discharged to the ground through the aluminum film 18, electrostatic breakdown of the silicon oxide film 14 can be prevented.

As another method, as shown in FIG. 13, it has been proposed to apply an electron shower to the charged upper surface of the substrate to neutralize the charge. In this case, the electron shower needs to be performed before the damage due to charge-up occurs.

[Problems to be Solved by the Invention] The method shown in FIG. 12 requires a step of depositing or removing a metal film dedicated to discharge, and has a drawback that the process becomes complicated.

In addition, the method of FIG. 13 has a drawback that it requires an electron shower facility to be added to the ion implantation apparatus, which is expensive.

[Means for Solving Problems] It is an object of the present invention to prevent electrostatic breakdown of an insulating film and to reduce the resistance of a polysilicon layer.

In the method for manufacturing a semiconductor device according to the present invention, a relatively thin first insulating film and a relatively thick second insulating film are formed on the surface of a semiconductor substrate, and then polysilicon is overlaid on the first insulating film. A layer is formed, and a conductive film for forming a silicide is formed so as to cover the polysilicon layer and the second insulating film. As a material for the conductive film, a metal such as titanium, tantalum, molybdenum, tungsten, platinum, or palladium can be used. Next, after the conductive film and the polysilicon layer are reacted to form a silicide layer on the polysilicon layer, the second insulating film and the polysilicon layer are used as masks on the substrate surface while the semiconductor substrate and the conductive film are grounded. Impurity ions are selectively implanted. This impurity ion implantation process may be performed before forming the silicide layer.
In any case, the unreacted portion (metal portion that has not been silicidized) of the conductive film is finally removed so that the silicide layer remains.

[Operation] According to the manufacturing method of the present invention, the charge of the impurity ions is discharged to the ground through the conductive film during ion implantation.
It is possible to prevent electrostatic breakdown of the first insulating film. Further, since the silicide layer is formed on the polysilicon layer, the resistance of the polysilicon layer can be reduced to about 1/10 of that in the case of the polysilicon layer alone.

[Embodiment] FIGS. 1 to 4 show a method of manufacturing a semiconductor device according to an embodiment of the present invention. Steps (1) to (4) corresponding to respective drawing numbers will be sequentially described.

(1) After a thick field oxide film 22 is formed so as to surround a predetermined portion by selectively oxidizing the surface of an N-type semiconductor substrate 20 made of silicon, the predetermined portion is thermally oxidized to form a thin silicon oxide film. Forming 24. Then, after forming a polysilicon layer 26 for electrodes / wirings by a known method so as to overlap the silicon oxide film 24 and the field oxide film 22, a titanium (Ti) film 28 is deposited on the entire surface of the substrate including the end face of the substrate by a vapor deposition method. It is formed by a sputtering method or the like.

(2) A heat treatment is performed in argon (Ar) or in vacuum to react the polysilicon layer 26 and the titanium film 28 to form the titanium silicide layer 30 on the polysilicon layer 26. At this time, the titanium silicide layer 31 is also formed on the end face of the substrate, but the titanium film 28 on the silicon oxide remains unreacted. The titanium film 28 may be converted into a titanium nitride (TiN) film by mixing nitrogen (N ₂ ) into the heat treatment atmosphere.

(3) The semiconductor substrate 20 is placed on the metal member 32 for holding the wafer, and the upper surface of the substrate is pressed by the metal member 34 for holding the wafer, and a laminated portion of the field oxide film 22 and the titanium film 28,
By using the silicon oxide film 24, the polysilicon layer 26, and the laminated portion of the titanium silicide layer 30 as a mask, boron ions B ⁺ are selectively implanted into the substrate surface. At this time, the titanium film
Since 28 and the semiconductor substrate 20 are grounded via the metal fittings 32 or 34, the charges of boron ions are transferred from the titanium film 28 to the metal fittings 32.
Or it is discharged to ground via 34. Therefore, charge-up on the upper surface of the substrate is prevented, and electrostatic breakdown of the silicon oxide film 24 can be prevented in advance. After the ion implantation process is completed, an annealing process is performed to activate the implanted boron. This annealing process may be performed after removing the unreacted titanium film 28. As a result, the P ⁺ type region 36 is obtained.

(4) After that, the unreacted titanium film 28 is selectively removed by etching. At this time, since the titanium silicide layer 30 remains on the polysilicon layer 26, the electrode / wiring resistance can be reduced to about 1/10 of that of the polysilicon layer alone.

According to the above series of steps, the MOS type transistor, the MOS type
Type memory cells and the like can be manufactured. Since charge-up is prevented in the process of FIG. 3, high throughput and high yield can be achieved by using a high-current ion implanter.

[Other Embodiments] FIGS. 5 to 10 show a method of manufacturing an N-channel MOSIC according to another embodiment of the present invention.

First, in the process of FIG. 5, a thick field oxide film 42 and a thin silicon oxide film 44 for gate insulation are formed on the surface of a P-type semiconductor substrate 40 made of silicon in the same manner as described above, and then a gate electrode is formed. Polysilicon layer 46
And a polysilicon layer 48 for wiring is formed. Then, using the field oxide film 42 and the polysilicon layer 46 as a mask, N-type determining impurities such as phosphorus or arsenic are selectively ion-implanted into the surface of the substrate to form the ion-implanted region 50 for the N-type source and the N-type drain. Ion implantation area 52
To form. When forming these ion-implanted regions 50 and 52, since the ion current is small, the silicon oxide film 44 is hardly electrostatically destroyed.

Next, in the process of FIG. 6, CVD (chemical paper
A silicon oxide film 54 is formed on the entire surface of the substrate by the deposition method. Then, move to the process of FIG.
The silicon oxide film 54 is etched in the thickness direction by the (reactive ion etching) method to form the polysilicon layer 46.
And expose the upper surface of 48. In this etching process,
Side spacers 54a and 54b made of the remaining portion of the silicon oxide film 54 are formed on both sides of the polysilicon layer 46, and similar side spacers 54c and 54d are also formed on both sides of the polysilicon layer 48. Further, the silicon oxide film 44 is formed of the polysilicon layer 46 and the side spacers.
The portions other than the portions covered with 54a and 54b are etched away, and as a result, the ion implantation regions 50 and 52 are exposed. The upper surface of the field oxide film 42 is also thinly etched as shown.

In the step shown in FIG. 8, the titanium film 56 is formed on the entire surface of the substrate by the sputtering method. Then, the process proceeds to FIG. 9 and a heat treatment for silicidation is performed. As a result, a titanium silicide layer is formed on each of the ion implantation regions 50 and 52.
58 and 60 are formed and polysilicon layers 46 and 48
Titanium silicide layers 62 and 64 are formed thereon, respectively.

After that, a high-current ion implantation apparatus is used to perform selective ion implantation of N-type determining impurities. That is, phosphorus ions, for example, are selectively implanted into the surface of the substrate via the titanium silicide layers 58 and 60 at a deeper and higher concentration than in the case of FIG. At this time, since the titanium film 56 and the semiconductor substrate 40 are grounded in the same manner as described above with reference to FIG. 3, charge-up on the upper surface of the substrate is prevented. After that, heat treatment is performed to activate the implanted impurities. As a result, the N-type source region 50A, the N ⁺ -type source region 66, the N-type drain region 52A and the N ⁺ -type drain region 68 are obtained. N
The type drain region 52A is called an LDD (Lightly Doped Drain), and is provided to reduce electric field concentration in the drain junction near the gate and suppress hot carrier injection into the gate insulating film.

In the step shown in FIG. 10, the unreacted titanium film 28 on the silicon oxide is removed by selective etching. As a result,
The titanium silicide layers 58, 60, 62 and 64 remain on the N ⁺ type source region 66, the N ⁺ type drain region 68, the polysilicon layer 46 and the polysilicon layer 48, respectively, and form low resistance layers, respectively.

According to the series of steps described above, a high-speed and highly reliable MOSIC having an LDD structure can be manufactured with high yield.

[Effects of the Invention] As described above, according to the present invention, it is possible to reliably prevent the breakdown of the insulating film due to charge-up during ion implantation and to significantly reduce the resistance of the polysilicon layer. . Moreover, since the conductive film for forming silicide is also used for discharge, there is no need to deposit or remove a metal film for discharge as in the case of FIG.
There is no need to add special equipment like in the case of Fig. 13,
There is also an advantage that it can be implemented easily and inexpensively.

[Brief description of drawings]

1 to 4 are sectional views of a substrate showing a method of manufacturing a semiconductor device according to an embodiment of the present invention, and FIGS. 5 to 10 show a method of manufacturing an N-channel MOSIC according to another embodiment of the present invention. Substrate sectional view, FIG. 11 is a substrate sectional view showing a conventional boron ion implantation process, FIG. 12 is a substrate sectional view showing an aluminum film forming process before conventional ion implantation, and FIG. 13 is a conventional ion implantation process. It is a board sectional view showing the electron shower process after injection. 10,20,40 …… Semiconductor substrate, 12,22,42 …… Field oxide film, 14,24,44,54 …… Silicon oxide film, 16,
26,46,48 …… Polysilicon layer, 28,56 …… Titanium film, 30,
31,58,60,62,64 …… Titanium silicide layer.

Claims (1)

[Claims] 1. A relatively thin first surface on a surface of a semiconductor substrate.
Forming an insulating film and a relatively thick second insulating film, (b) forming a polysilicon layer over the first insulating film, and (c) the polysilicon layer and the second insulating film. A step of forming a conductive film for forming a silicide so as to cover the insulating film of, and (d) a step of reacting the conductive film and the polysilicon layer to form a silicide layer on the polysilicon layer, e) Selectively implanting impurity ions into the surface of the semiconductor substrate with the second insulating film and the polysilicon layer as a mask with the semiconductor substrate and the conductive film being grounded before or after the formation of the silicide layer. And (f) removing the unreacted portion of the conductive film so that the silicide layer remains after the formation of the silicide layer and the implantation of the impurity ions. Law.