JPH0748651B2 - Power supply voltage switching circuit for integrated circuits - Google Patents

Description

The present invention relates to a power supply voltage switching circuit, and more particularly to EPROM, E ² PROM.
The present invention relates to a power supply voltage switching circuit for a semiconductor integrated circuit having a built-in circuit system that operates with two power supply voltages.

<Background of the Invention> Due to the remarkable progress of semiconductor technology, the elements constituting one semiconductor substrate have become finer and the number thereof has increased remarkably, and a circuit system having various functions has been integrated in the same semiconductor substrate. Circuits have been developed and put into practical use in driving and controlling electronic devices. For example, a microcomputer in which an electrically writable / erasable memory (hereinafter referred to as EPROM) is built in the same semiconductor substrate has been developed.

This kind of integrated circuit uses a power supply voltage of Vcc (usually + 5V) for the circuit operation of the microcomputer body and the read operation of the EPROM, and a power supply voltage of the program voltage Vpp (for example, + 12.5V) when writing data to the EPROM. It operates by applying voltage.

On the other hand, in a general semiconductor integrated circuit device, a performance test is carried out at the time of shipping at the stage where the manufacturing process is completed, and the product is classified into good / defective or ranked. Even in the case of the EPROM built-in microcomputer as described above, the test is executed, and therefore the semiconductor chip of the integrated circuit device is provided with a test terminal, and the performance test is carried out by utilizing this test terminal.

<Problems to be solved by the invention> For example, as a test terminal in a microcomputer with built-in EPROM, Vcc of "high" level is applied during test execution, and fixed to GND for microcomputer during other normal use. There must be.

It suffices to carry out the above-mentioned tests prior to shipping, so it is conceivable that the test terminals used during the test may also be used as terminals that are required for normal use. An applied voltage must be applied to the test terminals so that the initial purpose can be achieved when the test terminals are installed in equipment.

The present invention, in the circuit system having the power supply voltage Vcc and the second power supply voltage Vpp, such as the above-mentioned EPROM built-in microcomputer, supplies the power supply voltage Vcc and the second power supply voltage Vcc to the three input voltage levels Vcc, Vpp, and GND. It is an object of the present invention to provide a power supply voltage switching circuit for outputting the power supply voltage Vpp.

<Means for Solving the Problems> In order to achieve the above-mentioned object, the present invention is applied to an integrated circuit incorporating a circuit to which a power supply voltage Vcc and a second power supply voltage Vpp are applied when a predetermined function is operated. The power supply voltage that outputs the second power supply voltage Vpp to the built-in circuit when the specified function is operating, and outputs the power supply voltage Vcc regardless of the level of the input power supply, in response to the power supply levels Vcc, Vpp, and GND of each type. It is configured to include a switching circuit.

<Operation> By inputting the power supply voltage to the built-in circuit via the power supply voltage switching circuit, for example, when the GND level is input to the input terminal, the integrated circuit body is connected to the GND level,
Other power supplies Vcc or Vpp can be input by switching to the circuit system connected via the power supply voltage switching circuit.
For the three levels of p and GND, only two types, such as Vcc and Vpp, can be supplied to the built-in circuit, and circuits that require input of three levels of Vcc, Vpp, and GND, and Vcc and Vpp. It is possible to configure a circuit that needs to input only the same on the same semiconductor chip.

<Embodiment> FIG. 2 shows a circuit block B such as a CPU having a power supply voltage Vcc, a second power supply voltage Vpp and a GND level as input power supplies, and a power supply voltage Vcc and a second power supply voltage Vpp as input power supplies. EP
The integrated circuit A includes a circuit block C such as a ROM. The integrated circuit A further has a power supply switching circuit D inserted between the circuit block C and the input terminal N1.

Here, the input terminal N1 shares a test terminal, for example, and inputs the Vcc level during the test operation, inputs the program voltage Vpp during the EPROM writing, and inputs the GND level in the other states. As described above, the input terminal N1 is designed as a terminal for inputting the program voltage Vpp of EPROM.
The power supply voltage Vcc must be input to the EPROM regardless of the level input. Therefore, circuit block C consisting of EPROM
The power supply voltage switching circuit D is provided on the input side of.

Input terminal N1 has power supply voltage Vcc, second power supply voltage Vpp and GND
Of the input voltage Vcc, Vpp, GN at the input terminal N1 with the input node N4 connected to the input terminal N1.
D level is applied as it is. On the other hand, in the circuit block C, the power supply switching circuit D is inserted, and when the power supply voltage Vcc is input to the input terminal N1, the Vcc level and the second power supply voltage Vpp are input to the input node N3. And Vpp
Although the level is applied as it is, when the GND level is used as the input voltage, the Vcc level is applied to the input node N3 by the action of the switching circuit D regardless of this input level. That is, the GND level is applied to the circuit block B and the Vcc level is applied to the circuit block C with the GND level being input to the input terminal N1.

FIG. 1 is a circuit diagram showing a concrete example of the power supply switching circuit D, which includes a P-channel enhancement type MOS transistor T1 and an N-channel enhancement type MOS transistor T2 connected in series between the power supply voltage Vcc and the GND level. The gates of both transistors T1 and T2 are connected to the input terminal N1. The output node N2 of both the transistors T1 and T2 is connected to the gate of a P-channel enhancement type MOS transistor T3. Above P channel
One end of the source or drain of the MOS transistor T3 is connected to the input terminal N1 and the other end is connected to the power supply voltage Vcc via the P-channel enhancement type MOS transistor T4. The gate of the P-channel MOS transistor T4 is connected to the input terminal N1. Input terminal N1 is node N4
Also, it is guided to the inside of the integrated circuit body and input to the circuit block B. Here, the outputs of the P-channel MOS transistors T3 and T4 are output to the node N3 as an output voltage and input to the circuit block C, and are also applied as a substrate bias to the N well forming both transistors T3 and T4. There is. That is, the substrate bias is given by its own output voltage.

The specific operation of the switching circuit having the above configuration will be described below.

1) When the Vcc level is input to the input terminal N1, the MOS transistor T1 is turned off, T2 is turned on, and the GND level appears at the node N2. This GND level enters the gate of the MOS transistor T3, T3 is turned on, and the node N3 is charged to the input voltage Vcc level through the MOS transistor T3. At this time, the MOS transistor T4 is off because the input voltage Vcc level is applied to its gate. It is obvious that the Vcc level appears at node N4 as it is.

2) When the second power supply voltage Vpp level is input to the input terminal N1, the MOS transistor T1 is turned off, the MOS transistor T2 is turned on, and the GND level appears at the node N2 as in 1) above, which is the MOS transistor T3. Through the gate of which the node N3 is charged to the level of the input voltage Vpp. The Vpp level appears at node N4.

3) When the GND level is input to the input terminal N1, the MOS transistor T1 turns on, the MOS transistor T2 turns off, and the node
Vcc level appears at N2, which is input to the gate of MOS transistor T3 to turn off T3, but the MOS transistor T4 whose gate level is the GND level of the input terminal N1 is turned on and node N3 is charged to Vcc level. To be done. However, the GND level appears at the node N4.

As is clear from the operation description of 1) to 3) above, the node
When the power supply voltage Vcc is input to N1, Vcc is applied to nodes N3 and N4.
Level, when the second power supply voltage Vpp is input, node N3,
When the Vpp level and the GND level are input to N4, the Vcc level appears at the node N3 and the GND level appears at the node N4.

Although the above embodiment has been described with reference to the EPROM built-in microcomputer, the present invention is not limited to the above embodiment and is applied to a circuit which switches different levels to a plurality of circuit systems built in the same integrated circuit. be able to.

<Effects of the Invention> According to the present invention as described above, since only two levels of Vcc and Vpp can be output for three levels of Vcc, Vpp, and GND, one level at the same input point is originally used. It is possible to properly use the two types of level and other level at the same time, and it is possible to effectively utilize the terminals. Further, the power supply switching circuit for that purpose can be configured by an extremely simple circuit, and the function can be improved without imposing a burden on the integrated circuit.

[Brief description of drawings]

FIG. 1 is a power supply switching circuit diagram of an embodiment according to the present invention, and FIG.
The figure is a block diagram of an integrated circuit having a built-in power supply switching circuit. T1, T2, T3: P-channel enhancement type MOS transistor, T4: N-channel enhancement type MOS transistor, Vcc: power supply voltage, Vpp: second power supply voltage

Claims (1)

[Claims] 1. An integrated circuit which selectively outputs the first power supply voltage Vcc or the second power supply voltage Vpp to a selection input of a first power supply voltage Vcc, a second power supply voltage Vpp or a ground voltage GND. A power supply voltage switching circuit, wherein an input terminal to which Vcc, Vpp or GND is selectively input, a CMOS inverter whose input is connected to the input terminal, a first P-channel MOS transistor and a second P channel M
An OS transistor is connected in series, one end of which is connected to the input terminal and the other end of which is connected to Vcc.
A P-channel MOS transistor series connection circuit in which the gate of the P-channel MOS transistor is connected to the output of the CMOS inverter, and the gate of the second P-channel MOS transistor is connected to the input terminal. In the transistor series connection circuit,
Connect the connection point of both P-channel MOS transistors to Vcc above
Alternatively, the power supply voltage switching circuit of the integrated circuit is characterized in that it is an output terminal for selectively outputting Vpp.