JPH0748819B2 - Still video camera - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION In an electronic still camera (still video camera) capable of frame recording using a shutter, the dark current generated in the imaging device is equal in the first field and the second field. The read-out still video signal is recorded so that a good reproduced image can be obtained by controlling the read-out so that

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a still video camera (also referred to as an electronic still camera) capable of frame recording using a shutter.
Regarding

Conventional technology and its problems By using a shutter in a still video camera, it is possible to control the charge storage time in a solid-state electronic imaging device. While the shutter is open, charge is being stored in the image pickup device, so reading from the image pickup device is prohibited. When the shutter is closed, charges are read from the image pickup device at a predetermined timing and the read still video signal is recorded on a recording medium (including a semiconductor memory).

Dark current is constantly generated in the imaging device. on the other hand,
In the interlaced scanning from the imaging device, reading is performed for each field. Therefore, a difference occurs between the dark current level in the first field and the dark current level in the second field. When a signal including such a dark current is recorded on a recording medium, flicker may occur when the signal is reproduced and displayed on a display device such as a CRT, and the image may be unsightly.

This will be described below with reference to FIG. Reading from the solid-state electronic image sensor is performed by the field shift signal FSA for the first field (field A) and the field shift signal FBS for the second field (field B). These field shift signals FSA and FSB are alternately generated in a constant cycle. Field shift enable signal ▲ ▼
Is for controlling permission / prohibition of reading by the field shift signals FSA and FSB from the image pickup device. While the shutter is open (shutter close signal ▲▲ is at H level), this signal ▲ ▼ is H It becomes level and reading is prohibited. In the example shown in FIG. 3, only the reading in the field B is prohibited (the prohibited signal FSB is shown by a broken line b), so that the dark current i _{DARKB of the} field B is
Continues to grow without being swept. Therefore, reading and recording (signal REC is set to H level) performed after the shutter is closed.
In the period of the level), towards the dark current i _DARKB contained in the read signal of the field B than the dark current i _DARKB in the read signal of the field A becomes large.

SUMMARY OF THE INVENTION The present invention, in a still video camera using a shutter and capable of frame recording, does not cause a difference in dark current contained in still video signals of two fields which are sequentially read and which constitute one frame. The purpose is to do so.

A still video camera according to the present invention comprises a solid-state electronic imaging device capable of reading by interlaced scanning, a shutter for controlling the incidence of a subject light image on the solid-state electronic imaging device, and a field shift of first and second fields. Means for alternately generating signals at fixed intervals to control the interlaced scanning readout in the solid-state electronic imaging device, and at least while the shutter is open,
A means for inhibiting reading by the field shift signal is provided, and the inhibiting means is for inhibiting the field shift signal of the first field and the field shift signal of the second field by an equal number (including zero). It is characterized in that it operates.

According to the present invention, the time during which reading from the solid-state electronic image pickup device is prohibited, including the time during which the shutter is open, is set equally in the first field and the second field that form one frame. Even if the dark current increases with time, the magnitudes of the dark currents in these fields become almost equal. The dark current components included in the still video signal read from the image sensor and recorded on the recording medium are substantially equal in the first field and the second field. Therefore, when the recorded still video signal is reproduced and displayed on the display device, flicker or the like due to the difference in dark current hardly occurs and a good reproduced image which is easy to see can be obtained.

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram showing the electrical structure of a still video camera necessary for explaining the present invention.
The figure is a time chart showing the signals in FIG.

The overall operation of the still video camera is controlled by the system controller 10. System controller 10
Consists of CPU, memory and necessary interface circuits.

A video floppy 1 as a magnetic recording medium is provided with a plurality of (for example, 50) tracks (for example, a track pitch of 100 μm) concentrically, and one field or one frame for one or two tracks by image pickup processing. (1 frame) FM-modulated color video signal (including luminance signal, color difference signal, etc.) is magnetically recorded. The 50 tracks arranged concentrically on the magnetic recording surface of the video floppy 1 have No. 1 to N in order from the outer one.
Track numbers are added up to o.50.

A disc for rotating the video floppy 1.
The rotation of the motor 3 is controlled by the servo control circuit 5.
That is, the rotation speed of the disk motor 3 is determined by the frequency generator 4
A detection signal having a frequency proportional to the number of revolutions of the motor 3 detected by the frequency generator 4 is input to the servo control circuit 5. The servo control circuit 5 controls the motor 3 to rotate at a constant speed (for example, 3,600 rpm) at a constant speed based on a reference clock signal having a constant frequency and a frequency detection signal input from the detector 4.
The servo control circuit 5 also starts and stops the motor 3 in response to a command from the system controller 10.

A magnetic head 2 for writing a still video signal of an imaged subject on a predetermined track of a video floppy 1
(Two are provided at intervals so as to be capable of frame recording so as to be located on adjacent tracks to each other.) Are movably supported in the radial direction of the video floppy 1 by the transfer drive control device (not shown). And the transfer is controlled in the same direction. The transfer drive controller includes a step motor and its driver. The system controller 10 gives an instruction about the transfer direction and transfer amount of the magnetic head 2 to the transfer drive controller.

A phase detector 6 that detects a leakage magnetic flux of a chucking permanent magnet and outputs a phase detection signal when the video floppy 1 reaches a predetermined angular position is close to the core of the video floppy 1. The output detection signal of the phase detector 6 is waveform-shaped by the phase pulse generation circuit (waveform shaping circuit) 7 and is output as the phase pulse PG.
10 and timing generation circuit 18. One phase pulse PG will be generated for each revolution of the video floppy 1. Video floppy 1 has a steady speed (3,
When rotating at 600 rpm, the period of the phase pulse PG is 1/60 second, which corresponds to 1 V (double direct scanning period).

The image pickup optical system includes an image pickup lens system for forming a subject image, a diaphragm (none of which is shown), a shutter 11 and the like. The shutter driving device including the shutter motor is used for releasing the front curtain and the rear curtain of the shutter 11 and unwinding them.
Executed by The shutter driving device 16 is controlled by the system control device 10. That is, the system control device 10 provides the shutter drive device 16 with the shutter control signal TS. The control signal TS is output at a predetermined timing described below after the shutter release button (not shown) is pressed, and becomes the H level for the exposure time ts. The shutter drive device 16 unlatches the leading curtain to run the leading curtain at the rising edge of the control signal TS, and unlatches the trailing curtain to run at the trailing edge. The shutter drive device 16 outputs a shutter close signal ▲▲ which is at the H level from the time when the front curtain is unlatched to the time when the trailing curtain finishes traveling, and is supplied to the system controller 10 and an OR gate 23 described later. .

On the focal plane of the image pickup optical system, a solid-state electronic image pickup device 12 for three primary colors, which is composed of a two-dimensional image pickup cell array such as CCD, is arranged. The image pickup device 12 is a device capable of reading the accumulated charges for one frame and two fields by interlaced scanning, for example, an interline transfer type image pickup device. The dark current of the imaging device 12 or the image data accumulated while the shutter 11 is open is
It is read as a serial video signal under the control of the read control circuit 17 using various timing signals generated from the timing generation circuit 18.

The timing generation circuit 18 generates a vertical reference signal VD which is synchronized with the input phase pulse PG and slightly delayed from this phase pulse PG. This reference signal VD is the system controller
Given to 10. The system controller 10 uses this reference signal VD
And various control is performed by using the phase pulse PG as a reference timing.

The timing generation circuit 18 also delays the vertical reference signal VD slightly and has a field shift signal FSA of the first field (field A) and a field shift signal FSA of the second field (field B) having a cycle twice the cycle of the phase pulse PG. field·
Shift signal FSB and field index signal FI
To occur. The field shift signals FSA and FSB are pulse signals which are alternately repeated at the same cycle as the phase pulse PG, and are given to the read control circuit 17 via prohibiting gates 21 and 22 described later. The field index signal FI repeats the inversion between the H level and the L level for each of the field shift signals FSA and FSB, and reads the field A at the L level and reads the field B at the H level. Respectively. This signal FI is given to the read control circuit 17 and the system controller 10. These signals FSA, FSB, FI may be generated by the read control circuit.

Further, the timing generating circuit 18 generates a vertical synchronizing signal Vsync and a horizontal synchronizing signal Hsync for reading image data from the image pickup device 12, and these synchronizing signals are input to the read control circuit 17.

When the image pickup device 12 is an interline type device, the image pickup device 1 is changed by the field shift signal FSA (transfer pulse) given to the read control circuit 17.
The charge accumulated in the light receiving part of the first field in 2 is instantaneously transferred to the vertical transfer CCD adjacent to them, and then 1 V
The vertical transfer CCD to the horizontal transfer CCD and the serial transfer video signal output from the horizontal transfer CCD are synchronized with the horizontal sync signal and the clock pulse (pulse for reading each pixel) over the period. Done. When the field shift signal FSB is applied, the charge accumulated in the light receiving portion of the second field is quickly transferred to the vertical transfer CCD, and then the same reading is performed.

The serial still video signals (R, G, B) read from the image pickup device 12 are input to the recording signal processing circuit 13.
The signal processing circuit 13 inputs the still video signals (R, G,
It is equipped with a preamplifier circuit (B), a variable gain amplifier circuit (white balance adjustment circuit), a process matrix circuit, an FM modulation circuit, and a synthesis circuit. Luminance signal Y and two color difference signals RY, B in the process matrix circuit
-Y is created. These color difference signals R-Y and B-Y are then line-sequentially set every 1H by a line-sequentializing circuit. Luminance signal Y
The line-sequential color-difference signals are FM-modulated in different frequency bands in two FM modulation circuits through a pre-emphasis circuit (not shown), and are combined in a combining circuit.

The combined FM-modulated still video signal is recorded and amplified by the recording amplifier circuit 14
After being amplified by, it is input to the recording gate circuit 15. The recording gate circuit 15 is opened when the recording signal REC output from the system control device 10 at a predetermined timing described later becomes the H level. In the case of frame recording, this recording signal REC is at H level for two consecutive ends of the phase pulse PG. The FM-modulated still video signal of the field A or B in the first cycle is applied to one of the two magnetic heads 2 and the FM-modulated still video signal of the field B or A in the second cycle. By applying the video signal to the other magnetic head, recording is performed for two tracks of the video floppy 1 for each one field per track.

Several ways of controlling the inhibit gates 21, 22 to inhibit the same number (including zero) of the pulses of the field shift signal FSA of field A and the pulses of the field shift signal FSB of field B will now be described. Forbidden gates 21 and 22 are field shift enable signals ▲
Controlled by ▼.

(1) When the signal ▲ ▼ is generated so that the rising edge (leading edge) of the shutter closing signal ▲▲ and the rising edge (leading edge) of the field enable signal ▲ ▼ are the same (see FIG. 2), Signal ▲
Readout after shutter closing from a field different from the field in which electric charge was swept out by the field shift signal immediately before the rising edge of ▲ (which has the same meaning as reading but is used when reading only dark current). The timing of the trailing edge (trailing edge) of the signal () is adjusted so that the signal for recording including the image data is read out). There are two ways to do this.

(1-1) When the shutter is opened (Signal ▲▲
Rise) is fixed in association with field reading. For example, the shutter opening time is controlled so as to be immediately after the sweeping of the field A, and reading for recording after closing the shutter is performed after closing the shutter (signal ▲ ▲
Field B which appears first). This is the example shown in FIG.

(1-2) The shutter open time point is determined independently of field reading, and the field at the shutter open time point is determined (detected). Then, the field different from the determined field is made to coincide with the field to be read first after the shutter is closed.

(2) Fall of shutter close signal ▲▲ (trailing edge) and field shift enable signal ▲
Signal so that the falling edge (rear edge) of ▼ will be at the same time ▲
In addition to creating ▼, the shutter opening time is controlled so that the field read out immediately after the shutter is closed is always one of the fields A and B. And
The number of times (including zero) the signals FSA and FSB are prohibited while the shutter is open (while ▲▲ is at H level) is counted in advance. When the signals are not prohibited the same number of times, reading just before opening the shutter is prohibited. For example, in Figure 3,
Although the field shift signal FSB is prohibited once,
Since the number of times the field shift signal FSA is prohibited is zero, the rising edge of the signal ▲ ▼ is made slightly earlier as shown by the chain line, and the signal FSA indicated by a is prohibited.

The above processing is the input field index signal
FI, shutter closing signal ▲▲, calculated shutter opening time (shutter speed), timing of shutter control signal TS to be output, etc.
10 CPUs field shift enable signal ▲
It can be executed by determining the rising and falling timings of ▼.

It can also be executed by using the following calculation formula.

That is, the shutter open time t _open (signal ▲
▲ is H level time, t _FS is shown as a field shift signal (in FIG. 2, almost instantaneous time,
That is, when the dark current i _DARKA , i _{DARKB fall} time), 1 V is the field cycle (cycle of the phase pulse PG), and n is an odd number satisfying 0 ≦ t _open −nV <(1V−1 _FS ), the signal ▲ The signal ▲ ▼ rises 1V earlier than the ▲ rising edge (when the falling edge of the signal ▲ ▼ coincides with the falling edge of the signal ▲▲), or the signal ▲ ▼ is delayed by 1V after the falling edge of the signal ▲▲. (The signal ▲ ▼ rises when the shutter close signal ▲
If it matches the rising edge of ▲).

The creation of the signal (1) using the above calculation formula will be specifically described according to the method of (1-1).

When there is an input from the shutter release button, the CPU of the system controller 10 calculates the shutter speed (exposure time ts) based on the measurement result of the amount of incident light from the photometric element (not shown). Since the system controller 10 receives the field shift signals FSA and FSB via the OR circuit 24 and the field index signal FI as described above, the CPU sweeps the image sensor 12 in the field A (signal FSA). Immediately after), a shutter control signal TS of H level is output so that the shutter is opened, and this signal TS is kept at H level for a time ts. As a result, the shutter 11 is opened, and the shutter drive device 16 outputs an H level shutter close signal ▲ ▲
Is output and input to the system control unit 10, and O
Field shift enable signal via R circuit 23
It is given to the inhibition gates 21 and 22 as ▼, and the input of the field shift signals FSA and FSB to the read control circuit 17 is inhibited.

The CPU counts how many field shift signals FSA and FSB are prohibited while the H level signal ▲▲ is being input, and measures the shutter open time t _open . Then, when the signal ▲▲ falls, whether n satisfying the above equation is an odd number or an even number (even number includes zero).
To judge. In the example shown in FIG. 2, since n = 1, an H level signal is output to the output port P until the next field shift signal is prohibited. The H level signal of the output port P is given to the prohibition gates 21 and 22 as a signal () via the OR circuit 23. In this way, the field shift pulses FSA and FSB are prohibited one by one as shown by the broken line in FIG.

The CPU outputs the recording signal REC for 2V from the period of the field B which first appears after the shutter is closed. Since the prohibition of the field shift signal has already been lifted, the field shift signal FSB is used first to set the imaging device 1
The image data of field B is read from 2 and recorded in the video floppy 1, and the image data of field A is read and recorded by the field shift signal FSA in the next cycle. Dark current i _DARKA , i _{DARKB of the} imaging device 12 that is read out when the image data is read
Is almost the same level because the field shift signals FSA and FSB are both prohibited once.

[Brief description of drawings]

FIG. 1 shows an embodiment of the present invention and is a block diagram showing an electric configuration of a part of a still video camera, and FIG. 2 is a time chart showing an operation in the electric circuit of FIG. FIG. 3 is a time chart corresponding to FIG. 2 showing the operation of the conventional still video camera. 10 …… System control device, 11 …… Shutter, 12 …… Solid-state electronic imaging device, 16 …… Shutter drive device, 17 …… Readout control circuit, 18 …… Timing generation circuit, 21,22 …… Inhibition gate, 23 , 24 …… OR circuit.

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Yutaka Maeda 2-26-30 Nishiazabu, Minato-ku, Tokyo Fuji Shashin Film Co., Ltd. (72) Hiroshi Shimatani 2-26-30 Nishiazabu, Minato-ku, Tokyo Fuji Shashin Film Co., Ltd. (56) Reference JP-A-60-117974 (JP, A)

Claims (1)

[Claims] 1. A solid-state electronic imaging device capable of reading by interlaced scanning, a shutter for controlling the incidence of a subject light image on the solid-state electronic imaging device, and field shift signals of a first field and a second field at a constant cycle. Means for alternately controlling the interlaced scanning readout in the solid-state electronic imaging device, and means for inhibiting readout by the field shift signal at least while the shutter is open are provided, and the inhibition means comprises: A still video camera, wherein the field shift signal of the field and the field shift signal of the second field operate so as to be prohibited by an equal number.