JPH0750153B2 - Semiconductor inspection apparatus and semiconductor inspection method - Google Patents

Description

TECHNICAL FIELD The present invention relates to a semiconductor inspection device and a semiconductor inspection method used when investigating the cause of a defect in a semiconductor device such as an LSI.

<Prior Art> Conventionally, in investigating the cause of a defect in a semiconductor device such as an LSI, the following method has been adopted. First,
After breaking the electrically defective semiconductor device to expose the semiconductor chip inside, the semiconductor device is electrically inspected using a semiconductor tester, and the inspection result is printed out. If you look at what is printed out, you can see the defective points on the circuit in the semiconductor chip, so refer to the separately prepared design drawing when designing the layout to identify the defective points on the semiconductor chip (hereinafter referred to as defective addresses). figure out. After that, as shown in FIG. 6A, the semiconductor chip 10 'is taken out from the package of the semiconductor device and cut out using a dicing machine or the like to obtain a sample chip piece 20 having a defective address 21 at the center. Then, the back surface of the sample chip piece 20 is polished by using a flat polishing device as shown in FIG. 6 (b),
The sample chip piece 20 is thinned to about 50 μm. In FIG. 6 (b), only the polishing table 26 is shown even in the flat polishing apparatus. If the sample chip piece 20 is made thinner than this, it may be broken. Therefore, a separately prepared charged particle beam processing apparatus is finally used.

This process will be described with reference to FIGS. 6 (c) and (d).
After the polished sample chip piece 20 is attached to a sample support base 27 which is a so-called mesh, this is set in a charged particle beam processing apparatus and operated. Then, the sample chip piece 20 rotates together with the sample support table 27, and at the same time, the charged particle beam passes through the round hole 271 formed in the central portion of the sample support table 27 and is rotated 15 ° to the back surface of the sample chip piece 20. Irradiation is performed at a shallow angle, and the central portion of the back surface of the sample chip piece 20 is thinned into a chevron. Then, place the center of sample chip piece 20 at 500
The thickness is reduced to about Å, and a crystal electron defect or the like at a defective address of the sample chip piece 20 is observed using a separately prepared transmission electron microscope to investigate the cause of the defective semiconductor device.

<Problems to be Solved by the Invention> However, in the case of the above-mentioned conventional example, various drawbacks as described below have been pointed out.

First, even if the semiconductor tester finds a defective portion on the circuit of the semiconductor chip 10 ', the semiconductor chip 10'
The physical position (defective address 21) must be identified by comparing the blueprints, and this work is very troublesome, and even a skilled person has many drawbacks.

Further, even if the defective address 21 of the semiconductor chip 10 'is known, the defective address 21 and the central portion of the sample chip piece 20 which will be observed by the transmission electron microscope due to the cutting method.
It has the drawback that it often does not match the part of. When the repeated pattern is formed on the semiconductor chip 10 ', it becomes a particularly serious problem, and as a result, it becomes a very large obstacle in accurately investigating the cause of the defect of the semiconductor device.

The present invention has been made in view of the above circumstances, and an object thereof is to be able to automatically obtain a defective address of a semiconductor chip, and to prevent the defective address of the semiconductor chip from being mistaken in the subsequent steps. To provide a semiconductor inspection apparatus and a semiconductor inspection method which can be realized.

<Means for Solving the Problem> A semiconductor inspection apparatus according to the first aspect of the present invention is an enlargement of a semiconductor chip based on detection data of secondary electrons obtained by irradiating a semiconductor chip with a charged particle beam. An apparatus for displaying and outputting an image, comprising: a semiconductor tester for measuring electrical characteristics of the semiconductor chip and determining a defective circuit element based on the measurement result; a circuit element forming the semiconductor chip; and an arrangement position thereof. Table data of layout patterns that give a relationship is stored in advance, and a defective portion calculation unit that obtains data of an arrangement position corresponding to a defective circuit element obtained by the semiconductor tester based on the table data is provided. A predetermined distance from the defective circuit element of the semiconductor chip based on the arrangement position data obtained by the defective portion calculation unit The charged particle beam having the energy necessary for marking the position of the defective circuit element is irradiated toward the position.

A semiconductor inspection method according to a second aspect of the present invention is
After marking a semiconductor chip by using the semiconductor inspection apparatus according to claim 1, a defective circuit element on the semiconductor chip is specified for the purpose of the marking by using a transmission electron microscope, and the circuit element Investigate the cause of the defect.

<Operation> The semiconductor chip set in the semiconductor inspection apparatus and the semiconductor tester are electrically connected, and the semiconductor tester electrically measures the semiconductor chip to find a defective circuit element from the semiconductor chip. The data of the defective circuit element is introduced into the defective portion calculating section, and the data of the arrangement position corresponding to the defective circuit element is obtained based on the table data of the layout pattern stored in advance here. Based on this data, the surface of the semiconductor chip is irradiated with a charged particle beam having an energy commensurate with the marking process toward a position separated from the defective circuit element of the semiconductor chip by a predetermined distance. Then, the surface of the semiconductor chip is engraved to indicate the position of the defective circuit element. If necessary, an enlarged image of the semiconductor chip including this marking is displayed and output.

Then, the imprinted semiconductor chip is set in a transmission electron microscope, the defective circuit element on the semiconductor chip is specified with the imprint as a mark, and the cause of the defect of the circuit element is investigated.

<Example> An example of a semiconductor inspection apparatus and a semiconductor inspection method according to the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a semiconductor inspection device, FIG. 2 is a display output diagram of the semiconductor inspection device, and shows an enlarged image of a semiconductor chip having markings. FIG. 3 shows a sample chip piece cut out from the semiconductor chip. FIG. 4 is an explanatory view showing how the sample chip pieces are polished by a polishing machine, and FIG. 5 (a)
Is an explanatory view showing a sample chip piece being thinned by the charged particle beam processing apparatus, and FIG. 5 (b) is a view corresponding to FIG. 5 (a) showing a fracture surface of the sample chip piece together. is there.

First, a schematic configuration of the semiconductor inspection device will be described with reference to FIG.

Reference numeral 16 in the drawing denotes an evacuation device for bringing the inside of the device body into a predetermined vacuum state, and the semiconductor device 10 is connected to the X-
An XY stage 1 is provided which can be moved freely on the Y plane. In the figure, 2 is an XY stage control device. The semiconductor device 10 can be connected to the socket 9 provided on the XY stage 1, and the LSI tester 5 can be connected to the socket 9.
A defective portion on the circuit of the semiconductor device 10 is inspected by (corresponding to a semiconductor tester) (details will be described later).

Although not shown, the semiconductor device 10 has a package whose upper portion is preliminarily fractured to expose the internal semiconductor chip 10 '.

On the other hand, a beam generation unit 11 for generating a charged particle beam 18 emitted toward the XY stage 1 is provided above the apparatus body.
Is provided. Beam generator 11 and XY stage 1
The aperture 12, the scanning coil 3, the aperture 12, the beam lens 14, and the beam astigmatism correction lens 15 are arranged in this order from above. That is, the charged particle beam 18 generated by the beam generation unit 11 is focused and scanned while being given energy by the lens optical system described above, and irradiated onto the semiconductor chip 10 '. The scanning timing of the charged particle beam 18 is controlled by the scanning control device 3'based on a synchronization signal output from the display device 8 described later.

When the semiconductor chip 10 'is irradiated with the charged particle beam 18 having a predetermined energy, secondary electrons are generated from this irradiated portion. The secondary electrons are detected by the secondary electron detector 7 arranged near the XY stage 1. The output signal of the secondary electron detector 7 is successively introduced into the display device 8 via the secondary electron signal amplifier 7 ', and the enlarged image of the semiconductor chip 10' is displayed and output here.

Next, the LSI tester 5 will be described. Data on the electrical characteristics of the semiconductor device 10 is prepared in advance, and a predetermined operation is performed while the semiconductor device 10 is supplied with power to inspect a defective portion on the circuit. If the semiconductor device 10 is, for example, a dynamic memory, after writing predetermined data to all addresses, the written data is sequentially read in the order of addresses, and if the read data is different, the address is read. The circuit element portion corresponding to is determined to be defective. The data output from the LSI tester 5 on the defective portion on the circuit of the semiconductor device 10 is guided to the computer 4 at a predetermined timing.

The computer 4 has a program necessary for controlling the entire apparatus prepared in advance, and a network for data transfer.
A command for operating the LSI tester 5, the display device 8, the XY stage control device 16, the scan control device 3 ', and the like through the 17 is individually given. The computer 4 is equipped with a database 6 such as a floppy disk as a large capacity external memory. The database 6 stores table data of a layout pattern that gives a relationship between the circuit elements that form the semiconductor chip 10 'and their layout positions. Database 6
The individual data stored in is the coordinate data for each circuit element formed in the semiconductor chip 10 ', which is
A plurality of so-called alignment marks provided on the semiconductor chip 10 'are displayed as an X'-Y' coordinate system which is set with a reference point. It should be noted that the software of the computer 4 can include a function as a defective portion calculating unit.

Next, the operation of the semiconductor inspection device configured as described above will be described, and the function of the computer 4 will also be described.

First, the semiconductor device 10 with the semiconductor chip 10 'exposed is connected to the connector 9 and the LSI tester 5 is operated. Then L
Data regarding a defective portion on the circuit of the semiconductor device 10 is loaded from the SI tester 5 into the database 6 via the computer 4. The data captured in the database 6 is
As described above, it relates to a defective circuit element in the semiconductor chip 10 'and is converted by the table data of the database 6 to obtain the coordinate data corresponding to the circuit element (this function of the computer 4 corresponds to a defective portion calculating section). To). This coordinate data serves as data for giving a defective portion of the semiconductor chip 10 ', that is, a defective address 21 (see FIG. 2), and then temporarily stored in a predetermined address of the database 6.

Looking at the degree of integration of the semiconductor device 10, the feeding accuracy of the XY stage 1 needs to be 0.1 μm or less. However, due to the mounting method of the semiconductor device 10 on the XY stage 1, the XY stage is
The positioning accuracy of the semiconductor device 10 with respect to the stage 1 becomes a problem. Therefore, in the semiconductor chip 10 ', the above-mentioned alignment mark is enlarged and displayed, and the XY stage 1 is operated so that the alignment mark and the reference point of the XY coordinate system simultaneously displayed on the display screen coincide with each other. Let Then, regardless of the connection state of the semiconductor device 10 and the connector 9, the XY coordinate system on the XY stage 1 side and the X'-Y 'coordinate system on the semiconductor chip 10' side match.

Then, when the XY stage 1 is operated based on the coordinate data of the defective address 21 stored in the database 6, the defective address 21 portion of the semiconductor chip 10 ′ is included in the display screen of the display device 8. Figure 2 shows a semiconductor chip 10 '
Among them, an enlarged image by the display device 8 in the vicinity of the defective address 21 is shown. In the figure, 22 is a semiconductor chip
A circuit pattern 23 is provided on the 10 'in a grid pattern, and 23 is a reference point on the side of the display device 8 (which coincides with a reference point in marking processing described later).

Then, as shown in the figure, a total of four markings are provided at positions separated from the defective address 21 on the semiconductor chip 10 'by a predetermined distance.
The following processing is performed to perform steps 24a to 24d.

First, the defective address 21 stored in the database 6
The coordinate data of the positions to be marked 24a to 24d are calculated based on the coordinate data of. In this calculation, the defective hoodless 21 and the stamp 24a stored in advance in the database 6 are used.
It is performed by reading out the pattern data which gives the positional relationship with 24d. When this coordinate data is calculated, the beam generator 11, the scanning control device 3 ', etc. are operated based on the coordinate data to scan and irradiate the semiconductor chip 10' with the charged particle beam 18 having a predetermined energy. Then the charged particle beam
A hole is dug by irradiation of 18 and markings 24a to 24d are made at desired positions.

Here, the shapes and the like of the markings 24a to 24d will be described. Carved seal 24
Regarding the sizes of a to 24d and the distance between the a and 24d and the defective address 21, it is considered that the markings 24a to 24d and the defective address 21 are on the screen of the display device 8 and both are clearly understood. It is set. Set the size of stamps 24a-24d to 2-3
If the size is at least μm square, it becomes possible to observe the markings 24a to 24d even with a 40 × microscope. Also, engraved 24
The a to 24d are shaped so that the position of the defective address 21 can be clearly seen, and the entire shape is asymmetric. It should be noted that a plurality of patterns of the markings 24a to 24d are prepared and can be appropriately selected according to the shape of the defective portion.

Further, the depth of the markings 24a to 24d is set to a value required to reach the semiconductor substrate of the semiconductor chip 10 'in consideration of a thinning step described later. However, if the cause of the defect is not the semiconductor substrate but a shallow portion such as an electrode portion, the depths of the markings 24a to 24d need not reach the semiconductor substrate.

As the charged particle beam generated by the beam generation unit 11, a gallium ion beam is used here. This beam diameter is set to less than 500Å in order to obtain a good image when displaying an image. When switching to engraving, the current value can be set higher than in the above case in order to increase the machining speed. In this case, the beam diameter may be about 2000 to 3000 Å by increasing the current value.

When the above-described marking processing is completed, the display device 8 is operated to check whether or not the positional relationship between the markings 24a to 24d and the defective address 21 portion is correct by using an enlarged image thereof.

When this confirmation is completed, the semiconductor device 10 is taken out from the semiconductor inspection device, and then the process for preparing a sample for the transmission electron microscope (not shown) is started.

First, from the package of the semiconductor device 10 to the semiconductor chip 10 '
Then, using a dicing machine (not shown), the semiconductor chip 10 'is cut into small pieces as shown in FIG. The size of the sample chip piece 20 is an appropriate size as a sample for a transmission electron microscope, and here is about 1.5 mm square. At this time, using a physical microscope attached to the dicing machine, the defective address 21 is accurately cut out so that the defective chip 21 is located at the center of the sample chip piece 20. This centering has a great influence on the observation accuracy of the transmission electron microscope, so it must be done carefully.

Next, a sample chip piece 20 cut from the semiconductor chip 10 '
Is taken out from the dicing machine, and a surface forming layer such as an electrode on the sample chip piece 20 is peeled off by using a chemical.
The chemical used for peeling is one that does not affect the semiconductor substrate of the sample chip piece 20. However, if the cause of the defect is in the shallow portion of the electrode portion where the semiconductor substrate cries, the peeling work is performed so that the electrode portion becomes the most surface.

When the peeling work is completed, the peeled sample chip piece 20 is polished to 50 μm or less using a rotary polishing machine, and further mirror-polished. Figure 4 shows a sample chip piece using a polishing machine.
The back side of 20 is shown as being polished.
Other than 26 are not shown. Further, in the case of highly accurate polishing, dented (dimple) mechanical polishing may be performed. In this case, the sample chip piece 20 is ground to 10 μm or less and further mirror-polished so that the center of the recess and the center of the defective address 21 are aligned so that the back surface of the defective address 21 is the thinnest. In the case of this concave polishing, if the depth of the markings 24a to 24d is set to about 10 μm, marking is performed from the back surface of the sample chip piece 20 during the polishing process.
Since 24a to 24d can be seen through, there is an advantage that the machining position can be corrected in the middle even if the center of the dent and the center of the defective address 21 are deviated.

When this polishing is completed, the final sample chip piece 20 is thinned using another charged particle beam processing apparatus. First, the sample chip piece 20 that has been mirror-polished is fixed to the sample support plate 27 (mesh) shown in FIG. 5, and then set in the charged particle beam processing apparatus. When the charged particle beam processing apparatus is operated, the sample chip piece 20 rotates together with the sample support plate 27, and at the same time, the charged particle beam causes the sample chip to pass through the round hole 271 formed in the center of the sample support plate 27. Irradiation is performed toward the center of the back surface side of the piece 20, so that the back surface of the sample chip piece 20 is cut into a mountain shape. In this way, the defective address 21 of the sample chip piece 20
Thin the center part to about 50Å.

In this charged particle beam processing apparatus, a relatively thick argon ion beam is used to increase the processing speed, and the incident angle of the sample chip piece 20 with respect to the back surface is
It is set to about 10 to 15 degrees.

When this thinning processing is completed, the sample chip piece 20 is taken out together with the sample support plate 27 from the charged particle beam processing apparatus,
Set it on a transmission electron microscope (not shown). Then, the transmission microscope is used to display and output an enlarged image of the sample chip piece 20. Marks 24a to 24d are clearly displayed on the screen at this time, and the defective address 21 can be accurately identified by using the marks as marks, and the enlarged image shows the semiconductor device.
Investigate the causes of 10 defects.

In investigating the cause of the defect of the semiconductor device 10 in such a procedure, the use of the semiconductor inspection device has the following advantages.

That is, using the charged particle beam processing device, the sample chip piece 20
Even if the thinned part to about 50 Å shifts from the defective address 21 part, this means that when the image of the sample chip piece 20 is enlarged and displayed by the transmission electron microscope, the marking 24a ~ Since it can be recognized by the mark of 24d, as a result, it is not necessary to investigate the part of the wrong address. Furthermore, because of the configuration of the transmission electron microscope, an image can be obtained even if the sample chip piece 20 is turned over, so there is a possibility that the defective address 21 may be mistaken, but the entire shape of the markings 24a to 24d. Is not a target, the sample chips 20 can be seen to be turned inside out by looking at the markings 24a to 24d in the same manner. Therefore, a direct enlarged image of an electrically defective portion on the semiconductor chip 10 'of the semiconductor device 10 can be displayed and output by a transmission electron microscope, and the cause of the defect of the semiconductor device 10 can be accurately investigated. It is of great significance above.

The semiconductor inspection apparatus according to the present invention is not limited to the above-described embodiment, and may be a so-called inverted type in which the semiconductor chip is irradiated with the charged particle beam from below. In the case of such a form, the socket for connecting the semiconductor chip and the LSI tester can be attached downward, and the tester head can be further provided thereon,
Since the electric wiring can be shortened as much as possible and noise can be reduced, there is a great merit in performing highly accurate electrical inspection of the semiconductor chip.

<Effects of the Invention> As described above, in the case of the semiconductor inspection apparatus according to the present invention,
Since the data of the arrangement position corresponding to the defective circuit element of the semiconductor chip obtained by the semiconductor tester is obtained by the defective portion calculation unit, the defective address portion of the semiconductor chip can be automatically obtained. .
Therefore, it is possible to obtain an accurate defective address without requiring troublesome work as in the conventional case. On top of that,
Since the marking indicating the defective address of the semiconductor chip is performed by the irradiation of the charged particle beam, the defective address of the semiconductor chip can be specified without error even in the subsequent steps.

On the other hand, in the case of the semiconductor inspection method according to the present invention,
When observing using a transmission electron microscope, the defective address portion can be specified without error by using the marking on the semiconductor chip as a mark, so that the state of the defective address portion can be directly observed.

Therefore, there is a great merit in accurately investigating the cause of the defect in the semiconductor device.

[Brief description of drawings]

An embodiment of a semiconductor inspection device and a semiconductor inspection method according to the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a semiconductor inspection device, FIG. 2 is a display output diagram of the semiconductor inspection device, and shows an enlarged image of a semiconductor chip having markings. FIG. 3 shows a sample chip piece cut out from the semiconductor chip. FIG. 4 is an explanatory view showing how the sample chip pieces are polished by a polishing machine, and FIG. 5 (a)
Is an explanatory view showing a sample chip piece being thinned by the charged particle beam processing apparatus, and FIG. 5 (b) is a view corresponding to FIG. 5 (a) showing a fracture surface of the sample chip piece together. is there. FIG. 6 is a diagram for explaining a conventional semiconductor inspection device, where (a) is a diagram corresponding to FIG. 3, (b) is a diagram corresponding to FIG. 4, (c), (d). Is shown in FIG.
It is a figure corresponding to each of (b). 10 '... semiconductor chip 18 ... charged particle beam 4 ... computer 5 ... LSI tester 24a-24d ... engraved

Claims (2)

[Claims] 1. A semiconductor inspection apparatus for displaying and outputting a magnified image of a semiconductor chip based on detection data of secondary electrons obtained by irradiating the semiconductor chip with a charged particle beam. A semiconductor tester that measures and determines a defective circuit element based on the measurement result,
The layout pattern table data that gives the relationship between the circuit elements that form the semiconductor chip and the layout positions thereof is stored in advance, and the layout position that corresponds to the defective circuit element obtained by the semiconductor tester based on the table data. A defective portion calculating section for obtaining the data of, and toward a position away from the defective circuit element of the semiconductor chip by a predetermined distance based on the data of the arrangement position obtained by the defective portion calculating section, A semiconductor inspection apparatus characterized in that a charged particle beam having energy necessary for marking a position of a defective circuit element is applied. 2. A semiconductor chip is engraved by using the semiconductor inspection apparatus according to claim 1, and a defective circuit element on the semiconductor chip is identified by using the engraved mark as a mark by using a transmission electron microscope. A semiconductor inspection method characterized by investigating the cause of a defect in the circuit element.