JPH0750929B2 - Video signal transmission device - Google Patents
Video signal transmission deviceInfo
- Publication number
- JPH0750929B2 JPH0750929B2 JP61314401A JP31440186A JPH0750929B2 JP H0750929 B2 JPH0750929 B2 JP H0750929B2 JP 61314401 A JP61314401 A JP 61314401A JP 31440186 A JP31440186 A JP 31440186A JP H0750929 B2 JPH0750929 B2 JP H0750929B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- phase
- video signal
- video
- transmission
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
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- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Processing Of Color Television Signals (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は伝送回路のバラツキにより生じる映像信号相互
間の位相ずれを補償することにより映像信号を遠方へ伝
送するための映像信号伝送装置に関する。Description: TECHNICAL FIELD The present invention relates to a video signal transmission device for transmitting a video signal to a distant place by compensating for a phase shift between the video signals caused by variations in a transmission circuit.
第4図はこの種の装置の従来例を示す構成図である。同
図において点線で囲まれた部分は伝送ケーブル、HSは水
平同期信号、VSは垂直同期信号、Rは映像信号(赤)、
Gは映像信号(緑)である。尚、映像信号はこの他に青
信号,輝度信号等があるが、簡単のためにここでは省略
して説明する。FIG. 4 is a block diagram showing a conventional example of this type of device. In the figure, the portion surrounded by the dotted line is a transmission cable, HS is a horizontal synchronizing signal, VS is a vertical synchronizing signal, R is a video signal (red),
G is a video signal (green). In addition to the above, the video signal includes a blue signal, a luminance signal and the like, but for the sake of simplicity, the description is omitted here.
第5図は第4図に示す装置を説明するための各部波形図
であり、HS,VS,R,Gは前述の信号の送信側での信号波形
であり、HS′,VS′,R′,G′は受信側での信号波形であ
る。FIG. 5 is a waveform diagram of each part for explaining the device shown in FIG. 4, where HS, VS, R, G are signal waveforms on the transmission side of the above-mentioned signals, and HS ', VS', R '. , G'is the signal waveform on the receiving side.
以下、第4図および第5図を参照してその動作を説明す
る。The operation will be described below with reference to FIGS. 4 and 5.
HS,VS,R,Gは外部の映像信号出力機器から取り込むが、
ここでは第5図の如く映像信号R,Gのパルスを仮に同位
相とした場合である。この信号が伝送ケーブルを介して
遠方へ伝送された際の受信映像信号は第2図のR′,G′
となり、映像信号の位相に差が生じることになる。これ
は信号の伝送速度が次の式(1)により求められ各々の
信号が別々のケーブルにより伝送されるため、ケーブル
のLとCのバラツキにより信号の伝送速度が異なる為で
あり、伝送距離が長くなるほど位相差は大きくなる。HS, VS, R, G is taken in from an external video signal output device,
Here, as shown in FIG. 5, it is assumed that the pulses of the video signals R and G have the same phase. When this signal is transmitted to a distant place via a transmission cable, the received video signals are R'and G'in FIG.
Therefore, there is a difference in the phase of the video signal. This is because the signal transmission speed is obtained by the following equation (1) and each signal is transmitted by a different cable, so that the signal transmission speed is different due to the variation of L and C of the cable, and the transmission distance is The longer the length, the larger the phase difference.
但し、V:信号の伝送速度 L:伝送ケーブルのインダクタンス(分布定数系) C:伝送ケーブルの容量(分布定数系) 〔発明が解決しようとする問題点〕 従来の映像信号伝送装置では上述のように映像信号を遠
方へ伝送した場合、映像信号相互間の伝送がずれる事に
より、例えばこの信号をCRTディスプレイに接続した場
合色ずれが生じるという欠点があった為に、送信側とCR
Tディスプレイ間の距離は、例えば1.5m以上伸ばせない
状態にあった。 However, V: signal transmission speed L: transmission cable inductance (distributed constant system) C: transmission cable capacity (distributed constant system) [Problems to be solved by the invention] In the conventional video signal transmission device, When a video signal is transmitted to a distant place, the transmission between the video signals is deviated, and for example, when this signal is connected to a CRT display, there is a drawback that color shift occurs, so the transmission side and CR
The distance between the T-displays was, for example, 1.5 m or more.
本発明は上述のような従来装置の欠点を除去する為にな
されたものであり、従って本発明の目的は受信側での映
像信号相互間の位相を送信時の位相と同位相としCRTデ
ィスプレイ等に接続した際色ずれが生じない映像信号伝
送装置を提供することにある。The present invention has been made in order to eliminate the above-mentioned drawbacks of the conventional apparatus. Therefore, the object of the present invention is to make the phase between video signals on the receiving side the same as the phase at the time of transmission, such as a CRT display. An object of the present invention is to provide a video signal transmission device that does not cause color misregistration when connected to.
このような目的を達成するために、本発明は、送信側に
て垂直同期信号のレベルが非表示期間であることを示し
ているときの水平同期信号を抽出して各映像信号にそれ
ぞれ同位相のパルスとして付加し、受信側にパルスの位
相ずれ量を検出し、この位相ずれ量に応じて各映像信号
の位相を補正する。In order to achieve such an object, the present invention extracts the horizontal synchronization signal when the level of the vertical synchronization signal indicates the non-display period on the transmission side and outputs the same phase to each video signal. Pulse is added as a pulse, and the phase shift amount of the pulse is detected on the receiving side, and the phase of each video signal is corrected according to this phase shift amount.
次に図を参照しながら本発明の実施例を説明する。 Next, an embodiment of the present invention will be described with reference to the drawings.
第1図は本発明の一実施例を示す構成図である。同図に
おいて、1,4,5,6,14,15はAND演算素子、2,3はOR演算素
子、7,8はカウンタ、9,10はシフトレジスタ、11,12はデ
ータセレクタ、13はNOT演算素子であり、点線で囲まれ
た部分は伝送ケーブルである。FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, 1,4,5,6,14,15 are AND operation elements, 2,3 are OR operation elements, 7 and 8 are counters, 9 and 10 are shift registers, 11 and 12 are data selectors, and 13 is It is a NOT operation element, and the part surrounded by the dotted line is the transmission cable.
第2図および第3図は第1図の動作を説明する為の各部
波形図であり、水平同期信号HS、垂直同期信号VS、映像
信号R,Gを外部の映像信号出力機器から取り込み、これ
を遠方へ伝送し信号HS′,VS′,R0,G0を出力するまでの
過程を示している。2 and 3 are waveform diagrams for explaining the operation of FIG. 1, in which the horizontal synchronizing signal HS, the vertical synchronizing signal VS, and the video signals R and G are fetched from an external video signal output device, Is transmitted to a distant place and signals HS ′, VS ′, R 0 and G 0 are output.
次に第1図ないし第3図を参照して回路動作を説明す
る。Next, the circuit operation will be described with reference to FIGS.
第2図HS,VS,R,Gに示される如き水平同期信号HS、垂直
同期信号VS、映像信号R,Gを外部の映像信号出力機器か
ら取り込むが、説明の為映像信号R,Gのパルスは同位相
としてある。垂直同期信号VSがハイレベル時は非表示期
間であるから、AND演算素子1により垂直同期信号VSが
ハイレベル時の水平同期信号HSのパルスHS0を第2図HS0
の如く取り出し、これをOR演算素子2,3により映像信号
R,Gに付加し第2図R′,G′の如き信号波形にする。こ
れらの信号は伝送ケーブルにより遠方へ伝送されると第
2図HS′,VS′,R″,G″の如き波形となり、伝送前は映
像信号R,Gに付加されたパルスはそれぞれ同位相であっ
たが伝送後は位相差が生じる。The horizontal sync signal HS, the vertical sync signal VS, and the video signals R and G as shown in Fig. 2 HS, VS, R, and G are taken in from an external video signal output device, but for the sake of explanation, the pulses of the video signals R and G are taken. Are in phase. Since the time of the vertical synchronizing signal VS is high level is a non-display period, Figure 2 pulses HS 0 of the AND operation element 1 is a vertical synchronizing signal VS horizontal synchronizing signal HS at the high level HS 0
Taken out as shown, and use this as the video signal by OR operation elements 2 and 3.
It is added to R and G to form a signal waveform as shown in R'and G'in FIG. When these signals are transmitted to a distant place by a transmission cable, they have waveforms such as HS ', VS', R ", G" in Fig. 2. Before transmission, the pulses added to the video signals R, G have the same phase. However, there is a phase difference after transmission.
以下、この位相差を検知し同位相となるように補正する
回路動作を説明する。Hereinafter, a circuit operation for detecting this phase difference and correcting it so as to be in phase will be described.
図示されていないクロック発生回路により第2図CLKの
如きクロックパルスCLKを発生させ、この信号CLK,VS′,
R″をAND演算素子5により、また信号CLK,VS′,G″をAN
D演算素子6によりAND演算を行うことによって、伝送前
映像信号に付加されたパルスHS0中のクロック数が求め
られて第2図の7−CLK,8−CLKの如き信号波形となり、
それぞれカウンタ7,8の入力信号となる。A clock generating circuit (not shown) generates a clock pulse CLK such as CLK shown in FIG.
R "by AND operation element 5 and signals CLK, VS ', G" by AN
By performing the AND operation by the D operation element 6, the number of clocks in the pulse HS 0 added to the pre-transmission video signal is obtained, and a signal waveform such as 7-CLK, 8-CLK in FIG. 2 is obtained,
These are the input signals of the counters 7 and 8, respectively.
また、AND演算素子4により信号R″,G″,VS′のAND演
算を行うことにより、信号R″,G″中の付加されたパル
スが互いに重なり合う部分を抽出した第2図RTの如き信
号がカウンタ7,8のリセット信号となる。カウンタ7,8は
リセット信号の立下がりから入力パルス数をカウント
し、その結果を3bitの出力端子Q0,Q1,Q2に出力するか
ら、カウンタ7は第2図7−Q0,7−Q1,7−Q2の如く“0"
を出力し、カウンタ8は第2図8−Q0,8−Q1,および第
3図8−Q2の如く“2"を出力する。つまり、伝送された
映像信号R″,G″の位相関係は信号R″の方が信号G″
より2クロック進んでいることを検知できる。Further, by performing an AND operation on the signals R ″, G ″, VS ′ by the AND operation element 4, a portion such as the signal RT shown in FIG. 2 in which the added pulses in the signals R ″, G ″ overlap each other is extracted. Is the reset signal for counters 7 and 8. Counter 7,8 counts the number of input pulses from the fall of the reset signal, from outputs the result to the output terminal of 3bit Q 0, the Q 1, Q 2, counter 7 Figure 2 7-Q 0, 7 “Q” like −Q 1 and 7−Q 2
, And the counter 8 outputs "2" as in 8-Q 0 , 8-Q 1 in FIG. 2 and 8-Q 2 in FIG. That is, regarding the phase relationship between the transmitted video signals R ″ and G ″, the signal R ″ is the signal G ″.
It can be detected that it is advanced by 2 clocks.
一方では、信号R″,G″がシフトレジスタ9,10の直列入
力端子Dにそれぞれ入力されこのシフトレジスタ9,10の
出力端子Q0には入力信号を取り込んだ後クロックパルス
の立上がりで出力され、出力端子Q1には2クロック目の
立上がりで出力される。On the other hand, the signals R ″ and G ″ are input to the serial input terminals D of the shift registers 9 and 10, respectively, and the output terminals Q 0 of the shift registers 9 and 10 receive the input signal and then are output at the rising edge of the clock pulse. , Is output to the output terminal Q 1 at the rising edge of the second clock.
以下同様に出力端子Q2,Q3,Q4,Q5,Q6には1クロックずつ
遅延されて出力され、出力端子Q7には入力信号が8クロ
ック遅延されて出力されることになるから、例えばシフ
トレジスタ9の出力端子Q0,Q1,Q7の出力信号波形は第3
図9−Q0,9−Q1,9−Q7となり、シフトレジスタ10の出力
端子Q0,Q1,Q5,の出力波形は第3図10−Q0,10−Q1,10−Q
5となる。The following are used for the same output terminal Q 2, Q 3, Q 4 , Q 5, Q 6 is delayed by one clock output, the input signal is to be outputted is 8 clock delay at the output terminal Q 7 Therefore, for example, the output signal waveforms of the output terminals Q 0 , Q 1 , and Q 7 of the shift register 9 are the third
9-Q 0 , 9-Q 1 , 9-Q 7 , and the output waveforms of the output terminals Q 0 , Q 1 , Q 5 of the shift register 10 are shown in FIG. 3 10-Q 0 , 10-Q 1 , 10 -Q
It will be 5 .
これらシフトレジスタ9,10の出力端子Q0〜Q7の出力信号
はデータセレクタ11,12の入力端子D7〜D0にそれぞれ入
力され、データセレクタ11のセレクタ端子S0,S1,S2には
前述の映像信号相互間の位相差を示す第2図7−Q0,7−
Q1,7−Q2如きセレクタ信号が入力され、同様にデータセ
レクタ12のセレクト端子S0,S1,S2には第2図の8−Q0,8
−Q1,8−Q2の信号が入力される。データセレクタ11では
入力端子D0からの入力信号、つまり信号R″を8クロッ
ク遅延させた信号が選択され、データセレクタ12では入
力端子D3からの入力信号つまり信号G″を6クロック遅
延させた信号が選択されることにより、データセレクタ
11,12の各出力端子Qには第3図11−Q,12−Qの如き信
号がそれぞれ出力されるから映像信号相互間の位相を一
致させることができる。The output signals of the output terminals Q 0 to Q 7 of the shift registers 9 and 10 are input to the input terminals D 7 to D 0 of the data selectors 11 and 12, respectively, and the selector terminals S 0 , S 1 , and S 2 of the data selector 11 are input. Figure 2 7-Q 0 representing the phase difference between the above-mentioned video signal each other in, 7-
Selector signals such as Q 1 , 7-Q 2 are input, and similarly, select terminals S 0 , S 1 , S 2 of the data selector 12 have 8-Q 0 , 8 of FIG.
-Q 1 and 8-Q 2 signals are input. The data selector 11 selects the input signal from the input terminal D 0 , that is, the signal R ″ delayed by 8 clocks, and the data selector 12 delays the input signal from the input terminal D 3 that is the signal G ″ by 6 clocks. By selecting the signal, the data selector
Since signals such as 11-Q and 12-Q in FIG. 3 are output to the output terminals Q of 11 and 12, the phases of the video signals can be matched.
これらの映像信号11−Q,12−Qと信号VS′をNOT演算素
子13により反転させた第3図▲▼の如き信号とをAN
D演算素子14,15によりそれぞれAND演算することによ
り、付加したパルスがカットされ、第3図R0,G0の如く
最終的な映像信号R0,G0が得られる。これは第2図R,Gの
如く外部の映像信号出力機器から取り込んだ時の位相関
係と一致することが明らかである。These video signals 11-Q, 12-Q and the signal VS 'are inverted by the NOT operation element 13 and the signal as shown in FIG.
By performing an AND operation by the D operation elements 14 and 15, respectively, the added pulse is cut and final video signals R 0 and G 0 are obtained as shown in R 0 and G 0 in FIG. It is clear that this coincides with the phase relationship when taken in from an external video signal output device as shown in FIGS.
本発明によれば伝送後に生じる映像信号相互間の位相の
ずれを補正できる為、例えばCRTディスプレイに接続し
た場合色ずれが生じない映像伝送装置を提供できるとい
う利点がある。According to the present invention, it is possible to correct a phase shift between video signals that occurs after transmission, so that there is an advantage that it is possible to provide a video transmission apparatus that does not cause color shift when connected to a CRT display, for example.
第1図は本発明の一実施例を示す構成図、第2図および
第3図は第1図の動作を説明する為の各部信号波形図、
第4図は映像信号伝送装置の従来例を示す構成図、第5
図は第4図の動作を説明する為の各部信号波形図であ
る。 HS……水平同期信号、VS……垂直同期信号、R……映像
信号(赤)、G……映像信号(緑)、1,4,5,6,14,15…
…AND演算素子、2,3……OR演算素子、7,8……カウン
タ、9,10……シフトレジスタ、11,12……データセレク
タ、13……NOT演算素子。FIG. 1 is a block diagram showing an embodiment of the present invention, FIGS. 2 and 3 are signal waveform diagrams of respective parts for explaining the operation of FIG. 1,
FIG. 4 is a block diagram showing a conventional example of a video signal transmission device, and FIG.
The figure is a signal waveform diagram for explaining the operation of FIG. HS: Horizontal sync signal, VS: Vertical sync signal, R: Video signal (red), G: Video signal (green), 1,4,5,6,14,15 ...
… AND operation element, 2,3 …… OR operation element, 7,8 …… Counter, 9,10 …… Shift register, 11,12 …… Data selector, 13 …… NOT operation element.
Claims (1)
ことを示しているときの水平同期信号を抽出して遠方へ
伝送する複数の映像信号にそれぞれ同位相のパルスとし
て付加するパルス付加回路と、伝送ケーブルにより伝送
された映像信号の該パルスの位相差により映像信号相互
間の位相ずれ量を検出する位相ずれ量検出回路と、該位
相ずれ量に基づいて位相差を補正するための位相調整回
路とを備え、映像信号を遠方へ伝送すると共に伝送時に
生じる映像信号相互間の位相のずれを補正することを特
徴とする映像信号伝送装置。1. A pulse adding circuit for extracting a horizontal synchronizing signal when the level of the vertical synchronizing signal indicates a non-display period and adding the same as a pulse having the same phase to a plurality of video signals transmitted to a distant place. And a phase shift amount detection circuit for detecting the phase shift amount between the video signals based on the phase difference between the pulses of the video signal transmitted by the transmission cable, and a phase for correcting the phase difference based on the phase shift amount. A video signal transmission device comprising: an adjustment circuit, which transmits a video signal to a distant place and corrects a phase shift between the video signals generated at the time of transmission.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61314401A JPH0750929B2 (en) | 1986-12-26 | 1986-12-26 | Video signal transmission device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61314401A JPH0750929B2 (en) | 1986-12-26 | 1986-12-26 | Video signal transmission device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63164779A JPS63164779A (en) | 1988-07-08 |
| JPH0750929B2 true JPH0750929B2 (en) | 1995-05-31 |
Family
ID=18052903
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61314401A Expired - Lifetime JPH0750929B2 (en) | 1986-12-26 | 1986-12-26 | Video signal transmission device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0750929B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02189093A (en) * | 1989-01-18 | 1990-07-25 | Fuji Electric Co Ltd | Device for correcting transmission phase difference of analog video signal |
| US7221389B2 (en) * | 2002-02-15 | 2007-05-22 | Avocent Corporation | Automatic equalization of video signals |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50114910A (en) * | 1974-02-18 | 1975-09-09 | ||
| JPS58135183U (en) * | 1982-03-04 | 1983-09-10 | 横河電機株式会社 | Color CRT device |
-
1986
- 1986-12-26 JP JP61314401A patent/JPH0750929B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63164779A (en) | 1988-07-08 |
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