JPH0752737B2 - Method for producing compound semiconductor crystal - Google Patents
Method for producing compound semiconductor crystalInfo
- Publication number
- JPH0752737B2 JPH0752737B2 JP2842487A JP2842487A JPH0752737B2 JP H0752737 B2 JPH0752737 B2 JP H0752737B2 JP 2842487 A JP2842487 A JP 2842487A JP 2842487 A JP2842487 A JP 2842487A JP H0752737 B2 JPH0752737 B2 JP H0752737B2
- Authority
- JP
- Japan
- Prior art keywords
- crystal layer
- substrate
- crystal
- compound semiconductor
- znse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Recrystallisation Techniques (AREA)
Description
【発明の詳細な説明】 〔概要〕 ガリウム砒素(GaAs)基板上にミスフィット転位を生じ
ない状態で、水銀・カドミウム・テルル(HgCdTe)の結
晶層を気相エピタキシャル成長する方法であって、GaAs
基板上に予め、亜鉛・セレン・テルル〔Zn Se1-y Te y
(0≦y<0.43)〕の結晶層をGaAs基板に対してミスフ
ィット転位を生じない所定の厚さで形成した後、この基
板上に亜鉛元素とセレン、カドミウム、テルル、水銀の
うちの少なくとも一元素を組み合わせた化合物半導体結
晶を多層構造に形成した後、その上に最上層としてHg
1-X CdX Teの結晶層を気相エピタキシャル成長方法で形
成する方法。DETAILED DESCRIPTION OF THE INVENTION [Outline] A method of vapor phase epitaxially growing a crystal layer of mercury-cadmium-tellurium (HgCdTe) on a gallium arsenide (GaAs) substrate without causing misfit dislocations.
Zinc selenide tellurium [Zn Se 1-y Te y
(0 ≦ y <0.43)] is formed on the GaAs substrate to a predetermined thickness that does not cause misfit dislocations, and at least zinc element, selenium, cadmium, tellurium, and mercury are formed on this substrate. After forming a compound semiconductor crystal that combines one element into a multilayer structure, Hg
A method for forming a crystal layer of 1-X Cd X Te by vapor phase epitaxial growth.
本発明は化合物半導体結晶の製造方法に係り、特にGaAs
のような化合物半導体基板上に該基板と格子不整合を生
じない状態で水銀・カドミウム・テルルの化合物半導体
結晶を製造する方法に関する。The present invention relates to a method for manufacturing a compound semiconductor crystal, and particularly to GaAs
On a compound semiconductor substrate such as that described above without producing a lattice mismatch with the substrate, a method for producing a compound semiconductor crystal of mercury, cadmium and tellurium.
赤外線検知素子を形成する材料としてエネルギーバンド
ギャップの狭い水銀・カドウミム・テルルの化合物半導
体結晶を薄層状態に形成した結晶が用いられている。As a material for forming the infrared detection element, a crystal in which a compound semiconductor crystal of mercury / cadmium / tellurium having a narrow energy band gap is formed in a thin layer state is used.
この薄層状態の結晶では素子形成の工程で強度が弱い等
の問題があり、素子形成に都合が良く、また形成される
素子の絶縁耐圧を高めるために、この薄層状態の結晶の
形成方法としてサフィア(α−Al2O3)やスピネル(MgO
・Al2O3)等の絶縁性基板上に気相エピタキシャル成長
方法を用いて薄層の水銀・カドミウム・テルルの結晶が
形成されている。This thin layer crystal has problems such as weak strength in the element formation process, which is convenient for element formation, and in order to increase the withstand voltage of the formed element, a method for forming this thin layer crystal As sapphire (α-Al 2 O 3 ) and spinel (MgO
-A thin layer of mercury / cadmium / tellurium crystals is formed on an insulating substrate such as Al 2 O 3 ) by a vapor phase epitaxial growth method.
特に、GaAsのような半絶縁性の化合物半導体基板上に水
銀・カドウミム・テルルの化合物半導体結晶を薄層状態
に形成し、これを用いて高密度に集積化された赤外線検
知素子を形成し、この検知素子を動作させるためのFET
等の半導体素子を前記したGaAs基板に形成し、赤外線を
検知する素子とこの検知素子を動作させる半導体素子を
同一基板に一括形成した高性能な半導体装置が形成され
ている。In particular, a compound semiconductor crystal of mercury, cadmium, and tellurium is formed in a thin layer state on a semi-insulating compound semiconductor substrate such as GaAs, and using this, an infrared sensing element integrated at high density is formed, FET for operating this sensing element
There is formed a high-performance semiconductor device in which semiconductor elements such as the above are formed on the GaAs substrate described above, and an element for detecting infrared rays and a semiconductor element for operating the detection element are collectively formed on the same substrate.
従来、第3図に示すようにGaAsのような化合物半導体基
板1上に水銀・カドミウム・テルル(Hg1-X CdX Te)の
結晶層3を形成する場合、直接上記三元の化合物半導体
を形成することは困難であるので、例えば二元のCdTeの
ような化合物半導体をバッファー層2として形成し、そ
の上にHg1-X CdX Teの結晶3を形成するようにしてい
た。Conventionally, as shown in FIG. 3, when a crystal layer 3 of mercury, cadmium, tellurium (Hg 1-X Cd X Te) is formed on a compound semiconductor substrate 1 such as GaAs, the ternary compound semiconductor is directly formed. Since it is difficult to form, a compound semiconductor such as binary CdTe is formed as the buffer layer 2, and the crystal 3 of Hg 1-X Cd X Te is formed thereon.
然し、GaAsの基板1上に形成されたCdTeの結晶2は基板
に対して格子定数が異なるため、ミスフィット転位(異
種結晶間に於いて、それぞれの結晶の格子が一致しな
い、即ち格子不整合による転位)が発生し、そのCdTeの
上に形成されるHg1-X CdX Teの結晶層の結晶性が悪くな
る問題を生じていた。However, since the CdTe crystal 2 formed on the GaAs substrate 1 has a different lattice constant with respect to the substrate, misfit dislocations (the lattices of different crystals do not match between different crystals, that is, lattice mismatch). Dislocation) occurs and the crystallinity of the Hg 1-X Cd X Te crystal layer formed on the CdTe deteriorates.
このミスフィット転位を発生しない状態となる結晶層の
臨界厚さをhcとすると、このhcの値は文献1(アメリカ
合衆国特許、特許番号3,788,890号Patented Jan.29,197
4)により第(1)式に示すようになる。When the critical thickness of the crystal layer becomes a state of not generating misfit dislocations and h c, the value of the h c literature 1 (United States Patent, Patent No. 3,788,890 Patented Jan.29,197
It becomes as shown in the formula (1) by 4).
hc=b(1−ν)/4f(1+ν)cosλ 1.1/f(Å) ……(1) ここでhcは臨界厚さ、fはミスフィット転位数、νはポ
アソン比、λは基板上に形成した結晶のスリップ面の方
向と、該スリップ面と元の基板の交線に立てた法線との
なす角度、bはバーガースベクトルの大きさを示す。h c = b (1-ν) / 4f (1 + ν) cosλ 1.1 / f (Å) (1) where h c is the critical thickness, f is the number of misfit dislocations, ν is the Poisson's ratio, and λ is the substrate. The angle between the direction of the slip surface of the crystal formed above and the normal line standing on the line of intersection between the slip surface and the original substrate, and b indicates the magnitude of the Burgers vector.
更にHg1-X CdX Teの場合のhcの値は文献2(Phys.stat.
sol.(a)So,663(1983)、Subject Classification:
1.5and10.2;22.4,4、by J.H.Basson and H.Booyens:Int
roduction of Misfit Dislocation in HgCdTe)によっ
て第(2)式で示されている。Furthermore, the value of h c in the case of Hg 1-X Cd X Te is given in Reference 2 (Phys.stat.
sol. (a) So, 663 (1983), Subject Classification:
1.5and10.2; 22.4,4, by JHBasson and H. Booyens: Int
roduction of Misfit Dislocation in HgCdTe) is shown by the equation (2).
hc1.8/f(Å) ……(2) この(1)、(2)式を組み合わせて基板上に該基板と
異なる結晶層を形成した場合、ミスフィット転位を発生
しない臨界厚さhcは第(2)′式に示すようになる。h c 1.8 / f (Å) (2) When a crystal layer different from the substrate is formed on the substrate by combining the equations (1) and (2), the critical thickness h c at which misfit dislocations do not occur Becomes as shown in the equation (2) ′.
1.1/f<hc<1.8/f ……(2)′ 尚、基板上に該基板と格子定数の異なる異種結晶を形成
した場合のミスフィット数fを第(3)式に示す。1.1 / f <h c <1.8 / f (2) ′ The misfit number f when a dissimilar crystal having a different lattice constant from the substrate is formed on the substrate is shown in the equation (3).
f=|(異種結晶層の格子定数/基板の格子定数) −1| ……(3) この結果、従来の方法に於けるように、GaAs基板上にCd
Teの結晶層を形成した場合、ミスフィット数f=1.47×
10-1となり、このCdTeの結晶層がミスフィット転位を発
生しない臨界厚さhcの値は、第(2)′式を用いて算出
すると7.5Å〜12.2Åの厚さとなる。この厚さはCdTe結
晶の格子面が1〜2層重なった程度の厚さに等しく、こ
のような薄い結晶層を形成するのは製造上困難である。f = | (lattice constant of different crystal layer / lattice constant of substrate) −1 | (3) As a result, as in the conventional method, Cd is formed on the GaAs substrate.
When a Te crystal layer is formed, the misfit number f = 1.47 ×
10 -1, and the value of the critical thickness h c the crystal layer of the CdTe generates no misfit dislocation, a thickness of as calculated using the first (2) 'equation 7.5A~12.2A. This thickness is equal to the thickness of one or two layers of lattice planes of the CdTe crystal, and it is difficult to form such a thin crystal layer in manufacturing.
本発明は上記した問題点を解決し、第1表に示すよう
に、GaAs基板に対して格子間隔が近い、即ちミスフィッ
ト数fの値が小さい結晶層を形成後、該結晶層に対して
ミスフィット転位を生じない、即ち格子間隔が近接した
結晶層を多層構造に形成した後、最終層としてGaAs基板
に対してミスフィット転位が発生しない水銀・カドミウ
ム・テルルの結晶層の製造方法の提供を目的とする。The present invention solves the above-mentioned problems and, as shown in Table 1, after forming a crystal layer having a lattice spacing close to that of a GaAs substrate, that is, having a small misfit number f, the crystal layer is Provided is a method for producing a mercury-cadmium-tellurium crystal layer that does not generate misfit dislocations, that is, does not generate misfit dislocations on a GaAs substrate as a final layer after forming a crystal layer having a close lattice spacing into a multilayer structure. With the goal.
ここで本発明の方法に用いる結晶の格子定数を第1表に
示す。Table 1 shows the lattice constants of the crystals used in the method of the present invention.
〔問題点を解決するための手段〕 本発明の化合物半導体結晶の製造方法は、ガリウム砒素
基板上に予め亜鉛・セレン・テルル〔Zn Se1-y Te
y(0≦y<0.43)〕の結晶層を、組成を変動させて複
数層積層形成後、該基板上に亜鉛元素とセレン・水銀・
カドミウム・テルルの元素のうちの少なくとも一元素を
含む化合物半導体結晶層を、組成を変動させて複数層積
層形成後、更に最上層に水銀・カドミウム・テルルより
なる化合物半導体結晶層を積層形成するようにする。 [Means for Solving Problems] A method for producing a compound semiconductor crystal according to the present invention is such that zinc-selenium-tellurium [Zn Se 1-y Te
y (0 ≦ y <0.43)] of the crystal layer is formed by laminating a plurality of layers while varying the composition, and then zinc element, selenium, mercury.
Multiple layers of compound semiconductor crystal layers containing at least one element of cadmium / tellurium are formed by varying the composition, and then a compound semiconductor crystal layer of mercury / cadmium / tellurium is further laminated on the uppermost layer. To
そして前記ガリウム砒素基板上に予め形成する亜鉛・セ
レン・テルル〔Zn Se1-y Te y(0≦y<0.43)〕の結
晶層の厚さを50Å〜〔680/(1+29y)〕Åの範囲とす
る。The thickness of the crystal layer of zinc selenium tellurium [Zn Se 1-y Te y (0 ≦ y <0.43)] previously formed on the gallium arsenide substrate is in the range of 50Å to [680 / (1 + 29y)] Å And
本発明の化合物半導体結晶の製造方法は、GaAs基板に、
その基板に対してミスフィット数が少ないZnSe1-y Tey
(0≦y<0.43)の結晶層をまず形成する。ここでZnSe
1-y Teyの結晶層は5.668+0.434y(Å)の格子定数を有
し、これを格子間隔がZnSeの場合で9層分、即ち5.668
Å×9=50Å 程度の結晶層を形成すると、この結晶層は技術的に成長
可能な数字であり、この値が下限の限界となる。The method for producing a compound semiconductor crystal of the present invention, a GaAs substrate,
ZnSe 1-y Te y with few misfits to the substrate
First, a crystal layer of (0 ≦ y <0.43) is formed. Where ZnSe
The crystal layer of 1-y Te y has a lattice constant of 5.668 + 0.434y (Å), which is 9 layers when the lattice spacing is ZnSe, that is, 5.668.
When a crystal layer of about Å × 9 = 50Å is formed, this crystal layer is a number that can be technically grown, and this value is the lower limit.
また基板上に該基板に対して異種結晶を形成する際の臨
界厚さは第(2)式に示すようにhc=1.8/fであり、ま
たfはミスフィット数であるので、 f=(ZnSe1-y Te y の格子定数/GaAsの格子定数) −1 ……(4) で表される。ZnSe1-y Te yの格子定数はVegard則により
5.668+0.434yÅであるので、第(2)式および第
(4)式を用いて、GaAsの基板上にZnSe1-y Te yの結晶
層を形成した時のhcの値は第(5)式に示すようにな
る。Further, the critical thickness when forming a different crystal on the substrate is h c = 1.8 / f as shown in the equation (2), and f is a misfit number, so f = (ZnSe 1-y Te y lattice constant / GaAs lattice constant) -1 ... (4) The lattice constant of ZnSe 1-y Te y is determined by the Vegard law.
Since it is 5.668 + 0.434yÅ, the value of h c when the ZnSe 1-y Te y crystal layer is formed on the GaAs substrate by using the formulas (2) and (4) is (5) ) As shown in the equation.
hc=1.8/f =(1.8)/〔(5.668+0.434y)/5.653〕−1 =10.176/(0.015+0.434y)=680/(1+29y) ……(5) 前記した下限の限界値と、(5)式に示した臨界厚さの
値の範囲内にZnSe1-y Te y(0≦y<0.43)の結晶層を
形成するとGaAs基板に対してミスフィット転位が発生し
ない状態でZnSe1-y Te y(0≦y<0.43)の結晶層が形
成できる。h c = 1.8 / f = (1.8) / [(5.668 + 0.434y) /5.653] -1 = 10.176 / (0.015 + 0.434y) = 680 / (1 + 29y) ...... (5) With the above lower limit value , If a crystal layer of ZnSe 1-y Te y (0 ≦ y <0.43) is formed within the range of the critical thickness value shown in equation (5), ZnSe will be generated in the state where misfit dislocations do not occur in the GaAs substrate. A crystal layer of 1-y Te y (0 ≦ y <0.43) can be formed.
このようにすればGaAsの基板上には該基板とミスフィッ
ト転位を生じない状態でこの結晶層の最上層に更に水銀
・カドミウム・テルルの結晶を形成するとその結晶はGa
Asの基板に対しミスフィット転位を発生しない高品位な
結晶となる。In this way, if a crystal of mercury, cadmium, tellurium is further formed on the uppermost layer of this crystal layer on the GaAs substrate without causing misfit dislocations with the substrate, the crystal becomes Ga
A high-quality crystal that does not generate misfit dislocations with respect to the As substrate.
以下、図面を用いながら本発明の一実施例につき詳細に
説明する。An embodiment of the present invention will be described in detail below with reference to the drawings.
第1図は本発明の方法で形成した化合物半導体結晶の断
面図で、第2図は本発明の方法に用いる装置の模式図で
ある。FIG. 1 is a sectional view of a compound semiconductor crystal formed by the method of the present invention, and FIG. 2 is a schematic view of an apparatus used in the method of the present invention.
第1図に示すように、GaAs基板11上に、Metal−Organic
−Chemical−Vapor−Deposition(以下MOCVDと称する)
方法により、ZnSe(ZnSe1-y Te y、y=0)の結晶層12
Aを、400Å程度の厚さに形成する。As shown in FIG. 1, a metal-organic film is formed on the GaAs substrate 11.
-Chemical-Vapor-Deposition (hereinafter referred to as MOCVD)
According to the method, a ZnSe (ZnSe 1-y Te y , y = 0) crystal layer 12
Form A to a thickness of about 400Å.
このようにすれば、GaAs基板11に対してZnSe(ZnSe1-y
Te y、y=0、即ち0≦y<0.43)の結晶結晶層の臨界
厚さは680Åであるので、ZnSeの結晶層はGaAs基板に対
してミスフィット転位を発生しない。In this way, ZnSe (ZnSe 1-y
Since the critical thickness of the crystal crystal layer of Te y , y = 0, that is, 0 ≦ y <0.43) is 680 Å, the ZnSe crystal layer does not generate misfit dislocations with respect to the GaAs substrate.
次いでこのZnSeの結晶層12Aの上にZn Se1-y Te yの結晶
層12Bをその下のZnSeの結晶層12Aとミスフィット転位が
発生しない程度の厚さで形成する。Then formed to a thickness of an extent that Zn Se 1-y Te y crystal layer 12A and the misfit dislocations ZnSe thereunder crystal layer 12B does not occur on the crystal layer 12A of the ZnSe.
この厚さは第(2)式より導出した第(6)式に於い
て、例えばy=0.05のZn Se1-y Te yの結晶であると83
Åの厚さとなる。In formula (6) derived from formula (2), this thickness is, for example, a Zn Se 1-y Te y crystal with y = 0.05.
The thickness will be Å.
hc(ZnSe1-yTey/ZnSe)=4.15/y ……(6) 次いで、このZnSe1-y Teyの結晶層12Bの上にZnSe1-w Te
wの結晶層12Cをその下のZn Se1-y Te yの結晶層12Bとミ
スフィット転位が発生しない程度の厚さに形成する。h c (ZnSe 1-y Te y /ZnSe)=4.15/y (6) Next, ZnSe 1-w Te is formed on the ZnSe 1-y Te y crystal layer 12B.
The crystal layer 12C of w is formed to a thickness such that misfit dislocations do not occur with the crystal layer 12B of Zn Se 1-y Te y thereunder.
この厚さは第(7)式に於いて、例えばy=0.05のZn S
e1-y Te yの結晶12Bの上にw=0.1の結晶層12Cを形成す
るとき、その厚さは第(7)式に示すように83Åの厚さ
となる。This thickness is, for example, ZnS of y = 0.05 in the formula (7).
When the crystal layer 12C with w = 0.1 is formed on the crystal 1B of e 1-y Te y , its thickness is 83Å as shown in the equation (7).
hc(Zn Se1-w Tew/ZnSe1-yTey) =4.15/(w−y)(Å) ……(7) 順次このようにして下層よりTeの量の多いZnSe1-uiTeui
層12Dをミスフィット転位が発生しない程度の厚さに形
成し、次いでこのZnSe1-unTeun層12Eの上にZnTeの結晶
層13をその下のZnSe1-unTeunの結晶層12Eとミスフィッ
ト転位が発生しない程度の厚さに形成する。h c (Zn Se 1-w Te w / ZnSe 1-y Te y ) = 4.15 / (wy) (Å) (7) In this way, ZnSe 1-ui with more Te than the lower layer Te ui
The layer 12D is formed to a thickness such that misfit dislocations do not occur, and then the ZnTe crystal layer 13 is formed on the ZnSe 1-un Te un layer 12E and the ZnSe 1-un Te un crystal layer 12E thereunder. It is formed to a thickness such that misfit dislocations do not occur.
この厚さは第(2)式より導出した第(8)式を用いて
算出すると、例えばu=0.95のZnSe1-u Teuに引き続い
てZnTeを形成する場合、280Åの厚さとなる。When this thickness is calculated using the formula (8) derived from the formula (2), for example, when ZnTe 1-u Te u with u = 0.95 is formed and then ZnTe is formed, the thickness is 280 Å.
hc(Zn Te/ZnSe1-u Teu)=14/(1−u)(Å) ……
(8) 次いでこのZnTeの結晶層13の上にZnz Cd1-z Teの結晶層
14を形成する。h c (Zn Te / ZnSe 1-u Te u ) = 14 / (1-u) (Å) ……
(8) Next, on this ZnTe crystal layer 13, a Zn z Cd 1-z Te crystal layer
Forming 14
この厚さは第(2)式より導出した第(9)式を用いて
算出すると、例えばZnTeの結晶層13の上に引き続いてz
=0.9のZnz Cd1-z Teの結晶層14を形成する場合、その
厚さは290Åである。When this thickness is calculated using the equation (9) derived from the equation (2), for example, the z layer is continuously formed on the ZnTe crystal layer 13.
In the case of forming the crystal layer 14 of Zn z Cd 1-z Te of = 0.9, its thickness is 290Å.
hc=(Zn z Cd1-z Te/ZnTe)=29/(1−y)(Å) ……(9) 更にこのZn z Cd1-z Teの結晶層14上にZns Cd1-s-t Hgt
Te結晶層15をその下のZn z Cd1-z Te結晶層14とミスフ
ィット転位が発生しない程度の厚さに形成する。h c = (Zn z Cd 1-z Te / ZnTe) = 29 / (1-y) (Å) (9) Further, Zn s Cd 1- on the crystal layer 14 of Zn z Cd 1-z Te. st Hg t
The Te crystal layer 15 and the Zn z Cd 1-z Te crystal layer 14 thereunder are formed to a thickness such that misfit dislocations do not occur.
この厚さは第(2)式より算出した第(10)式を用いて
算出すると、例えばz=0.5のZn z Cd1-z Teに引き続い
てs=0.1、t=0.3のZn s Cd1-s-t Hgt Teの結晶層を
形成する場合、その厚さは77Åである。When this thickness is calculated using the equation (10) calculated from the equation (2), for example, Zn z Cd 1-z Te with z = 0.5, followed by Zn s Cd 1 with s = 0.1 and t = 0.3. When forming a -st Hg t Te crystal layer, its thickness is 77Å.
hc=(Zn s Cd1-s-t Hgt Te/Zn z Cd1-z Te) =(583−34z)/〔19(z−s)−t〕(Å) ……(10) 更にこのZns Cd1-s-t Hgt Te結晶層15上に、Hg1-x Cdx
Teの結晶層16を、その下のZns Cd1-s-t Hgt Te結晶層15
とミスフィット転位が発生しない程度の厚さに形成す
る。h c = (Zn s Cd 1-st Hg t Te / Zn z Cd 1-z Te) = (583−34z) / [19 (z−s) −t] (Å) …… (10) Furthermore, this Zn s Cd 1-st Hg t Te On the crystal layer 15, Hg 1-x Cd x
The Te crystal layer 16 is replaced by the Zn s Cd 1-st Hg t Te crystal layer 15 below.
And the thickness is such that misfit dislocations do not occur.
この厚さは第(2)式より導出した第(11)式を用いて
算出すると、例えばs=0.1、t=0.3のZn s Cd1-s-t H
gt Teの結晶層の上に引き続いてx=0.3のHg1-x Cdx Te
の結晶層を形成する場合は、398Åの厚さとなる。When this thickness is calculated using the equation (11) derived from the equation (2), for example, Zn s Cd 1-st H with s = 0.1 and t = 0.3.
Hg 1-x Cd x Te with x = 0.3 on top of the crystalline layer of g t Te
When forming the crystal layer of, the thickness is 398Å.
hc=(Hg1-x Cdx Te/Zn s Cd1-s-t Hgt Te) =(583−34s−1.8t)/(19s+t+x−1)(Å) ……(11) このようにすれば最上層に形成されているHg1-x Cdx Te
の結晶層16は、GaAs基板11に対してミスフィット転位を
発生しないので、良好な半導体結晶が得られる。h c = (Hg 1-x Cd x Te / Zn s Cd 1-st Hg t Te) = (583−34s−1.8t) / (19s + t + x−1) (Å) …… (11) Hg 1-x Cd x Te formed on the top layer
Since the crystal layer 16 does not generate misfit dislocations with respect to the GaAs substrate 11, a good semiconductor crystal can be obtained.
尚、所望の厚さのHg1-x Cdx Teの結晶層を得るには、第
(7)式〜第(11)式に従ってバラメータw,ui,un,zを
考えれば良い。In order to obtain a crystal layer of Hg 1-x Cd x Te having a desired thickness, the parameters w, u i , u n , z may be considered according to the equations (7) to (11).
このような半導体結晶を形成するには、第2図に示すよ
うに、反応管21内のグラファイトより成る基板設置台22
上にGaAsよりなる基板11を設置する。In order to form such a semiconductor crystal, as shown in FIG.
A substrate 11 made of GaAs is placed on top.
次いで水素ガスの供給バルブ23と、ジメチル亜鉛の収容
容器24に通じるバルブ25と、ジメチルセレン収容容器26
に通じるバルブ27と、ジメチルテルル収容容器29に通じ
るバルブ30を開放にし、各供給バルブ23,25,27,30に連
なる流量制御器(マスフローメータ)23A,25A,27A,30A
を作動させて、反応管21内に水素ガスと、ジメチル亜鉛
とジメチルセレンとジメチルテルルを担持せる水素ガス
を導入して、反応管21に設けた高周波コイル28に通電し
て基板を加熱してZnSe1-y Tey(y=0、ZnSe)の結晶
層12Aを基板11上に形成する。Next, a hydrogen gas supply valve 23, a valve 25 communicating with a dimethylzinc storage container 24, and a dimethylselenium storage container 26.
Open the valve 27 leading to the dimethyl tellurium container 29 and the flow controller (mass flow meter) 23A, 25A, 27A, 30A connected to each supply valve 23, 25, 27, 30
Is operated to introduce hydrogen gas into the reaction tube 21 and hydrogen gas carrying dimethyl zinc, dimethyl selenium and dimethyl tellurium, and heat the substrate by energizing the high frequency coil 28 provided in the reaction tube 21. A crystal layer 12A of ZnSe 1-y Te y (y = 0, ZnSe) is formed on the substrate 11.
次いでジメチルテルルの収容容器29に通じるラインの流
量を変化させることで、ジメチルテルルの濃度を変えて
ジメチルテルルを担持した水素ガス、ジメチルセレンを
担持した水素ガス、ジメチル亜鉛を担持した水素ガス
を、反応管21に導入して、ZnSe1-y Teyの結晶層12B、Zn
Se1-w Te wの結晶層12Cを基板上に形成する。Then, by changing the flow rate of the line leading to the container 29 of dimethyl tellurium, hydrogen gas carrying dimethyl tellurium by changing the concentration of dimethyl tellurium, hydrogen gas carrying dimethyl selenium, hydrogen gas carrying dimethyl zinc, Introduced into the reaction tube 21, ZnSe 1-y Te y crystal layer 12B, Zn
A crystal layer 12C of Se 1-w Te w is formed on the substrate.
このようにして順次,ui,un,と係数を変化させてZnSe1-y
Teyの結晶層を基板上に形成する。Thus sequentially, u i, u n, and to change the coefficients ZnSe 1-y
A crystal layer of Te y is formed on the substrate.
次いでジメチルセレン収容容器26に通じるバルブ27を閉
じて反応管内にジメチルテルル、およびジメチル亜鉛を
担持した水素ガスを導入してZnTeの結晶層13を基板上に
形成する。Then, the valve 27 leading to the dimethylselenium container 26 is closed, and hydrogen gas carrying dimethyl tellurium and dimethyl zinc is introduced into the reaction tube to form a ZnTe crystal layer 13 on the substrate.
次いでジメチルカドミウム収容容器31に連なるバルブ32
を開放にして、バルブ32に連なるマスフローメータ32A
を作動させ、ジメチルカドミウムを担持した水素ガス、
ジメチル亜鉛を担持した水素ガス、ジメチルカドミウム
を担持した水素ガスを反応管21内に導入してZnz Cd1-z
Teの結晶層14を基板上に形成する。Next, a valve 32 connected to the dimethyl cadmium container 31
Mass flow meter 32A connected to valve 32 by opening
Is operated, hydrogen gas carrying dimethyl cadmium,
By introducing hydrogen gas supporting dimethylzinc and hydrogen gas supporting dimethylcadmium into the reaction tube 21, Zn z Cd 1-z
A Te crystal layer 14 is formed on the substrate.
次いで水銀を収容した容器33に連なるバルブ34を開放に
し、バルブ34に連なるマスフローメータ34Aを作動さ
せ、反応管内に水銀を担持した水素ガス、ジメチルカド
ミウムを担持した水素ガス、ジメチル亜鉛を担持した水
素ガスを反応管に導入してZns Cd1-s-t Hgt Teの結晶層
15を形成する。Next, the valve 34 connected to the container 33 containing mercury is opened, the mass flow meter 34A connected to the valve 34 is operated, and hydrogen gas carrying mercury in the reaction tube, hydrogen gas carrying dimethylcadmium, hydrogen carrying dimethylzinc. A gas is introduced into the reaction tube to form a Zn s Cd 1-st Hg t Te crystal layer.
Forming fifteen.
次いでジメチル亜鉛の収容容器24に連なるバルブを閉じ
て、反応管内に水銀を担持した水素ガス、ジメチルカド
ミウムを担持した水素ガス、ジメチルテルルを担持した
水素ガスを導入して基板上にHg1-x Cdx Teの結晶層16を
形成する。Then, the valve connected to the dimethylzinc container 24 is closed, and hydrogen gas supporting mercury in the reaction tube, hydrogen gas supporting dimethylcadmium, and hydrogen gas supporting dimethyltellurium are introduced and Hg 1-x on the substrate. A crystal layer 16 of Cd x Te is formed.
このようにすれば、基板上に該基板とミスフィット転位
を発生しない状態で高品質の化合物半導体結晶が得られ
る。By doing so, a high-quality compound semiconductor crystal can be obtained without causing misfit dislocations on the substrate.
以上述べたように本発明の方法よれば、基板上に形成さ
れる化合物半導体結晶にミスフィット転位が発生しない
ので、高品位な化合物半導体結晶が得られる効果があ
る。As described above, according to the method of the present invention, since misfit dislocations do not occur in the compound semiconductor crystal formed on the substrate, a high-quality compound semiconductor crystal can be obtained.
第1図は本発明の方法で形成した半導体結晶の構造を示
す断面図、 第2図は本発明の方法に用いる装置の模式図、 第3図は従来の方法で形成した半導体結晶の構造を示す
断面図である。 図に於いて、 11はGaAs基板、12AはZnSe結晶層、12BはZnSe1-y Tey結
晶層、12CはZnSe1-wTew結晶層、12DはZnSe1-uiTeui結晶
層、12EはZnSe1-unTeun結晶層、13はZnCd結晶層、14はZ
nz Cd1-z Te結晶層、15はZns Cd1-s-tHgt Te結晶層、16
はHg1-x CdxTe結晶層、21は反応管、22は基板設置台、2
3,25,27,30,32,34はバルブ、23A,25A,27A,30A,32A,34A
はマスフローメータ、24はジメチル亜鉛収容容器、26は
ジメチルセレン収容容器、28は高周波コイル、29はジメ
チルテルル収容容器、31はジメチルカドミウム収容容
器、33は水銀収容容器を示す。FIG. 1 is a sectional view showing the structure of a semiconductor crystal formed by the method of the present invention, FIG. 2 is a schematic view of an apparatus used in the method of the present invention, and FIG. 3 is a structure of a semiconductor crystal formed by a conventional method. It is sectional drawing shown. In the figure, 11 is a GaAs substrate, 12A is a ZnSe crystal layer, 12B is a ZnSe 1-y Te y crystal layer, 12C is a ZnSe 1-w Te w crystal layer, 12D is a ZnSe 1-ui Te ui crystal layer, and 12E. Is ZnSe 1-un Te un crystal layer, 13 is ZnCd crystal layer, 14 is Z
n z Cd 1-z Te crystal layer, 15 is Zn s Cd 1-st Hg t Te crystal layer, 16
Is Hg 1-x Cd x Te crystal layer, 21 is a reaction tube, 22 is a substrate mount, 2
3,25,27,30,32,34 are valves, 23A, 25A, 27A, 30A, 32A, 34A
Is a mass flow meter, 24 is a dimethyl zinc container, 26 is a dimethyl selenium container, 28 is a high frequency coil, 29 is a dimethyl tellurium container, 31 is a dimethyl cadmium container, and 33 is a mercury container.
Claims (2)
レン・テルル〔Zn Se1-y Te y(0≦y<0.43)〕の結
晶層(12A〜12F)を組成を変動させて複数層積層形成
後、該基板上に亜鉛元素とセレン、カドミウム、テル
ル、水銀の元素のうちの少なくとも一元素を含む化合物
半導体結晶層(13,14,15)を複数層積層形成後、更に最
上層に水銀・カドミウム・テルル(16)よりなる化合物
半導体結晶層を積層形成するようにしたことを特徴とす
る化合物半導体結晶の製造方法。1. A plurality of crystal layers (12A to 12F) of zinc selenium tellurium [Zn Se 1-y Te y (0 ≦ y <0.43)] are preliminarily formed on a gallium arsenide substrate (11) by varying the composition. After forming a layer stack, a plurality of compound semiconductor crystal layers (13, 14, 15) containing zinc element and at least one element of selenium, cadmium, tellurium, and mercury are formed on the substrate, and then the uppermost layer. A method for producing a compound semiconductor crystal, characterized in that a compound semiconductor crystal layer made of mercury, cadmium, tellurium (16) is formed on the substrate.
鉛・セレン・テルル〔Zn Se1-y Te y(0≦y<0.4
3)〕の結晶層の厚さを、50Å〜〔680/(1+29y)〕Å
の範囲としたことを特徴とする特許請求の範囲第1項に
記載の化合物半導体結晶の製造方法。2. Zinc selenium tellurium [Zn Se 1-y Te y (0 ≦ y <0.4
3)] the crystal layer thickness is 50Å ~ [680 / (1 + 29y)] Å
The method for producing a compound semiconductor crystal according to claim 1, wherein
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2842487A JPH0752737B2 (en) | 1987-02-09 | 1987-02-09 | Method for producing compound semiconductor crystal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2842487A JPH0752737B2 (en) | 1987-02-09 | 1987-02-09 | Method for producing compound semiconductor crystal |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63194340A JPS63194340A (en) | 1988-08-11 |
| JPH0752737B2 true JPH0752737B2 (en) | 1995-06-05 |
Family
ID=12248275
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2842487A Expired - Lifetime JPH0752737B2 (en) | 1987-02-09 | 1987-02-09 | Method for producing compound semiconductor crystal |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0752737B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0245453A (en) * | 1988-08-05 | 1990-02-15 | Agency Of Ind Science & Technol | Method for concentrating aqueous solution of amino acid |
| US5242709A (en) * | 1989-10-05 | 1993-09-07 | Litton Systems, Inc. | Method for hardening zinc selenide and zinc sulfide |
| JP5926906B2 (en) * | 2011-08-31 | 2016-05-25 | Jx金属株式会社 | Manufacturing method of ZnTe thin film for terahertz band device |
-
1987
- 1987-02-09 JP JP2842487A patent/JPH0752737B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63194340A (en) | 1988-08-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Chichibu et al. | Band gap energies of bulk, thin-film, and epitaxial layers of CuInSe 2 and CuGaSe 2 | |
| US4088515A (en) | Method of making semiconductor superlattices free of misfit dislocations | |
| CN100382244C (en) | Buffer structure for modifying silicon substrate | |
| US11261537B2 (en) | III-V or II-VI compound semiconductor films on graphitic substrates | |
| EP0342937B1 (en) | Manufacturing a semiconductor wafer having a III-V group semiconductor compound layer on a silicon substrate | |
| Kuech et al. | Epitaxial growth of Ge on< 100> Si by a simple chemical vapor deposition technique | |
| Million et al. | Heteroepitaxy of CdTe on {211} Si substrates by molecular beam epitaxy | |
| Haidet et al. | Nucleation control and interface structure of rocksalt PbSe on (001) zincblende III-V surfaces | |
| Yokoyama et al. | Molecular beam epitaxial growth of ZnS on a (100)-oriented Si substrate | |
| Yoshikawa et al. | Growth and properties of CdS epitaxial layers by the close‐spaced technique | |
| Takamizu et al. | Direct correlation between the internal quantum efficiency and photoluminescence lifetime in undoped ZnO epilayers grown on Zn-polar ZnO substrates by plasma-assisted molecular beam epitaxy | |
| Schumann et al. | Epitaxial layers of CuInSe2 | |
| Belmoubarik | Barrier heights and strong fermi-level pinning at epitaxially grown ferromagnet/ZnO/metal Schottky Interfaces for opto-spintronics applications | |
| JPH0752737B2 (en) | Method for producing compound semiconductor crystal | |
| Stringfellow | Development and current status of organometallic vapor phase epitaxy | |
| Maleyre et al. | Growth of InN layers by MOVPE using different substrates | |
| US5204283A (en) | Method of growth II-VI semiconducting compounds | |
| Nanishi et al. | Plasma-excited MBE—Proposal and achievements through R&D of compound semiconductor materials and devices | |
| Hartmann | Vapour phase epitaxy of II–VI compounds: A review | |
| Wright et al. | The growth of ZnSe and other wide-bandgap II-VI semiconductors by MOCVD | |
| Tampo et al. | Strong photoluminescence emission from GaN on SrTiO3 | |
| JPH0722136B2 (en) | Method for producing compound semiconductor crystal | |
| Kim et al. | Pulsed laser deposition of high-quality ZnO films using a high temperature deposited ZnO buffer layer | |
| Shan et al. | Fabrication of ZnCdSe quantum dots under Stranski–Krastanow mode | |
| Szczerbakow et al. | Structure, surface morphology and optical properties of thin films of ZnS and CdS grown by atomic layer epitaxy |