JPH0754750B2 - Thin film EL device - Google Patents
Thin film EL deviceInfo
- Publication number
- JPH0754750B2 JPH0754750B2 JP1162138A JP16213889A JPH0754750B2 JP H0754750 B2 JPH0754750 B2 JP H0754750B2 JP 1162138 A JP1162138 A JP 1162138A JP 16213889 A JP16213889 A JP 16213889A JP H0754750 B2 JPH0754750 B2 JP H0754750B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- insulating layer
- sin
- thin film
- bonds
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Electroluminescent Light Sources (AREA)
Description
【発明の詳細な説明】 ＜産業上の利用分野＞ この発明は薄膜EL（エレクトロルミネッセンス）素子に
関し、より詳しくは、プラズマCVD（化学気相成長）法
により形成されたSiN:H膜を絶縁層の少なくとも一部に
有する薄膜EL素子に関する。TECHNICAL FIELD The present invention relates to a thin film EL (electroluminescence) device, and more particularly, to a SiN: H film formed by a plasma CVD (chemical vapor deposition) method as an insulating layer. To a thin film EL device having at least a part of
＜従来の技術＞ 従来の薄膜EL素子としては、例えば第６図に示すような
ものがある。この薄膜EL素子は、ガラス基板11上に、帯
状の透明電極12と、SiO2膜13およびSiN膜14からなる下
部絶縁層と、蒸着して形成された発光層15と、Si3N4膜1
6およびAl2O3膜17からなる上部絶縁層と、上記透明電極
12に直交する帯状の背面Al電極18とが順次積層された構
造をしている。<Prior Art> As a conventional thin film EL element, there is one as shown in FIG. 6, for example. This thin-film EL device comprises a glass substrate 11, a strip-shaped transparent electrode 12, a lower insulating layer composed of a SiO 2 film 13 and a SiN film 14, a light emitting layer 15 formed by vapor deposition, and a Si 3 N 4 film. 1
6 and the upper insulating layer consisting of the Al 2 O 3 film 17 and the transparent electrode
It has a structure in which a strip-shaped rear surface Al electrode 18 orthogonal to 12 is sequentially laminated.
そして、上記上部絶縁層および下部絶縁層はスパッタ法
により形成されている。The upper insulating layer and the lower insulating layer are formed by the sputtering method.
ところで、上記従来の薄膜EL素子は、スパッタ法により
上部絶縁層，下部絶縁層が形成されているため、成膜速
度が遅い、あるいは成膜面積がターゲットの大きさによ
って制限されるなど生産性が低いものである。そのた
め、最近、上部絶縁層，下部絶縁層を生産性が良いプラ
ズマCVD法により形成する試みが行われており、特に、E
L特性に影響が大きいSi3N4膜をSiH4ガスを原料として形
成する試みが行われている。By the way, in the above-mentioned conventional thin film EL element, since the upper insulating layer and the lower insulating layer are formed by the sputtering method, the film forming rate is slow, or the film forming area is limited by the size of the target, so that the productivity is low. It is low. Therefore, recently, an attempt has been made to form the upper insulating layer and the lower insulating layer by the plasma CVD method with high productivity.
Attempts have been made to form a Si 3 N 4 film, which has a large influence on the L characteristics, using SiH 4 gas as a raw material.
＜発明が解決しようとする課題＞ しかしながら、上記従来の薄膜EL素子は、プラズマCVD
法によって発光層15に接するSi3N4膜を形成する場合、
形成されたSi3N4膜（以下、「SiN:H膜」という）の膜質
に起因して発光開始電圧Vthがエージングによって移動
し、信頼性が良くないという問題がある。<Problems to be Solved by the Invention> However, the conventional thin film EL device described above is
When forming a Si 3 N 4 film in contact with the light emitting layer 15 by the method,
Due to the film quality of the formed Si 3 N 4 film (hereinafter referred to as “SiN: H film”), the light emission start voltage Vth moves due to aging, and there is a problem that reliability is not good.
そこで、この発明の目的は、Si3N4:H膜をプラズマCVD法
によって形成することによって生産性を高めると共に、
発光開始電圧Vthの移動を抑えた薄膜EL素子を提供する
ことにある。Therefore, an object of the present invention is to improve productivity by forming a Si 3 N 4 : H film by a plasma CVD method,
An object of the present invention is to provide a thin film EL element in which the shift of the light emission starting voltage Vth is suppressed.
＜課題を解決するための手段＞ この発明は、SiN:H膜中の単位体積当たりのN-H結合数が
上記エージングによる発光開始電圧移動量ΔVthと強い
相関を有するという本発明者による発見に基づいてなさ
れたものである。<Means for Solving the Problems> The present invention is based on the discovery by the present inventor that the number of NH bonds per unit volume in a SiN: H film has a strong correlation with the emission start voltage shift amount ΔVth due to the aging. It was made.
この発明は、発光層と、プラズマ化学気相成長法により
形成され発光層に接するSiN:H膜を上部絶縁層または下
部絶縁層の少なくとも一方に備えた薄膜EL素子におい
て、上記SiN:H膜中のN-H結合数が1.4×1022／cm3以下で
あることを特徴としている。This invention is a thin-film EL device having a light-emitting layer and a SiN: H film formed by plasma enhanced chemical vapor deposition and in contact with the light-emitting layer in at least one of the upper insulating layer and the lower insulating layer. Is characterized by having a number of NH bonds of 1.4 × 10 22 / cm 3 or less.
＜作用＞ プラズマCVDの基板温度，入力パワーおよび反応系ガス
圧などの諸条件を変化させて上部絶縁層および下部絶縁
層のSiN:H膜を形成した場合、第４図に示すように、Si
N:H膜中の単位体積当たりのN-H結合数とエージングによ
る発光開始電圧移動量ΔVthとは強い正の相関を示して
いる。したがって、単位体積当たりのN-H結合数を1.4×
1022／cm3以下に抑えることによって、発光開始電圧移
動量ΔVthが30V程度以下に抑制され、実用上支障がない
レベルに抑えられる。<Operation> When various conditions such as the substrate temperature of plasma CVD, input power and reaction system gas pressure are changed to form the SiN: H film of the upper insulating layer and the lower insulating layer, as shown in FIG.
The number of NH bonds per unit volume in the N: H film and the amount of emission start voltage shift ΔVth due to aging show a strong positive correlation. Therefore, the number of NH bonds per unit volume is 1.4 ×
By controlling to 10 22 / cm 3 or less, the light emission start voltage shift amount ΔVth can be suppressed to about 30 V or less, which can be suppressed to a level at which there is no practical problem.
＜実施例＞ 以下、この発明の薄膜EL素子を図示の実施例により詳細
に説明する。<Examples> Hereinafter, the thin film EL device of the present invention will be described in detail with reference to the illustrated examples.
第１図に示すように、この薄膜EL素子は、ガラス基板１
上に、帯状の透明電極２と、絶縁膜９と、プラズマCVD
法により形成されたSiN:H膜４と、発光層５と、プラズ
マCVD法により形成されたSiN:H膜６と、絶縁膜10と、上
記透明電極２に直交する帯状の背面Al電極８とを備えて
いる。上記絶縁膜９とSiN:H膜4,上記SiN:H膜６と絶縁膜
10はそれぞれ下部絶縁層，上部絶縁層を構成している。
絶縁膜9,絶縁膜10はそれぞれゾル−ゲル法などの生産性
の高い方法により形成されている。As shown in FIG. 1, this thin-film EL device has a glass substrate 1
On top of that, the strip-shaped transparent electrode 2, the insulating film 9 and the plasma CVD
SiN: H film 4 formed by the method, a light emitting layer 5, a SiN: H film 6 formed by a plasma CVD method, an insulating film 10, and a strip-shaped rear surface Al electrode 8 orthogonal to the transparent electrode 2. Is equipped with. Insulating film 9 and SiN: H film 4, SiN: H film 6 and insulating film
Reference numerals 10 form a lower insulating layer and an upper insulating layer, respectively.
The insulating films 9 and 10 are each formed by a highly productive method such as a sol-gel method.
上記SiN:H膜４および６を形成する際、原料ガスとしてS
iH4ガスとN2ガスを用いて、プラズマCVDの基板温度，入
力パワーおよび反応系ガス圧などの諸条件を変化させて
形成したところ、第４図に示したように、SiN:H膜中の
単位体積当たりのN-H結合数とエージングによる発光開
始電圧移動量ΔVthとが強い正の相関を示すことがわか
った。なお、第５図に示すように、Si-H結合数と発光開
始電圧移動量ΔVthとの間にはこのような相関はない。When forming the above SiN: H films 4 and 6, S is used as a source gas.
When iH 4 gas and N 2 gas were used to change the conditions of plasma CVD such as substrate temperature, input power and reaction system gas pressure, the film was formed, and as shown in FIG. It was found that the number of NH bonds per unit volume of and the emission start voltage shift ΔVth due to aging show a strong positive correlation. As shown in FIG. 5, there is no such correlation between the number of Si—H bonds and the light emission start voltage shift amount ΔVth.
したがって、第４図に示した相関から、上記SiN:H膜４
および６中のN-H結合数を1.4×1022／cm3以下にするこ
とによって、発光開始電圧移動量ΔVthを30V以下に抑制
することができる。また、好ましくはN-H結合数を0.8×
1022／cm3以下にすることによってΔVthを15V以下に抑
制することができる。Therefore, from the correlation shown in FIG. 4, the SiN: H film 4
By setting the number of NH bonds in and 6 to be 1.4 × 10 22 / cm 3 or less, the emission start voltage shift amount ΔVth can be suppressed to 30 V or less. Also, preferably the number of NH bonds is 0.8 ×
By making it 10 22 / cm 3 or less, ΔVth can be suppressed to 15 V or less.
なお、上記薄膜EL素子は、上記絶縁層および下部絶縁層
にSiN:H膜6,SiN:H膜４をそれぞれ備えたが、これに限ら
れるものではなく、第２図または第３図に示すように、
いずれか一方にのみ備えても良い。The thin-film EL device is provided with the SiN: H film 6 and the SiN: H film 4 in the insulating layer and the lower insulating layer, respectively, but the invention is not limited to this and is shown in FIG. 2 or FIG. like,
You may prepare for either one.
＜発明の効果＞ 以上より明らかなように、この発明はプラズマ化学気相
成長法により形成され発光層に接するSiN:H膜を上部絶
縁層または下部絶縁層の少なくとも一方に備えた薄膜EL
素子において、上記SiN:H膜中のN-H結合数が1.4×1022
／cm3以下であるので、生産性を高めると共に、発光開
始電圧Vthの移動を実用上支障がないレベルに抑えるこ
とができる。<Effects of the Invention> As is clear from the above, the present invention is a thin film EL device having a SiN: H film formed by plasma enhanced chemical vapor deposition and in contact with a light emitting layer on at least one of an upper insulating layer and a lower insulating layer.
In the device, the number of NH bonds in the SiN: H film is 1.4 × 10 22
Since it is / cm 3 or less, it is possible to improve the productivity and suppress the movement of the light emission start voltage Vth to a level that does not hinder practical use.
第１図，第２図，第３図はそれぞれこの発明の薄膜EL素
子の実施例を示す図、第４図，第５図はそれぞれ上記薄
膜EL素子の発光開始電圧移動量とN-H結合数,Si-H結合数
との相関を示す図、第６図は従来の薄膜EL素子を示す図
である。 １……透光性基板、２……透明電極、4,6……SiN:H膜、
５……発光層、８……背面電極、9,10……絶縁膜。1, 2 and 3 are diagrams showing an embodiment of the thin film EL device of the present invention, and FIGS. 4 and 5 are the emission start voltage shift amount and the number of NH bonds of the thin film EL device, respectively. FIG. 6 is a diagram showing the correlation with the number of Si—H bonds, and FIG. 6 is a diagram showing a conventional thin film EL device. 1 ... transparent substrate, 2 ... transparent electrode, 4,6 ... SiN: H film,
5 ... Emitting layer, 8 ... Back electrode, 9, 10 ... Insulating film.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 吉田 勝 大阪府大阪市阿倍野区長池町22番22号 シ ヤープ株式会社内 (56)参考文献 特開 昭61−188893（ＪＰ，Ａ) 特開 昭61−188891（ＪＰ，Ａ) 特開 昭62−170190（ＪＰ，Ａ) 特開 平１−225093（ＪＰ，Ａ) 特開 昭62−126592（ＪＰ，Ａ) 特開 昭62−170191（ＪＰ，Ａ) 特開 昭63−245890（ＪＰ，Ａ) 特開 昭63−245891（ＪＰ，Ａ) 特開 昭63−245893（ＪＰ，Ａ) ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Masaru Yoshida 22-22 Nagaike-cho, Abeno-ku, Osaka-shi, Osaka Within Sharp Corporation (56) References JP 61-188893 (JP, A) JP 61 -188891 (JP, A) JP-A-62-170190 (JP, A) JP-A 1-225093 (JP, A) JP-A 62-126592 (JP, A) JP-A-62-170191 (JP, A) ) JP-A-63-245890 (JP, A) JP-A-63-245891 (JP, A) JP-A-63-245893 (JP, A)
Claims (1)
光層に接するSiN:H膜を上部絶縁層または下部絶縁層の
少なくとも一方に備えた薄膜EL素子において、 上記SiN:H膜中のN-H結合数が1.4×1022／cm3以下である
ことを特徴とする薄膜EL素子。1. A thin film EL device comprising a SiN: H film formed by plasma enhanced chemical vapor deposition in contact with a light emitting layer in at least one of an upper insulating layer and a lower insulating layer, wherein the NH bond in the SiN: H film is A thin film EL device characterized in that the number is 1.4 × 10 22 / cm 3 or less.
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1162138A JPH0754750B2 (en) | 1989-06-23 | 1989-06-23 | Thin film EL device |
| DE19904042389 DE4042389C2 (en) | 1989-06-23 | 1990-06-22 | Thin film electroluminescent device |
| DE19904019988 DE4019988A1 (en) | 1989-06-23 | 1990-06-22 | Thin film electroluminescent display - consisting of luminescent layer between dielectric multilayers in which one multilayer is desired to improve voltage dependent properties |
| US07/769,752 US5264714A (en) | 1989-06-23 | 1991-10-03 | Thin-film electroluminescence device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1162138A JPH0754750B2 (en) | 1989-06-23 | 1989-06-23 | Thin film EL device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0329292A JPH0329292A (en) | 1991-02-07 |
| JPH0754750B2 true JPH0754750B2 (en) | 1995-06-07 |
Family
ID=15748762
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1162138A Expired - Lifetime JPH0754750B2 (en) | 1989-06-23 | 1989-06-23 | Thin film EL device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0754750B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101373805B (en) | 2008-10-17 | 2011-03-23 | 晶能光电（江西）有限公司 | LED chip with overvoltage protection structure |
-
1989
- 1989-06-23 JP JP1162138A patent/JPH0754750B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0329292A (en) | 1991-02-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5116640A (en) | Process for preparing an electroluminescent device | |
| JPH0754750B2 (en) | Thin film EL device | |
| US5539424A (en) | Thin-film electroluminescence display device | |
| JPH0752673B2 (en) | Thin film EL device | |
| JPH077713B2 (en) | Thin film EL device | |
| JPS6047718B2 (en) | Manufacturing method of thin film light emitting device | |
| JPH0628313B2 (en) | Semiconductor element | |
| Lee et al. | White-light emitting thin-film electroluminescent device using micromachined structure | |
| JPH04109589A (en) | Organic thin film electroluminescent element | |
| JP2614096B2 (en) | EL device | |
| JPS6315715B2 (en) | ||
| KR0164456B1 (en) | Blue Light Emitting Electroluminescent Device And Manufacturing Method Thereof | |
| JPH04133285A (en) | Manufacture of green light emitting thin film electroluminecence element | |
| KR960030748A (en) | White light-emitting electroluminescent device and manufacturing method thereof | |
| JPS60124394A (en) | Method of producing el panel | |
| JPS61211993A (en) | EL panel manufacturing method | |
| KR930015968A (en) | Structure and Manufacturing Method of Full Color Thin Film EL Devices | |
| JPS63291487A (en) | Switching element | |
| JPH02272087A (en) | Method for manufacturing thin film electroluminescent devices | |
| KR910007169A (en) | Thin film EL device and its manufacturing method | |
| JPH04167397A (en) | Manufacture of green luminous thin film el element | |
| JPH0632300B2 (en) | Method for manufacturing EL element | |
| JPH04112488A (en) | Manufacture of green light emitting thin film electroluminescence | |
| JPH01146289A (en) | Thin film el element | |
| JPH04169094A (en) | Manufacture of thin film electroluminescence element |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090607 Year of fee payment: 14 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100607 Year of fee payment: 15 |
|
| EXPY | Cancellation because of completion of term | ||
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100607 Year of fee payment: 15 |