JPH0754923B2 - Digital modulator - Google Patents

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention is used in digital communications. In particular, it relates to a signal error rate improvement technique.

[0002]

2. Description of the Related Art In a digital microwave radio communication system operated at sea or on a coast, radar spurious interference generated by ship radar or the like exists. When radar spurious interference (hereinafter referred to as radar interference) is superimposed on the radio signal, the effect appears as a burst error in the demodulated signal. That is, since the pulse duration of radar interference is longer than the one-symbol time used in the digital microwave communication system, one radar interference affects a continuous radio signal of several symbols to several tens of symbols, and as a result, a demodulated signal. Will result in consecutive bit errors (burst errors).

In the digital microwave radio communication system, an error correction system is used to prevent an error on the transmission line. In the error correction method, error correction is performed in frame units, and several bit errors within the error correction capability in one frame can be corrected. However, in a burst error in which bit errors are concentrated in one frame, a number of bit errors exceeding the correction capability occur, and the errors cannot be corrected. That is, the error caused by radar interference cannot be removed only by the error correction method.

To eliminate this radar interference, a bit interleave method is used. The bit interleaving method is a method of rearranging and rearranging data sequences on the transmitting side and the receiving side according to a specific rule. The interleave conversion procedure will be described with reference to FIGS. 2 and 3.
FIG. 2 is a diagram showing an interleave conversion procedure on the transmitting side. FIG. 3 is a diagram showing an interleave conversion procedure on the receiving side.

As shown in FIG. 2, on the transmitting side, an N-bit (N is a natural number of 2 or more) input signal string is set as one frame, and a signal sequence of M frames (M is a natural number of 2 or more) is written in a storage element. Put in. Next, the first bit of each frame is sequentially read from 1 to M, and the second to Nth bits of each frame are sequentially read from 1 to M. The above is the interleave conversion on the transmitting side, and the procedure for rearranging.

As shown in FIG. 3, the receiving side performs rearrangement reverse to that on the transmitting side. The first bit of each frame of the storage element is sequentially written from 1 to M, and the second to Nth bits are sequentially written from 1 to M. Next, each frame is sequentially read from 1 to N bits. The above is the interleave conversion on the receiving side, and the procedure for rearranging.

In this system, information is transmitted after rearrangement is first performed on the transmitting side. Burst errors concentrated on one frame on the transmission path can be distributed to a plurality of frames by performing rearrangement on the demodulation side.

Next, the relationship between interleave conversion and information error will be described with reference to FIG. FIG. 4 is a diagram showing positions of data strings and information errors. The input data shown in FIG. 4A is rearranged as shown in FIG. 4B by the interleave conversion. The converted signal is input to the modulator, modulated, and further transmitted by the transmitter. It is assumed that a continuous error of multiple bits occurs during this radio propagation section. This signal is received, demodulated and subjected to an interleaved inverse transform. As a result, the continuous error of a plurality of bits becomes an error dispersed in each frame as shown in FIG. As a result of the dispersion, if the number of errors is within the error correction capability, the error can be corrected by the error correction circuit following the interleaved inverse conversion circuit.

By using the bit interleaving method and the error correction method together in this way, it becomes possible to remove a burst error caused by radar interference or the like. For these bit interleaving methods, the 1992 IEICE Autumn National Convention B-329 "1 with bit interleaving function"
6QAM modulator / demodulator "(Kurokami et al.).

By the way, in a digital microwave radio line, a data synchronization channel signal (hereinafter referred to as DSC) for transmitting maintenance information such as line status to an information signal (main signal) to be transmitted.
Signal) is multiplexed and transmitted. The DSC signal is multiplexed on the I-th bit (I is a natural number of 1 or more and N or less) in the frame. A signal obtained by multiplexing the DSC signal with the information signal and performing error correction coding is input to the interleave converter.

Next, the conventional device will be described with reference to FIG. FIG. 5 is a block diagram of a conventional device. The multiplexer 11 combines the main data signal input to the main data signal input terminal 1 and the DSC signal input to the DSC signal input terminal 2.
To multiplex. This multiplexed signal is used as an error correction encoder 12
, The interleave converter 13 interleaves the output, and finally the output is used for the modulator 1
The modulated signal is created in step 4. This modulated signal is output from the output terminal 3.

In this way, the main data signal and the DSC signal are multiplexed and used. This DSC signal is generally used after being scrambled by a pseudo noise sequence (PN sequence). In a system that does not use the DSC signal, the DSC signal input terminal 2 is in the open state.
When the DSC signal input terminal 2 is in the released state, a continuous sequence fixed at 0 or 1 is input as the DSC signal.

[0013]

By the way, the modulator 14
The interleave-converted signal input to M is composed of M first bits, M second bits, ..., Nth frames in each frame.
The order is M bits. This also includes a portion in which M number of I-th bits in which the DSC signal is multiplexed are continuous.

This portion is a continuous sequence of M 0s or 1s when the DSC signal is not connected. Since such a continuous sequence has no randomness, an abnormality occurs in the spectrum of the modulated signal modulated by this sequence. That is, the effect of suppressing the carrier wave for modulation is weakened,
A carrier component that should not occur originally appears in the modulation spectrum.

A modulation spectrum in which carrier waves are not sufficiently suppressed will be described with reference to FIG. FIG. 6 is a diagram showing a modulation spectrum. f ₀ represents the carrier center frequency. FIG. 6A shows a normal modulation spectrum, and FIG. 6B shows a modulation spectrum in which a DSC signal is not connected to the DSC signal input terminal 2 and which is affected by a continuous sequence. It can be seen that the carrier wave component is not sufficiently suppressed.

The present invention has been made against such a background, and it is possible to eliminate the influence on the modulation spectrum due to the continuous sequence without inputting the continuous sequence exceeding the specified length into the modulation signal. It is an object to provide a digital modulator.

[0017]

According to the present invention, a main data signal input terminal to which a digital signal is input, a DSC signal input terminal to which a DSC signal is input, the main data signal and this DSC signal are multiplexed. Multiplexer, an error correction encoder that performs error correction coding on the output of this multiplexer, an interleave converter that interleaves the output of this error correction encoder, and the output of this interleave converter. And a modulator for controlling the digital modulator.

Here, a feature of the present invention is that a selector having the first selection input as the DSC signal is interposed between the DSC signal input terminal and the multiplexer, and the selector is A pseudo noise sequence generator connected to the second selection input and means for detecting a signal disconnection state of the DSC signal are provided, and the selector outputs the detection output of the detecting means in the disconnection state of the DSC signal. In some cases, it includes means for selecting the second selection input.

The pseudo noise sequence generator preferably includes PN sequence generation means.

[0020]

In order to prevent the continuous sequence from being input to the multiplexer for multiplexing the main data signal and the DSC signal,
When the signal is disconnected, the selector detects the DSC signal and the PN by means for detecting that the DSC signal is disconnected.
The sequence is switched and selected, and the PN sequence is input to the multiplexer instead of the DSC signal. The PN sequence is generated from a pseudo noise sequence generator.

This makes it possible to suppress the appearance of carrier components in the modulation spectrum without inputting a continuous sequence to the multiplexer.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The configuration of an embodiment of the present invention will be described with reference to FIG. FIG. 1 is a block diagram of an apparatus according to an embodiment of the present invention.

According to the present invention, a main data signal input terminal 1 to which a digital signal is inputted and a DS to which a DSC signal is inputted.
C signal input terminal 2, multiplexer 11 that multiplexes the main data signal and this DSC signal, error correction encoder 12 that performs error correction coding on the output of this multiplexer 11, and this error correction An interleave converter 13 for interleaving the output of the encoder 12, and an interleave converter 1
3 is a digital modulator including a modulator 14 that modulates the output of FIG.

Here, the feature of the present invention is that D
A selector 16 having the first selection input as the DSC signal is interposed between the SC signal input terminal 2 and the multiplexer 11,
A PN sequence generator 17 connected to the second selection input of the selector 16 and a signal disconnection detector 15 as means for detecting the signal disconnection state of the DSC signal are provided, and the selector 16 detects the signal disconnection. The detection output of the device 15 is the DSC
Means for selecting the second select input when the signal is disconnected.

Next, the operation of the apparatus of the present invention will be described. The DSC signal input from the DSC signal input terminal 2 is input to the selector 16 and the signal loss detector 15. The PN sequence generator 17 always outputs a PN sequence, and the signal thereof is input to the selector 16. The signal disconnection detector 15 detects whether or not a data signal is connected to the DSC signal input terminal 2 and outputs the result to the selector 16. The selector 16 selects the DSC signal while the DSC signal is input, based on the detection result of the signal disconnection detector 15, and outputs the PN sequence generator 17 while the DSC signal is not input. The PN signal is output to the multiplexer 11. The multiplexer 11 multiplexes the main data signal input to the terminal 1 and the signal input from the selector 16 and outputs the multiplexed signal to the encoder 12. The encoder 12 performs error correction encoding and outputs the signal to the interleave converter 13. The interleave converter 13 is an interleave converter (permutation).
And outputs the converted signal to the modulator 14. The modulator 14 modulates the input signal and outputs the modulated signal to the output terminal 3.

The signal break detector 15 is composed of a timer circuit using a shot multivibrator. The timer circuit detects the change point of the signal and detects NORMA during the time T1.
The circuit that outputs the L signal outputs the ALM signal if there is no change in the signal over the time T1. D scrambled using a J-stage (J is a natural number of 2 or more) PN sequence
Since the SC signal does not generate more than J consecutive sequences, if the time T1 is set to a time longer than the duration of the J DSC signals, NORMAL is always performed while the scrambled DSC signal is input. If it is not input, the ALM state can be detected.

The PN sequence generator 17 has K stages of PN sequences (K
Is a natural number less than or equal to J). Then, based on the signal from the signal loss detector 15, the selector 16 always outputs to the multiplexer 11 a signal whose longest continuous sequence does not exceed J. As a result, the multiplexer 11 does not multiplex the continuous sequence exceeding J.

[0028]

As described above, according to the present invention, the continuous sequence exceeding the specified length is not input to the modulation signal, and as a result, the influence of the continuous sequence on the modulation spectrum is eliminated.

[Brief description of drawings]

FIG. 1 is a block configuration diagram of an apparatus according to an embodiment of the present invention.

FIG. 2 is a diagram showing an interleave conversion procedure on the transmission side.

FIG. 3 is a diagram showing an interleave conversion procedure on the receiving side.

FIG. 4 is a diagram showing the positions of data strings and information errors.

FIG. 5 is a block diagram of a conventional device.

FIG. 6 is a diagram showing a modulation spectrum.

[Explanation of symbols]

 1 Main Data Signal Input Terminal 2 DSC Signal Input Terminal 3 Output Terminal 11 Multiplexer 12 Error Correction Encoder 13 Interleave Converter 14 Modulator 15 Signal Loss Detector 16 Selector 17 PN Sequence Generator

Claims (2)

[Claims] 1. A main data signal input terminal to which a digital signal is input and a D to which a data synchronization channel signal is input.
SC signal input terminal, multiplexer for multiplexing the main data signal and the data synchronization channel signal, error correction encoder for error correction encoding the output of the multiplexer, and error correction encoding In a digital modulator including an interleave converter for interleaving the output of the converter and a modulator for modulating the output of the interleave converter, a first selection is made between the DSC signal input terminal and the multiplexer. A selector having an input as the DSC signal is inserted, a pseudo noise sequence generator connected to a second selection input of the selector, and means for detecting a signal disconnection state of the DSC signal are provided. The detection output of this detecting means is D
A digital modulation apparatus comprising means for selecting the second selection input when the SC signal is in a disconnected state. 2. The digital modulator according to claim 1, wherein the pseudo noise sequence generator includes a PN sequence generating means.