JPH0756632B2 - Assembler instruction boundary error detection processing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (A) Technical Field of the Invention The present invention relates to an assembler instruction boundary error detection processing method, in particular, to translate an assembler instruction that provides a processing means for a computer into a machine language instruction that can be directly executed by the computer. The present invention relates to an assembler instruction boundary error detection processing method in which a usage error related to the boundary condition of an assembler instruction is detected and displayed on the assemble list.

(B) Conventional Technology and Problems Generally, a machine language instruction is composed of an instruction code indicating an instruction type and, for example, a register or an operand portion indicating data to be processed, and these are handled as binary code. When a human directly creates a program with machine language instructions, it requires a great deal of labor, so normally, there is a one-to-one correspondence between machine language instructions and character-coded assembler instructions are prepared. It is now possible to create machine language level programs. As a program that translates a program with assembler instructions into machine language,
A so-called assembler is prepared.

By the way, the types and functions of machine language instructions differ from computer to computer, and depending on the computer, the area in which the data to be processed exists must exist on a predetermined address boundary such as a 2-byte boundary in the memory. Some have machine language instructions with the requirement that they must be. If the computer executes the machine language instruction in an environment that violates this boundary condition, it causes a program interrupt and the execution becomes an error.

Conventionally, if there is an error in the usage of an assembler instruction corresponding to a machine language instruction having the above boundary condition, it must be translated into a machine language instruction by the assembler and the generated object must be actually run on a computer. I could not detect an error. Therefore, there has been a problem that a simple mistake may consume a great deal of time and labor.

(C) Purpose and Structure of the Invention The present invention solves the above problems and checks the use error of the assembler instruction corresponding to the machine language instruction having the boundary condition of the data area to be processed at the time of assembling. In this case, by outputting a warning display on the assemble list, it is possible to detect an error early and shorten the work time. Therefore, the assembler instruction boundary error detection processing method of the present invention is a processing device that fetches and executes a machine language instruction prepared in advance in the main storage device, and the address value of the data area to be processed is It has a machine language instruction on condition that it has a predetermined boundary value, and 1 in the machine language instruction
In a processor for translating a source program written in assembler instructions that are character-coded to correspond to a pair into machine language instructions, the source program written in the assembler instructions is converted into machine language instructions consisting of binary code. Regarding translation, regarding a boundary conditional instruction extraction unit that extracts conditional instructions for the processing data area, and a data area specified by an operand of the instruction extracted by the boundary conditional instruction extraction unit The boundary condition check part that checks the boundary condition and the instruction that is against the boundary condition detected by the boundary condition check part are the assembler instruction, the translated machine language instruction, and the translated object that are the translation target on the output list. A warning display section that displays a warning to the effect that boundary conditions are violated on the same line as the address where the specified machine language is placed. It is characterized in that withered.

Hereinafter, description will be given with reference to the drawings.

(D) Embodiment of the invention Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2 is an example of an instruction with boundary condition, Fig. 3 is a process explanatory diagram of an embodiment of the present invention, and Fig. 4 is the present invention. The explanatory view of the processing mode concerning is shown.

In the figure, 1 is a central processing unit (CPU), 2 is an input medium of a source program, 3 is an assembler, 4 is a label table, 5 is an object, a file, 6 is an assemble list, 7 is a label table creation unit, and 8 is A boundary condition instruction extraction unit, 9 is a boundary condition check unit, and 10 is a warning display unit.

The central processing unit 1 is a device that fetches and executes machine language instructions. The source program according to the assembler instruction is input to the assembler 3 by the input medium 2 such as a magnetic disk, a floppy disk, or a magnetic tape. The assembler 3 is composed of a group of instructions for performing so-called assembling, which is executed by the central processing unit 1 to change the group of assembler instructions given by the input medium 2 into a group of corresponding machine language instructions. is there. The label table 4 is a control table for storing a label name and information of its value in order to convert a label used in an assembler instruction into a value associated with an address. The machine language instruction group expanded by the assembler 3 is output as an object file 5 on a magnetic disk, for example. The assemble list 6 is an output list issued to, for example, a line printer in order to confirm the result of assembly.

The following processing units are provided in relation to the present invention. The other parts may be considered to be the same as the conventional ones, and thus the description thereof will be omitted. The label table creating unit 7 includes the label table 4
Of the label table 4 along with the position information indicated by the label in the analyzed assembler instruction.
It will be set to. Labels include absolute labels that do not relate to the position of the program and relative labels that depend on the position of the program. Boundary conditional instruction extractor 8
Among the machine language instructions resulting from the assembly, the instruction codes for which the read or write data area must be located at a predetermined address boundary of, for example, a 2-byte boundary for execution are sequentially compared. By doing so, the extraction processing is performed.

The boundary condition check unit 9 calculates the address of the operand of the instruction extracted by the boundary conditional instruction extraction unit 8 and checks whether the address of the operand is on the correct boundary. If it is detected that a boundary condition is violated and it is expected that a program exception will occur during execution, the warning display unit 10 is notified. The warning display unit 10 displays an error by a predetermined symbol or the like on the instruction line on the assemble list 6 when the assemble list 6 is output.

FIG. 2 shows an example of a boundary conditional instruction. The assembler instruction 20 is a load register instruction indicating that the data of the second operand should be loaded into the register indicated by the first operand. This instruction is expanded into a binary code like the machine language instruction 21, for example. This load register instruction causes an execution error if the address given by the sum of the value of the base register BR3 and the displacement ABC is not an even address.

The assembly 3 detects the above error early by processing, for example, as shown in FIG. First, each instruction is scanned, and it is determined by the processing 30 shown in FIG. 3 whether the instruction has an absolute label or a relative label. In the case of a relative label, the value of the label position is obtained by processing 31. The label value is the start address a of the program from the address b to which the label is attached.
It is obtained by subtracting the address. Next, in process 32, the label value is embedded in the label table 4. processing
According to the determination in 33, the processes 30 to 32 are repeated for each label until the process of creating the label table is completed.

Next, a boundary condition check is performed for each instruction. First, in process 34, it is determined whether the instruction currently focused on is an instruction with a halfword boundary condition. If the instruction is conditional, it is determined in step 35 whether the label value of the operand is on a half-word boundary or not.
Judgment is made by referring to. If the boundary condition is violated, a flag for displaying a warning is set and stored at the position of the instruction by processing 36. By the process 37, it is judged whether or not the analysis has been completed for all the instructions, and if not, similarly, for the next instruction,
The processes 34 to 36 are repeated.

Next, in outputting the assemble result, it is determined by processing 38 whether or not the warning display flag is turned on for each instruction. If it is turned on, the warning display data is set in the list / message edit area by processing 39. In process 40, it is determined whether or not the instruction is completed. If it is completed, process 41 outputs the assemble list 6.

FIG. 4 shows a specific assembler processing mode. In FIG. 4, reference numerals 4 and 6 correspond to those in FIG. 1, and 50 represents a source program.

Among the assembler instructions used in the source program 50, the ELM instruction is a pseudo instruction indicating the program name and the start of the source program. The EQU instruction is a label definition instruction. The LEA instruction is a load address instruction, the LRG instruction is a load register instruction, and the STRG instruction is a store register instruction. The DC instruction is a constant definition instruction, and the END instruction is an instruction indicating the end of the source program.

The label table creating unit creates the label table 4 for the source program 50 as shown in FIG.
The label name R0, XXX, YYY is an absolute label, and the value quoted by the label is an absolute label. Label names START and ENDID are relative labels, and each has a hexadecimal number of 0000 and 0.
014 is assigned.

On the other hand, the assemble list 6 as shown in FIG. 4 is generated and output. The address and the object code of the machine language instruction and the assembler instruction are
It is output for each line. Although the statement number and the like are actually output, they are omitted in the figure. In this example, the STRG instruction operand from address 0007 violates the half-word boundary condition. In such a case, a warning display 51 for boundary condition violation is displayed in the line of this STRG instruction. This allows the program writer to immediately find, correct, and reassemble the error without actually running the program.
Of course, if necessary, you can ignore the warning and continue working with the object.

(E) Effects of the Invention As described above, according to the present invention, an erroneous use of an assembler instruction having a boundary condition can be checked by looking at the assemble list, so that the assembly and debugging work time can be greatly reduced. You will be able to.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is an example of an instruction with boundary conditions, FIG. 3 is an explanatory view of processing of an embodiment of the present invention, and FIG. 4 is an explanatory view of a processing mode according to the present invention. Indicates. In the figure, 1 is a central processing unit (CPU), 2 is an input medium of a source program, 3 is an assembler, 4 is a label table, 5 is an object file, 6 is an assemble list, 7 is a label table creation unit, and 8 is A boundary condition instruction extraction unit, 9 is a boundary condition check unit, and 10 is a warning display unit.

Claims (1)

[Claims] 1. A processing device for fetching and executing a machine language instruction prepared in advance in a main storage device, provided that the address value of a data area to be processed has a predetermined boundary value. Has a machine language instruction to
In a processor for translating a source program written in assembler instructions that are character-coded so as to correspond to a pair into a machine language instruction, the source program written in the assembler instructions is
When translating into a machine language instruction consisting of a decimal code,
A boundary condition instruction extractor for extracting a conditional instruction for the processing data area, and a boundary condition for checking the boundary condition for the data area specified by the operand of the instruction extracted by the boundary condition instruction extractor For the check section and the instructions that violate the boundary conditions detected by the boundary condition check section, the assembler instruction, the translated machine language instruction, and the translated machine language on the output list are arranged. The assembler instruction boundary error detection processing method is characterized in that it has a warning display section that displays a warning to the effect that boundary conditions are violated on the same line as the address printing line.