JPH0756731B2 - Digital signal reproducing device - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a cueing operation in a digital signal reproducing apparatus for reproducing a voice or the like which is converted into digital and recorded on a recording medium.

2. Description of the Related Art In recent years, so-called digital audio technology for converting an analog signal such as a voice signal into a digital signal and recording / reproducing it has been remarkably developed. For example, a PCM processor using a VTR mechanism and a tape, a compact disk, and more recently, a rotary head type digital audio tape recorder (hereinafter referred to as R-DAT) has been released.

The R-DAT will be described below as an example.

The R-DAT samples an audio signal to generate a PCM signal, forms a diagonal track on the tape with a rotary head, and records it. In this case, not only the PCM signal but also the tracking servo signal (ATF signal) at the time of reproduction, and the track number (hereinafter referred to as PNO) that can be added to the time code or the beginning of the program, etc. .) And start signal (hereinafter referred to as S-ID) can be recorded in an area different from that of the PCM signal.

FIG. 5 is a diagram showing an R-DAT tape format.

In FIG. 5, the PCM signal is arranged at the center of the track, the ATF signal is provided on both sides of the PCM signal, and the subcode areas in which the subcode information is recorded are provided on both sides of the ATF signal. Of the subcode information, the PNO and S-ID are recorded for 9 seconds at the beginning of the required program by automatic recording by detecting silence between songs of the program or manual recording by artificial operation. On the other hand, when the program is cued, the tape is run at a high speed and the subcode information on the tape is read so that the desired program can be searched quickly.

FIG. 6 is a block diagram of a conventional R-DAT reproducing circuit.

In FIG. 6, 1 is a tape, 2 is a cylinder to which a magnetic head is attached, 3 is a reproducing circuit, a is a reproducing head output, b is a PCM signal output, and c is subcode information output.

The operation of the conventional R-DAT configured as described above will be described. The head attached to the cylinder 2 reads a reproduction signal from the track recorded on the magnetic tape 1 and outputs it as a reproduction head output a to the reproduction circuit 3. In the reproducing circuit 3, the reproducing head output a is subjected to amplification, demodulation, error correction, rearrangement, etc., and then the PCM signal output b.
And is returned to the original analog signal in a D / A converter (not shown). The subcode information output c is used for control during various search operations such as display and cueing.

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention However, in a device that uses a mechanism for driving a recording medium such as the R-DAT described above, when the stop mode is changed to the constant speed reproduction mode, the traveling speed of the recording medium becomes stable, It takes a while until the correct reproduction signal is output. So-called rise time is required. For example, in the case of R-DAT, the voice rising time from STOP to PLAY operation is about 1 to 2 seconds. In the case of conventional analog equipment, the rise time of the mechanism =
Although it was the voice rise time, in the case of a digital device, the running servo pull-in time, the error correction time for the reproduced signal, and the like must be added, and the time is not always constant. Therefore, especially in applications such as broadcasting equipment and professional equipment, you can quickly search for the desired song and find the beginning of the song by using the subcode, but if you want to perform the next playback operation with high accuracy, There were problems such as lacking or difficulty in replaying from a desired place, and inconsistent time from replay operation to start of program replay.

In view of the above problems, the present invention substantially improves the voice rise time while maintaining the high-speed search function using the subcode with a simple operation even when using a mechanism that requires a long time for the rise of constant speed reproduction. It is an object of the present invention to provide a digital signal reproducing device which can be shortened to a negligible level and can be confirmed and corrected in advance without driving a mechanism, by driving a voice rising point.

Means for Solving the Problems In order to achieve the above object, a digital signal reproducing apparatus of the present invention is divided into a certain number of blocks to form a block, a PCM signal to which a block address is added, and a program of this PCM signal. And a reproducing circuit for reproducing the subcode information indicating the start point of the recording medium from the recording medium, and if the subcode information is detected during the cueing operation of the program,
A first memory circuit for writing a PCM signal for a predetermined time, a second memory circuit for storing a block address value of the PCM signal corresponding to the subcode information, and a next memory circuit when a reproducing operation is performed next. Of the PCM signal written in the first memory circuit, reading was started from the PCM signal portion corresponding to the block address stored in the second memory, and the recording medium was completely shifted to the constant speed reproduction mode. After that, the writing of the newly reproduced PCM signal to the first memory is started, and the previously written PCM signal is written in advance at the time of the cueing operation.
A memory control circuit for controlling the first memory circuit so as to read the PCM signal newly written so that the block addresses are continuous following the reading of the PCM signal.

Further, by operating the first operation button, the PCM signal after the block address stored in the second memory circuit is read from the first memory circuit,
Further, the second operation button is operated to move the PCM signal reading start position from the first memory circuit.

With the above-described structure, the present invention writes the PCM signal near the desired subcode information in the first memory circuit at the time of the cueing operation, and the block address of the PCM signal corresponding to the subcode information is stored in the second memory. And remember
At the next constant-speed reproduction start, the PCM signal previously written in the first memory circuit is first read out, and the PCM reproduced from the reproduction circuit after the recording medium is completely shifted to the constant-speed reproduction mode.
By writing a signal to the first memory circuit and reading a pre-written PCM signal and then reading a newly written PCM signal so that the block addresses are continuous, a cue and a subsequent operation are performed by a simple operation. It is possible to shorten the substantial voice rise time during the playback operation to a negligible amount. Furthermore, by reading the PCM signal written in advance in the first memory,
It is possible to confirm (rehearse) the rising sound of the voice in advance without driving the recording medium, and it is possible to finely adjust the rising portion of the voice by changing the read start address from the first memory.

Embodiment A digital signal reproducing apparatus according to an embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a digital signal reproducing apparatus according to an embodiment of the present invention.

In FIG. 1, 1 is a magnetic tape, 2 is a cylinder, 3 is a reproducing circuit, a is a reproducing head output, b is a PCM signal output, and c is
Is the subcode information output, and the above is the same as the conventional example, and therefore the description is omitted here. 4 is a first memory circuit, 5 is a second memory circuit, 6 is a memory control circuit, 7 is a system controller (abbreviation of system controller) for controlling the system, 8 is a tape drive circuit, and d is the first memory. Circuit output, e is block address, f is block address value stored in second memory circuit, g is memory control signal, h is operation key input, i is tape drive command, j
Is the tape drive output.

The operation of the digital signal reproducing apparatus configured as described above will be described below with reference to FIGS. 1, 2, and 3.

FIG. 2 is a diagram showing the PCM signal written in the first memory circuit, the PCM signal reproduced from the magnetic tape, the block address corresponding to each, and the subcode information (S-ID) in this embodiment. FIG. 3 is a time chart showing the block address values of the PCM signals output from the reproducing circuit and the first memory circuit as time elapses from the start of the constant speed reproduction. In this example, one block address is added to the PCM signal for one second for simplicity.

Hereinafter, the steps of FIG. 2 will be described with reference to FIG.

(1) When the cue of the program is instructed by the operation key input h, the syscon 7 gives a high speed running command to the tape drive circuit 8 to move the tape to the vicinity of the specified program. When the designated subcode information c is detected, the tape is once rewound to a position several seconds before the subcode information recording start position.

(2) Next, the syscon 7 runs the magnetic tape 1 at a constant speed for a fixed time, and removes a portion of the PCM signal b reproduced by the reproducing circuit 3 near S-ID = 1 (the beginning of the program). Write to the first memory circuit 4. In this example, assuming that the S-ID is written from the block address value of 0 to 9 seconds, the PCM signal of 1 second before and 4 seconds after the block address value of -1 and 0 is used as a reference. Write to the memory circuit 4. Assume that the written address values of the memory area are 00 to 49. Further, the block address value corresponding to the recording start position of the S-ID is stored in the second memory circuit 5
Remember. In this example, 0 is stored.

(3) On the other hand, Syscon 7 uses the actual magnetic tape 1 as the S-ID.
The recording is stopped at a position ahead of the recording start position by a predetermined time, which is 1.5 seconds in this example.

(4) Next, when a reproducing operation is performed, the memory control circuit 6 starts from the memory address value 10 corresponding to the block address value f (= 0) stored in the second memory circuit 5.
Instruct to read PCM signal. The value of the block address corresponding to the sequentially read PCM signal d can be calculated in the memory control circuit 6 from the block address value f stored in the second memory circuit 5 and the number of words of the read PCM signal.

(5) At the same time, the system controller 7 instructs the tape drive circuit 8 to shift from the stopped state to the constant speed reproduction state. In this example, the rising time from the stop state to the complete transition to the constant speed reproduction state is set to 2 seconds.

(6) The read address of the first memory circuit 4 is at the 20th position one second after the constant speed reproduction is started. On the other hand, magnetic tape 1
Is still in the start-up transient state, and the PCM signal reproduced from the tape is still in the latter half of the block address value 1.

(7) The read address of the first memory circuit 4 is at the position of 30 after 2 seconds from the start of the constant speed reproduction. On the other hand, the tape is in a constant speed reproduction running state, and the reproduction circuit 3 outputs a stable PCM signal b from the latter half of the block address value 2. The memory control circuit 6 starts writing the newly reproduced PCM signal b from the used area of the first memory circuit 4, which is the address value 00 in this example.

(8) The read address is 40 and the write address is 10 in the first memory circuit 4 3 seconds after the constant speed reproduction is started.

(9) Four seconds after the constant speed reproduction was started, the read address ended the final address 49 of the first memory circuit 4, and the reading of all the pre-written PCM signals was completed. Finally, the block address value of the read PCM signal is 3. On the other hand, the write address value is 20. Therefore, following the read address value of 49, the start address of the memory area in which the PCM signal of the block address 4 consecutive to the block address value 3 is newly written, is changed to 13, in this example. By performing the above memory address control by the memory control circuit 6, the PCM signal read from the first memory circuit 4 can maintain continuity.

(10) The write address position and the read address position of the first memory circuit 4 are shown from 5 seconds to 8 seconds after the constant speed reproduction is started. In this example, the memory area is continuously circulated with a time difference of 0.7 seconds. As a result, subsequent reading of the PCM signal d can be realized.

In FIG. 3, the horizontal axis represents the elapsed time from the start of constant speed reproduction,
The vertical axis shows the block address of the PCM signal. In the figure, B is a block address value corresponding to the PCM signal b output from the reproducing circuit 3, and C is a block address value corresponding to the PCM signal d output from the first memory circuit 4. The condition in which the present invention is realized in FIG. 3 is when B is within the range of the shaded area, that is, when the condition of t _m > t _off + v _r * t _r > t _r is satisfied. is there. Here, t _m : Reproducible time of the first memory circuit t _r : Magnetic tape start time t _off : Magnetic tape stop position offset time v _r : Average tape speed at start (the magnetic tape speed during constant speed reproduction is set to 1 Yes.)

In this example, if t _m = 4, _tr = 2, v _r = 0.6, then 0.8 <t _off <
2.8, that is, the magnetic tape is 0.8 seconds ahead of the designated stop position
Stop at 2.8 seconds.

As described above, according to the present embodiment, the PCM is divided into a fixed number of blocks to form blocks and block addresses are added.
A reproduction circuit 3 for reproducing a signal and subcode information indicating the program start point of this PCM signal from a recording medium;
When the subcode information C is detected during the cueing operation of the program, the first memory circuit 4 for writing the PCM signal b in the vicinity thereof for a predetermined time and the block address of the PCM signal b corresponding to the subcode information C Second to store the value
Memory circuit 5 and the first when the reproduction operation is performed next.
Corresponding to the block address stored in the second memory circuit 5 among the PCM signals written in the memory circuit 4 of
After starting the reading from the PCM signal portion and completely shifting the recording medium to the constant speed reproduction mode, the writing of the newly reproduced PCM signal to the first memory circuit 4 is started, and the cue operation is performed in advance. By providing the memory control circuit 6 for controlling the first memory circuit 4 so as to read the newly written PCM signal so that the block addresses are continuous following the reading of the written PCM signal, In the reproduction operation after the cueing using the subcode information, it becomes possible to reduce the substantial voice rising time to a negligible level.

In the present embodiment, all the PCM signals previously written at the time of the cueing operation are read out, and then the process is shifted to the reading of the newly written PCM signals.
This is a block address and if it is continuous, it is not always necessary to read to the end. That is, newly written PCM
The write address of the first memory circuit 4 may be controlled so that the block address of the signal matches the block address value of the PCM signal that has been written in advance.

FIG. 4 is a block diagram showing another embodiment of the present invention.

In FIG. 4, 9 is a first operation button (hereinafter, referred to as a memory play button), 10 is a second operation button (hereinafter, referred to as a memory trim button), and other than that is shown in FIG. Since it is exactly the same, the description is omitted. The operation will be described below.
When the memory play button 9 is pressed in the state (2) of FIG. 2, the memory control circuit 6 causes the S-ID = 1 of the subcode information in the PCM signal written in the first memory circuit 4 to be detected.
, The PCM of block address value 0,1,2,3 in this example.
Read signals only. That is, it is possible to confirm in advance the voice rising sound at the time of the next reproduction without moving the magnetic tape drive system. In this example, the sound for 4 seconds can be confirmed.

Also, by pressing + (plus) or- (minus) of the memory trim button 10, the memory reproduction start position is moved. This allows fine adjustment of the voice rising sound. In the case of this example, there is an adjustment range of 1 second before and 2 seconds behind (the remaining 2 seconds are used during the rising control).

As described above, according to this embodiment, by operating the memory play button 9, the PCM that has been written in the first memory circuit 4 in advance.
By reading the signal, the rising sound of the voice can be confirmed in advance without driving the recording medium, the memory trim button 10 is operated, and the first memory circuit 4 is operated.
By changing the read start address from, it is possible to finely adjust the voice rising point.

Advantageous Effects of Invention As described above, the present invention divides a fixed number of blocks to form a block, and a PCM signal to which a block address is added,
If a sub-code information indicating the start point of the program of this PCM signal and a sub-code information is detected from the recording medium on the recording medium, and the sub-code information is detected during the cueing operation of the program, the PCM signal in the vicinity of the sub-code information for a certain time The first memory circuit to write, the second memory circuit to store the block address value of the PCM signal corresponding to the subcode information, and the first memory circuit to be written when the reproducing operation is performed next time.
Of the PCM signal, reading is started from the PCM signal portion corresponding to the block address stored in the second memory,
After the recording medium has completely transitioned to the constant speed playback mode, writing of the newly played PCM signal to the first memory is started, and the block address is read after reading the PCM signal previously written at the time of the cueing operation. By controlling the first memory circuit so as to read the newly written PCM signal so that the sequence is continuous, the sub-code information is used for the cue and the subsequent reproduction operation by a simple operation. It is possible to shorten the sound rise time to such an extent that it can be ignored.

Further, by reading the PCM signal from the first memory circuit by operating the first operation button, the rising sound of the voice can be confirmed in advance without driving the recording medium. At the same time, by moving the second operation button to move the reading start position of the PCM signal from the first memory circuit, it becomes possible to finely adjust the voice rising point. This is a great improvement in the functions of the professional-use digital audio equipment that requires a rising accuracy, and the effect is great.

[Brief description of drawings]

FIG. 1 is a block diagram of a digital signal reproducing apparatus according to an embodiment of the present invention, and FIG. 2 shows a PCM signal reproduced from a first memory circuit and a magnetic tape in FIG. 1 and a block address corresponding to each. FIG. 3 is a diagram showing the block address values of the PCM signal output from the reproducing circuit and the first memory circuit with the lapse of time from the start of the constant speed reproduction in FIG. 1, and FIG. FIG. 5 is a block diagram of a digital signal reproducing apparatus according to another embodiment of the present invention, FIG. 5 is a diagram showing an R-DAT tape format,
FIG. 6 is a block diagram of a conventional R-DAT reproducing circuit. 1 ... Magnetic tape, 2 ... Cylinder, 3 ... Playback circuit,
4 ... First memory circuit, 5 ... Second memory circuit, 6
...... Memory control circuit, 7 ...... syscon, 8 ...... tape drive circuit, 9 ...... first operation button, 10 ...... second operation button.

Claims (3)

[Claims] 1. A block is configured by being divided into a predetermined number,
A reproducing circuit for reproducing the PCM signal to which the block address is added and the subcode information indicating the program start point of the PCM signal from the recording medium, and the subcode information is detected during the cueing operation of the program. In this case, a first memory circuit for writing a PCM signal in the vicinity thereof for a certain period of time, a second memory circuit for storing a block address value of the PCM signal corresponding to the subcode information, and a reproducing operation are performed next. In this case, of the PCM signal written in the first memory circuit, the reading is started from the PCM signal portion corresponding to the block address stored in the second memory, and the recording medium is set to the constant speed reproduction mode. After completely moving to, the writing of the newly reproduced PCM signal to the first memory is started, and the reading of the PCM signal previously written at the time of the cueing operation is continued. Te, digital signal reproducing apparatus characterized by comprising: a memory control circuit, the controlling said first memory circuit to perform the reading of the newly written PCM signal as the block address are consecutive. 2. The PCM signal after the block address stored in the second memory circuit is read from the first memory circuit by operating the first operation button. Item 1. A digital signal reproducing device according to item 1. 3. A digital signal reproducing apparatus according to claim 2, wherein the start position for reading the PCM signal from the first memory circuit is moved by operating the second operation button.