JPH0756820B2 - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH0756820B2 JPH0756820B2 JP60232983A JP23298385A JPH0756820B2 JP H0756820 B2 JPH0756820 B2 JP H0756820B2 JP 60232983 A JP60232983 A JP 60232983A JP 23298385 A JP23298385 A JP 23298385A JP H0756820 B2 JPH0756820 B2 JP H0756820B2
- Authority
- JP
- Japan
- Prior art keywords
- plating
- lead pin
- hole
- hole portion
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Multi-Conductor Connections (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
Description
【発明の詳細な説明】 (産業上の利用分野) 本発明はチップオンボードに多数のリードピンを挿着し
てなる半導体装置に関し、さらに詳しくは、リードピン
を挿着する透孔の内面にメッキ処理を施してスルホール
部を形成すると共に、リードピンにおける頭頂部下方に
は前記スルホール部内周に係合して該リードピンをかし
め固定する係止部を備えた半導体装置に関するものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which a large number of lead pins are mounted on a chip on board, and more specifically, a plating treatment is performed on the inner surface of a through hole into which the lead pins are mounted. The present invention relates to a semiconductor device in which a through hole is formed by forming a through hole, and a locking portion which engages with the inner circumference of the through hole and caulks and fixes the lead pin is provided below the top of the lead pin.
(従来の技術とその問題点) 従来、チップオンボードに多数のリードピンを挿着した
半導体装置として、実開昭50−62054号に記載されるも
のが知られている。(Prior Art and Problems Thereof) A semiconductor device described in Japanese Utility Model Publication No. 50-62054 is conventionally known as a semiconductor device in which a large number of lead pins are attached to a chip on board.
この半導体装置は、セラミック素材の基板表面に回路を
形成すると共に、その回路に接続させて開穿した透孔に
リードピンを挿着する、所謂ノンスルホールタイプのも
ので、前記リードピンの頭頂部近傍にほぼ逆三角形状の
偏平薄肉な係止部(凸部)を形成し、その係止部を透孔
内に圧入せしめてリードピンをかしめ固定した後、リー
ドピンの頭頂部と回路とを導電塗料で接続するようにな
っている。This semiconductor device is a so-called non-through hole type in which a circuit is formed on the surface of a substrate made of a ceramic material, and a lead pin is inserted into a through hole which is connected to the circuit and which is located near the top of the lead pin. Form a flat and thin locking part (convex part) with an almost inverted triangle shape, press the locking part into the through hole and crimp the lead pin, then connect the top part of the lead pin and the circuit with conductive paint It is supposed to do.
このような構成からなる従来の半導体装置においては、
基板がセラミック素材であることから回路形成に複雑な
工程が必要であり、さらにはリードピンと回路の接続に
導電塗料を塗布する後工程を要すること等から、作業が
面倒で且つ製造コストが高くなる等の欠点があった。In the conventional semiconductor device having such a configuration,
Since the substrate is a ceramic material, a complicated process is required to form the circuit, and a post process to apply the conductive paint to the connection between the lead pin and the circuit is required, which makes the work troublesome and increases the manufacturing cost. There were drawbacks such as.
(発明が解決しようとする課題) 上記従来の欠点を解消するためには、基板を有機材料
(樹脂材料)で形成すると共に、その基板に開穿した透
孔の内面を、基板表面の回路に接続せしめてメッキ処理
することでスルホール部を形成し、該スルホール部内に
上記係止部を圧入せしめてリードピンをかしめ固定する
ことが考えられる。(Problems to be Solved by the Invention) In order to solve the above conventional drawbacks, the substrate is formed of an organic material (resin material), and the inner surface of the through hole opened in the substrate is used as a circuit on the substrate surface. It is conceivable that the through-hole portion is formed by connecting and plating, and the locking portion is press-fitted into the through-hole portion to caulk and fix the lead pin.
このような構成を採用した場合、基板表面への回路形成
が容易であると共に、リードピンをスルホール部へ挿入
するだけで該リードピンと回路の接続がなされる利点が
あるものの、上記係止部の側縁部分に存在する角部分に
よってスルホール部内のメッキ層が損傷し、導通不良を
引起こす虞れがあった。When such a configuration is adopted, there is an advantage that the circuit can be easily formed on the surface of the substrate and the lead pin and the circuit are connected only by inserting the lead pin into the through hole portion, but the side of the locking portion There is a possibility that the corner portion existing at the edge portion may damage the plated layer in the through-hole portion and cause conduction failure.
前記不具合を解決するために、リードピンに設ける係止
部をその側縁部分が角部を備えない形状(例えば実願昭
59−98998号に図示されるような略半円形状)とするこ
とも考えられる。しかしながらこの場合、リードピンの
確実なかしめ固定を実現するには係止部の突出幅を従来
より大きくする必要があるので、該係止部の圧入に際す
るスルホール部の損傷防止を完全に達成できるとはいい
難い物であった。In order to solve the above-mentioned problems, the locking portion provided on the lead pin has a shape in which a side edge portion thereof does not have a corner portion (for example, Japanese Utility Model Publication No.
It is also conceivable to have a substantially semicircular shape as shown in No. 59-98998). However, in this case, since the protrusion width of the locking portion needs to be larger than that of the conventional one in order to securely fix the lead pin by caulking, it is possible to completely achieve the prevention of damage to the through hole portion when the locking portion is press-fitted. Was a difficult thing to say.
又、スルホール部内周面に例えばNi等の表面メッキを施
して損傷防止を図ることも考えられるが、たんにNiメッ
キ等からなる表面層を形成するだけでは、半導体装置の
作動に伴う熱ショックによって表面層にクラックが発生
し易くなり、使用に適さない。It is also possible to prevent the damage by plating the inner surface of the through hole with Ni or the like, but it is only necessary to form the surface layer made of Ni plating or the like to prevent the heat shock due to the operation of the semiconductor device. The surface layer is apt to crack and is not suitable for use.
本発明はこのような従来事情に鑑みてなされたものであ
り、その目的とする処は、有機材料製の基板を用いて基
板表面への回路形成を容易とし、他方、その基板に開穿
した透孔内面をメッキ処理してスルホール部を形成する
と共にリードピンにはスルホール部内周に係合する係止
部を設けて、リードピンを挿入するだけで同リードピン
と回路との接続がなされるようにする半導体装置におい
て、前記係止部をスルホール部へ挿入する際に生じるス
ルホール部内面(メッキ層)の損傷を防いで、複雑な工
程を必要とせず低コストで製造でき、且つ信頼性の高い
半導体装置を提供することにある。The present invention has been made in view of such conventional circumstances, and an object of the present invention is to facilitate the formation of a circuit on the surface of a substrate by using a substrate made of an organic material, and to open the substrate. The through hole inner surface is plated to form a through hole portion, and the lead pin is provided with a locking portion that engages with the inner circumference of the through hole portion so that the lead pin and the circuit can be connected simply by inserting the lead pin. In the semiconductor device, the inner surface (plating layer) of the through hole portion is prevented from being damaged when the locking portion is inserted into the through hole portion, the semiconductor device can be manufactured at low cost without requiring complicated steps, and is highly reliable. To provide.
(課題を達成するための手段) 上記目的を達成するために本発明の半導体装置は、有機
材料からなるチップオンボードに多数のスルホール部を
形成すると共に、各スルホール部には下端側から挿入す
る脚杆部と、該脚杆部上端に形成されスルホール部口縁
に係合する頭頂部と、該頭頂部下方に形成される偏平薄
肉な係止部とからなるリードピンを挿着してなり、前記
スルホール部がCuメッキからなる回路層の表面にNiメッ
キからなる厚メッキ保護層を積層せしめて形成されると
共に、上記リードピンにおける係止部を、スルホール部
内径よりやや大きな突出幅と上記脚杆部径より小さな厚
みを備え、且つスルホール部内周に圧接する側縁面部を
緩やかな円弧形状とする偏平薄肉状とし、上記係止部を
スルホール部内へ圧入して前記側縁面部の突出方向頂点
部位をスルホール部内面に圧接せしめてリードピンをか
しめ固定したことを特徴とする。(Means for Achieving the Object) In order to achieve the above object, in the semiconductor device of the present invention, a large number of through holes are formed in a chip-on-board made of an organic material, and each through hole is inserted from the lower end side. A lead pin comprising a leg rod portion, a crown portion formed at an upper end of the leg rod portion and engaging with an edge of a through hole portion, and a flat thin-walled locking portion formed below the crown portion are inserted and attached. The through hole portion is formed by laminating a thick plating protective layer made of Ni plating on the surface of a circuit layer made of Cu plating, and the locking portion of the lead pin has a protrusion width slightly larger than the inner diameter of the through hole portion and the leg rod. With a thickness smaller than the part diameter, and the side edge surface portion that comes into pressure contact with the inner periphery of the through hole portion has a flat thin shape with a gentle arc shape, the locking portion is press-fit into the through hole portion, and the side edge surface portion Allowed pressure direction vertices site through hole inner surface exits, characterized in that riveted lead pins with.
また後述の理由から、上記スルホール部におけるNiメッ
キ層の表面に半田とのぬれ性の良い金属メッキを積層せ
しめると共に、リードピンの表面にSnメッキを施すここ
とが有用である。In addition, for the reason described below, it is useful to stack a metal plating having good wettability with solder on the surface of the Ni plating layer in the through hole portion and to perform Sn plating on the surface of the lead pin.
(作 用) 以上の構成によれば、チップオンボード(即ち、基板)
を有機材料で成形することから、該ボードへの回路形成
やスルホール部用の下穴開穿が容易に行える。また、リ
ードピンに偏平薄肉状の係止部を設けたことから、リー
ドピンをスルホール部へ挿入(圧入)するだけで該リー
ドピンと回路の接続が行える。(Operation) According to the above configuration, the chip on board (that is, the substrate)
Since it is formed of an organic material, it is possible to easily form a circuit on the board and open a prepared hole for a through hole. Further, since the lead pin is provided with the flat and thin locking portion, the lead pin and the circuit can be connected only by inserting (press-fitting) the lead pin into the through hole portion.
加えて、その係止部の側縁面部をスルホール部内周を損
傷する虞れの少ない緩やかな円弧形状とすると同時に、
Niメッキからなる保護層によってCuメッキからなる回路
層を保護しつつリードピン圧入時の滑りを良くして、係
止部の圧入に際するスルホール部の損傷防止をほぼ完全
に達成する。In addition, the side edge surface of the locking portion is formed into a gentle arc shape that is less likely to damage the inner circumference of the through hole portion, and at the same time,
The protective layer made of Ni plating protects the circuit layer made of Cu plating and improves slippage when the lead pin is press-fitted, and almost completely prevents damage to the through hole when press-fitting the locking portion.
また前記Niメッキからなる保護層を厚メッキ層とするこ
とで、半導体装置の作動に伴う熱ショックにより該保護
層に生じるクラックの発生を最小のものとし、且つ係止
部にかかるかしめ固定力を向上せしめてリードピンの固
着を確実ならしめる。In addition, by forming the protective layer made of the Ni plating as a thick plated layer, the occurrence of cracks in the protective layer due to the heat shock associated with the operation of the semiconductor device is minimized, and the caulking fixing force applied to the locking portion is reduced. Make sure to improve the lead pin firmly.
さらに、上記Niメッキ層表面に半田とのぬれ性の良い金
属メッキを積層せしめると共にリードピン表面にSnメッ
キを施した場合は、リードピン圧入時の滑りが向上する
ことに加えて、リードピン固定後にスルホール部回りを
半田付けしてその固着をより確実にする際の半田付着性
が向上する。Furthermore, when a metal plating with good wettability with solder is laminated on the surface of the Ni plating layer and Sn plating is applied to the lead pin surface, slippage at the time of press-fitting the lead pin is improved and the through hole portion is fixed after fixing the lead pin. Solder adhesion at the time of soldering the periphery and making the fixation more reliable is improved.
(実 施 例) 以下、本発明の一実施例を図面により説明する。(Example) Hereinafter, one example of the present invention will be described with reference to the drawings.
図中(A)はプラスチック,ガラスエポキシ樹脂等の有
機材料で1mmの厚さに形成されたチップオンボードであ
り、(B)は該チップオンボード(A)のスルホール部
(1)に強制圧入されたリードピンである。In the figure, (A) is a chip-on-board formed with an organic material such as plastic or glass epoxy resin to a thickness of 1 mm, and (B) is forcedly pressed into the through-hole portion (1) of the chip-on-board (A). It is a lead pin
チップオンボード(A)の表面には通常の方法で回路
(不図示)を形成する。またチップオンボード(A)の
適宜複数箇所には平面形状が円形で孔径が0.6mmの下孔
(1a)を貫通開穿し、夫々の下孔(1a)の内面には前記
回路に導通せしめてCuメッキ(1b)12〜13μを施して回
路層を形成すると共に、その表面にNiメッキ(1c)12〜
13μを施して厚メッキ保護層を形成し、さらにその表面
に半田とのぬれ性の良い金属メッキ、即ちAuメッキ(1
d)1μを施こしてスルホール部(1)が形成される。A circuit (not shown) is formed on the surface of the chip on board (A) by a usual method. Also, at appropriate points on the chip-on-board (A), through holes are drilled through the pilot holes (1a) with a circular planar shape and a hole diameter of 0.6 mm, and the circuits are connected to the inner surface of each pilot hole (1a). Cu plating (1b) 12 to 13μ to form the circuit layer, and Ni plating (1c) 12 to
13μ is applied to form a thick plating protective layer, and the surface of the metal plating has good wettability with solder, namely Au plating (1
d) 1 μ is applied to form the through hole portion (1).
リードピン(B)は鉄とニッケルの合金を素材として表
面にSnメッキ(5)を施したもので、上記スルホール部
(1)の内径よりも小径な脚杆部(2)の上端に、スル
ホール部(1)の内径よりも大径な円板状の頭頂部
(3)を一体的に突出形成する。The lead pin (B) is made of an alloy of iron and nickel and is Sn-plated (5) on the surface. The lead pin (B) has a smaller diameter than the inner diameter of the through hole (1) above the upper end of the rod (2). A disk-shaped crown (3) having a diameter larger than the inner diameter of (1) is integrally formed.
上記脚杆部(2)は、リードピン(B)をスルホール部
(1)に挿着した状態においてチップオンボード(A)
下方へ適宜量突出する長さとする。また、脚杆部(2)
における頭頂部(3)の下方には、スルホール部(1)
内周に係合する偏平薄肉な円形突出形状の係止部(4)
が形成される。The leg rod (2) is mounted on the chip-on-board (A) when the lead pin (B) is attached to the through hole (1).
The length should be appropriate to project downward. Also, the leg rod (2)
Below the parietal region (3), the through hole (1)
Flat and thin circular protrusion-shaped engaging part that engages with the inner circumference (4)
Is formed.
係止部(4)はスルホール部(1)内径よりやや大きな
突出幅(x)と、脚杆部(2)径より小さな厚み(y)
を備え、且つスルホール部(1)内周に圧接する側縁面
部(4a)を緩やかな円弧形状とする偏平薄肉形状に形成
され、スルホール部(1)内へ圧入されることで前記側
縁面部(4a)の突出方向頂点部位(4b)をスルホール部
(1)内面に圧接せしめ、これによりスルホール部
(1)内に挿入したリードピン(B)が強固にかしめ固
定される。The locking part (4) has a projection width (x) slightly larger than the inner diameter of the through hole part (1) and a thickness (y) smaller than the diameter of the leg rod part (2).
And is formed into a flat thin-walled shape having a gentle arc shape on the side edge surface portion (4a) pressed against the inner periphery of the through hole portion (1), and the side edge surface portion is press-fitted into the through hole portion (1). The apex portion (4b) of the protruding direction (4a) is pressed against the inner surface of the through hole portion (1), whereby the lead pin (B) inserted into the through hole portion (1) is firmly caulked and fixed.
上記係止部(4)のより具体的な寸法を挙げれば、突出
幅(x)は約0.65〜0.75mm、厚み(y)が0.18〜0.22mm
の範囲内で、さらにその最適値は突出幅(x)が0.7m
m、厚み(y)が0.2mmである。To give more specific dimensions of the locking portion (4), the protrusion width (x) is about 0.65 to 0.75 mm, and the thickness (y) is 0.18 to 0.22 mm.
Within the range, the optimum value is 0.7m for the protrusion width (x).
m, thickness (y) is 0.2 mm.
而して、リードピン(B)をその下端側からスルホール
部(1)内に挿入し、且つ係止部(4)をスルホール部
(1)内に強制的に圧入すれば、リードピン(B)をス
ルホール部(1)内に確実にかしめ固定しながらボード
(A)表面の回路に接続させる。Then, if the lead pin (B) is inserted into the through hole portion (1) from the lower end side and the locking portion (4) is forcibly pressed into the through hole portion (1), the lead pin (B) is removed. While firmly crimping and fixing in the through-hole portion (1), connect to the circuit on the surface of the board (A).
またこの時、係止部(4)の側縁面部(4a)が緩やかな
円弧形状であると同時に、Niメッキ(1c)からなる保護
層がCuメッキ(1b)層を保護しつつ係止部(4)圧入時
の滑りを良くして、係止部(4)の圧入に際するスルホ
ール部(1)の損傷をほぼ完全に防止できる。また、Ni
メッキ(1c)からなる保護層が12〜13μ程度の厚メッキ
層であることから、半導体装置の作動に伴う熱ショック
により該保護層に生じるクラックの発生を最小のものと
し、且つ係止部(4)にかかるかしめ固定力をさらに向
上せしめてリードピン(B)の固着をより確実ならしめ
る。Further, at this time, the side edge surface portion (4a) of the locking portion (4) has a gentle arc shape, and at the same time, the protective layer made of Ni plating (1c) protects the Cu plating (1b) layer and the locking portion. (4) Sliding at the time of press fitting can be improved, and damage to the through hole portion (1) at the time of press fitting of the locking portion (4) can be almost completely prevented. Also, Ni
Since the protective layer composed of the plating (1c) is a thick plated layer of about 12 to 13 μ, the generation of cracks in the protective layer due to the heat shock accompanying the operation of the semiconductor device is minimized, and the locking portion ( 4) The caulking fixing force applied to 4) is further improved to more securely fix the lead pin (B).
さらに、上記Niメッキ(1c)表面に半田とのぬれ性の良
いAuメッキ(1d)を積層せしめると共にリードピン
(B)表面にSnメッキ(5)を施したことから、係止部
(4)圧入時の滑りが向上することに加えて、リードピ
ン(B)固定後にスルホール部(1)回りを半田付けす
る際の半田付着性が向上する。Furthermore, since the Au plating (1d) having good wettability with solder is laminated on the Ni plating (1c) surface and the Sn plating (5) is applied to the lead pin (B) surface, the locking portion (4) is press-fitted. In addition to the improvement of the slippage at the time, the solder adhesion at the time of soldering around the through hole portion (1) after fixing the lead pin (B) is improved.
上記半田付けは、係止部(4)によりかしめ固定された
リードピン(B)の支持、並びにそのリードピン(B)
とスルホール部(1),回路との導通をより確実にする
ためのもので、リードピン(B)をかしめ固定した後に
ボード(A)下面側を半田液に浸漬することにより、ス
ルホール部(1)内面とリードピン(B)との間の隙間
(6)に生じる毛細管現象により半田液が上昇して頭頂
部(3)を被覆すると共に隙間(6)内に充填されて、
リードピン(B)の固着を確実にする。The soldering is performed by supporting the lead pin (B) fixed by crimping by the locking portion (4) and the lead pin (B).
And the through hole portion (1) for more reliable electrical connection with the circuit. After the lead pin (B) is caulked and fixed, the lower surface side of the board (A) is dipped in a solder solution to form the through hole portion (1). Capillary phenomenon that occurs in the gap (6) between the inner surface and the lead pin (B) causes the solder liquid to rise to cover the crown (3) and fill the gap (6).
Make sure that the lead pin (B) is firmly fixed.
(発明の効果) 本発明の半導体装置は以上説明した様に、チップオンボ
ード(即ち、基板)が有機材からなるので、該ボードへ
の回路形成やスルホール部用の下穴開穿が容易に行え
る。また、基板にスルホール部を形成すると共に、リー
ドピンに偏平薄肉状の係止部を設けたことから、リード
ピンをスルホール部へ挿入(圧入)するだけで該リード
ピンと回路の接続が行える。(Effect of the Invention) As described above, in the semiconductor device of the present invention, since the chip-on-board (that is, the substrate) is made of an organic material, it is easy to form a circuit on the board and to open a prepared hole for a through hole. You can do it. Further, since the through hole portion is formed on the substrate and the flat and thin locking portion is provided on the lead pin, the lead pin and the circuit can be connected only by inserting (press-fitting) the lead pin into the through hole portion.
加えて、その係止部の側縁面部を緩やかな円弧形状とす
ると同時に、Niメッキ層によってCuメッキからなる回路
層を保護しつつリードピン圧入時の滑りを良くして、係
止部の圧入に際するスルホール部の損傷をほぼ完全に防
止する。In addition, the side edge surface of the locking part has a gentle arc shape, and at the same time, the Ni plating layer protects the circuit layer made of Cu plating to improve the sliding when the lead pin is press-fitted and press-fit the locking part. Prevents damage to the through hole part almost completely.
また、前記Niメッキからなる保護層を厚メッキ層とする
ことで、半導体装置の作動に伴う熱ショックにより該保
護層に生じるクラックの発生を最小のものとし、且つ係
止部にかかるかしめ固定力を向上せしめてリードピンの
固着をより確実ならしめる。Further, by forming the protective layer made of Ni plating as a thick plated layer, the generation of cracks in the protective layer due to the heat shock accompanying the operation of the semiconductor device is minimized, and the caulking fixing force applied to the locking portion is minimized. To improve the reliability of lead pin fixation.
よって、複雑な工程を必要とすることなく簡単な作業及
び低コストにて製造が可能であり、且つ、リードピンの
回路の接続も極めて確実になされる信頼性の高い半導体
装置を提供し得た。Therefore, it is possible to provide a highly reliable semiconductor device which can be manufactured by a simple operation and low cost without requiring a complicated process and in which the connection of the circuit of the lead pin is extremely surely performed.
また、スルホール部最表層に半田とのぬれ性の良い金属
メッキを施しリードピン表面にSnメッキを施した場合
は、リードピン圧入時の滑りをより向上せしめて前述の
効果をさらに実効あるものとし得、しかもリードピン固
定後にスルホール部回りを半田付けする場合の半田付着
性を向上し得る等、多くの効果を奏する。Further, if the outermost surface layer of the through-hole portion is plated with a metal having good wettability with solder and the lead pin surface is plated with Sn, it is possible to further improve the slippage at the time of press-fitting the lead pin and further enhance the above-mentioned effect. In addition, there are many effects such as improving the solder adhesiveness when soldering around the through hole portion after fixing the lead pin.
図面は本発明に係る半導体装置の一実施例を示し、第1
図はリードピンをかしめ固定したスルホール部の断面
図、第2図は第1図の側面断面図、第3図は第1図のII
I−III線断面図である。 尚、図中、(A)……チップオンボード、(B)……リ
ードピン、(1)……スルホール部、(1b)……Cuメッ
キ、(1c)……Niメッキ、(1d)……Auメッキ、(2)
……脚杆部、(3)……頭頂部、(4)……係止部、
(4a)……側縁面部、(4b)……頂点部位、(5)……
Snメッキ、(6)……隙間 を夫々示す。The drawings show an embodiment of a semiconductor device according to the present invention.
The figure is a cross-sectional view of the through hole where the lead pin is caulked and fixed, Fig. 2 is a side cross-sectional view of Fig. 1, and Fig. 3 is II of Fig. 1.
It is a sectional view taken along the line I-III. In the figure, (A) …… chip on board, (B) …… lead pin, (1) …… through hole, (1b) …… Cu plating, (1c) …… Ni plating, (1d) …… Au plating, (2)
…… Legs, (3) …… Parietal, (4) …… Locking part,
(4a) …… side edge surface part, (4b) …… apex part, (5) ……
Sn plating, (6) ... shows gaps, respectively.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 窪川 厚志 東京都三鷹市下連雀8−5―1 田中電子 工業株式会社三鷹工場内 (56)参考文献 実開 昭50−62054(JP,U) 実開 昭51−103649(JP,U) 実開 昭53−37076(JP,U) ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Atsushi Kubokawa 8-5-1 Shimorenjaku, Mitaka City, Tokyo Inside the Mitaka Factory of Tanaka Electronic Industry Co., Ltd. (56) References Showa 50-62054 (JP, U) Showa Showa 51-103649 (JP, U) Actually opened Showa 53-37076 (JP, U)
Claims (2)
のスルホール部を形成すると共に、各スルホール部には
下端側から挿入する脚杆部と、該脚杆部上端に形成され
スルホール部口縁に係合する頭頂部と、該頭頂部下方に
形成される偏平薄肉な係止部とからなるリードピンを挿
着してなり、 前記スルホール部がCuメッキからなる回路層の表面にNi
メッキからなる厚メッキ保護層を積層せしめて形成され
ると共に、 上記リードピンにおける係止部を、スルホール部内径よ
りやや大きな突出幅と上記脚杆部径より小さな厚みを備
え、且つスルホール部内周に圧接する側縁面部を緩やか
な円弧形状とする偏平薄肉状とし、 上記係止部をスルホール部内へ圧入して前記側縁面部の
突出方向頂点部位をスルホール部内面に圧接せしめてリ
ードピンをかしめ固定したことを特徴とする半導体装
置。1. A chip-on-board made of an organic material is formed with a large number of through-holes, and each of the through-holes has a leg rod portion to be inserted from the lower end side and a through-hole portion edge formed at the upper end of the leg rod portion. A lead pin consisting of a crown portion to be engaged and a flat and thin locking portion formed below the crown portion is inserted and attached, and the through hole portion is formed on the surface of the circuit layer made of Cu plating with Ni.
It is formed by stacking a thick plating protective layer made of plating, and the locking portion of the lead pin has a protrusion width slightly larger than the inner diameter of the through hole portion and a thickness smaller than the diameter of the leg rod portion, and is pressed against the inner circumference of the through hole portion. The side edge surface part to be formed has a flattened thin shape with a gentle arc shape, and the locking part is press-fitted into the through hole part, and the apex part of the protruding direction of the side edge surface part is pressed against the inner surface of the through hole part to caulk and fix the lead pin. A semiconductor device characterized by:
面に半田とのぬれ性の良い金属メッキを積層せしめると
共に、リードピンの表面にSnメッキを施したことを特徴
とする特許請求の範囲第1項記載の半導体装置。2. The method according to claim 1, wherein a metal plating having good wettability with solder is laminated on the surface of the Ni plating layer in the through hole portion, and Sn plating is applied to the surface of the lead pin. The semiconductor device described.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60232983A JPH0756820B2 (en) | 1985-10-17 | 1985-10-17 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60232983A JPH0756820B2 (en) | 1985-10-17 | 1985-10-17 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6293869A JPS6293869A (en) | 1987-04-30 |
| JPH0756820B2 true JPH0756820B2 (en) | 1995-06-14 |
Family
ID=16947953
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60232983A Expired - Lifetime JPH0756820B2 (en) | 1985-10-17 | 1985-10-17 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0756820B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02234368A (en) * | 1989-02-07 | 1990-09-17 | Augat Inc | Pin terminal for substate and method of mounting this pin terminal |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5062054U (en) * | 1973-10-04 | 1975-06-06 |
-
1985
- 1985-10-17 JP JP60232983A patent/JPH0756820B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6293869A (en) | 1987-04-30 |
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