JPH0759060B2 - FM television receiver - Google Patents
FM television receiverInfo
- Publication number
- JPH0759060B2 JPH0759060B2 JP60128151A JP12815185A JPH0759060B2 JP H0759060 B2 JPH0759060 B2 JP H0759060B2 JP 60128151 A JP60128151 A JP 60128151A JP 12815185 A JP12815185 A JP 12815185A JP H0759060 B2 JPH0759060 B2 JP H0759060B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- period
- voltage
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- Television Receiver Circuits (AREA)
Description
【発明の詳細な説明】 〔発明の利用分野〕 本発明は、衛星放送受信機の第2のヘテロダイン受信装
置などとして好適なFMテレビジョン受信装置に係り、特
に、受信されたテレビジョンFM信号の周波数変換器にお
ける局部発振器の発振周波数を制御するAFCに関する。Description: FIELD OF THE INVENTION The present invention relates to an FM television receiver suitable as a second heterodyne receiver of a satellite broadcast receiver, and more particularly to a received television FM signal. The present invention relates to an AFC that controls the oscillation frequency of a local oscillator in a frequency converter.
静止衛星からのテレビ放送を直接受信する衛星放送で
は、FM変調を主とした変調方式が用いられ、このFM変調
法は被変調信号の平均値が一定周波数となる方式が多く
用いられる。In satellite broadcasting that directly receives television broadcasting from geostationary satellites, a modulation method mainly used for FM modulation is used, and this FM modulation method often uses a method in which the average value of the modulated signal is a constant frequency.
しかし、送信帯域に制限があり、被変調信号の平均値電
圧の急俊な変化、例えば黒画面から白画面への変化時
に、FM信号スペクトルが送信帯域外へ飛び出すのを防ぐ
場合に、あるいは特殊な映像信号で再生に必要な基準の
直流電圧が映像信号の内容で動かないようにする場合
に、被変調信号の基準となる期間のFM信号を一定周波数
に固定するFM変調方式が用いられる。However, there is a limit to the transmission band, and when the FM signal spectrum is prevented from jumping out of the transmission band when the average value voltage of the modulated signal changes rapidly, for example, when the black screen changes to a white screen, or In order to prevent the reference DC voltage necessary for reproduction with a different video signal from moving according to the content of the video signal, an FM modulation method is used in which the FM signal of the period to be the reference of the modulated signal is fixed to a constant frequency.
この変調方式の受信回路の例は、特開昭57−135582号公
報の第3図および第5図に示されている。同図は、衛星
放送受信機の第2のヘテロダイン受信機の局部発振周波
数の安定化を行う構成で、定常受信時および基準となる
周波数一定期間が長い場合には安定な局部発振周波数の
制御が行えるが、受信機への電源投入時および信号入力
が一時遮断された場合に、局部周波数の制御が乱れ復帰
が遅れる。また、基準となる周波数一定期間が短い場合
に制御が不完全になる欠点をもっている。An example of this modulation type receiving circuit is shown in FIGS. 3 and 5 of JP-A-57-135582. This figure shows a configuration for stabilizing the local oscillation frequency of the second heterodyne receiver of the satellite broadcast receiver, and the stable local oscillation frequency can be controlled during steady reception and when the reference frequency constant period is long. Although it can be done, the local frequency control is disturbed and the recovery is delayed when the power to the receiver is turned on or when the signal input is temporarily cut off. Further, there is a drawback that the control becomes incomplete when the reference frequency fixed period is short.
本発明の目的は、上記した従来技術の欠点を解消し、常
に安定した局部発振周波数の制御を可能としたFMテレビ
ジョン受信装置を提供するにある。It is an object of the present invention to provide an FM television receiving device which solves the above-mentioned drawbacks of the prior art and enables stable local oscillation frequency control at all times.
本発明では基準となる周波数一定期間の信号に対応した
パルス信号が発生するまではあるいは、パルス信号停止
時には局部発振周波数を復調映像信号の平均値電圧で制
御し、上記パルス信号発生からパルス期間の復調映像電
圧によるサンプル制御とする構成とし、サンプル制御回
路は基準の復調電圧と比較の電圧をともにサンプル制御
することにより、電源投入時、信号の一時遮断時に安定
な受信をし、しかも基準となる一定周波数期間が短い場
合でも居部発振周波数を安定に制御する。In the present invention, the local oscillation frequency is controlled by the average value voltage of the demodulated video signal until the pulse signal corresponding to the signal of the reference frequency constant period is generated, or when the pulse signal is stopped, The sample control circuit is configured to perform sample control by the demodulated video voltage, and the sample control circuit performs sample control of both the reference demodulation voltage and the comparison voltage to ensure stable reception when the power is turned on and when the signal is temporarily cut off. Even if the fixed frequency period is short, the local oscillation frequency is controlled stably.
以下、本発明を図に示す実施例に従って詳細に説明す
る。Hereinafter, the present invention will be described in detail according to the embodiments shown in the drawings.
第1図は、本発明によるFMテレビジョン受信装置の一実
施例を示す構成図で、衛星放送受信機の第2のヘテロダ
イン受信回路と信号処理回路の構成を示すものである。
端子1から入力された複数の信号から周波数混合回路2
と端子8からの選局電圧で発振周波数を決める局部発振
回路3とで希望信号の選局と周波数変換を行い、帯域通
過フィルタ4で希望信号以外の妨害信号を除去し、FM復
調回路5で映像信号を復調し、映像信号処理回路6で映
像信号の波形整形を行って端子7から出力する。映像信
号処理回路6からFM信号の一定周波数期間に対応したパ
ルス制御信号bとこのパルス制御信号が発生したか否か
の制御信号cとを出力し、FM復調回路5の出力復調信号
aは積分回路9へ入力し、積分回路9は制御信号cで制
御し、パルス制御信号bが発生していない場合は復調信
号aを積分した信号が出力され、パルス制御信号bが発
生した場合復調信号aを出力し、この積分回路9の出力
はスイッチ13とホールド回路14から成る第1のサンプル
ホールド回路へ接続され、第1のサンプルホールド回路
出力は差動増幅回路18へ入力され、差動増幅回路18の他
方の入力へは、比較電圧発生回路15の電圧をスイッチ16
とホールド回路17から成る第2のサンプルホールド回路
の出力が接続され、差動増幅回路18の出力は加算器19で
選局電圧に重畳される。ここで、第1および第2のサン
プルホールド回路のスイッチ13とスイッチ16の制御は、
制御信号cで制御されたスイッチ11により、パルス制御
信号bと固定電圧回路12の固定電圧が選択され、このス
イッチ11の出力信号dで行い、スイッチ13とスイッチ16
はパルス信号bが発生していない場合は、入出力が常に
導通となり、パルス信号bが発生した場合にパルス信号
bの期間のみ導通で他の期間は遮断となる。FIG. 1 is a configuration diagram showing an embodiment of an FM television receiving apparatus according to the present invention, and shows the configurations of a second heterodyne receiving circuit and a signal processing circuit of a satellite broadcast receiver.
Frequency mixing circuit 2 from a plurality of signals input from terminal 1
And the local oscillator circuit 3 which determines the oscillation frequency by the tuning voltage from the terminal 8 selects the desired signal and converts the frequency, and the band pass filter 4 removes interference signals other than the desired signal, and the FM demodulator circuit 5 The video signal is demodulated, and the video signal processing circuit 6 shapes the waveform of the video signal and outputs it from the terminal 7. The video signal processing circuit 6 outputs a pulse control signal b corresponding to a constant frequency period of the FM signal and a control signal c indicating whether or not this pulse control signal is generated, and the output demodulation signal a of the FM demodulation circuit 5 is integrated. When the pulse control signal b is not generated, a signal obtained by integrating the demodulation signal a is output, and when the pulse control signal b is generated, the demodulation signal a is input to the circuit 9. The output of the integrating circuit 9 is connected to a first sample-hold circuit composed of a switch 13 and a hold circuit 14, and the output of the first sample-hold circuit is input to a differential amplifier circuit 18, The voltage of the comparison voltage generator 15 is applied to the other input of switch 18
The output of the second sample hold circuit composed of the hold circuit 17 and the output of the differential amplifier circuit 18 is superimposed on the tuning voltage by the adder 19. Here, the control of the switches 13 and 16 of the first and second sample hold circuits is as follows.
The pulse control signal b and the fixed voltage of the fixed voltage circuit 12 are selected by the switch 11 controlled by the control signal c, and the output signal d of this switch 11 is used to perform the switch 13 and the switch 16
When the pulse signal b is not generated, the input / output is always conductive, and when the pulse signal b is generated, the input / output is conductive only for the period of the pulse signal b and cut off for the other periods.
第2図はこの実施例の受信処理対象となるテレビジョン
信号の信号波形例で、これはアイビーエー イクスペリ
メンタル アンド ディベロプメント レポート(IBA
EXPERIMENTAL & DEVELOPEMENT Report)116/81の第5
図に記載されているマルチプレックスド アナログ コ
ンポーネント(MULTIPLEXED ANALOGUE COMPONENT)信
号、略称マック信号(MAC)と呼ばれるテレビ信号で、
期間T1は信号の中心電圧を示す基準の期間で、期間T2は
信号の期間で色信号20,輝度信号21,同期信号22から成っ
ている。この期間T1での基準電圧は信号の処理に必要
で、期間T2での信号の変化でこの期間T1の電圧が変化し
ないように、送信側のFM変調方式として、この期間T1は
期間T2の信号に関係なく一定周波数とする変調が用いら
れる。FIG. 2 shows an example of a signal waveform of a television signal which is the reception processing target of this embodiment. This is an Ivy Axial and Development Report (IBA).
EXPERIMENTAL & DEVELOPEMENT Report) 5th of 116/81
The television signal called MULTIPLEXED ANALOGUE COMPONENT signal, abbreviated as Mac signal (MAC)
The period T 1 is a reference period indicating the center voltage of the signal, and the period T 2 is a signal period, which includes a color signal 20, a luminance signal 21, and a synchronization signal 22. The reference voltage in this period T 1 is necessary for signal processing, and this period T 1 is set as the FM modulation method on the transmission side so that the voltage in this period T 1 does not change due to the signal change in period T 2. Modulation with a constant frequency is used regardless of the signal in the period T 2 .
このような基準電圧期間、すなわち基準周波数期間をも
つ信号としては、上記マック信号の他、日本放送協会
(NHK)で計画しているミューズ(MUSE)信号などがあ
る。これら基準周波数期間をもつFM信号を受信する場
合、受信機においてもこの基準周波数期間が一定の周波
数となるように周波数制御を行う必要がある。As the signal having such a reference voltage period, that is, a reference frequency period, there is a MUSE signal planned by the Japan Broadcasting Corporation (NHK) in addition to the above-mentioned Mac signal. When receiving an FM signal having these reference frequency periods, the receiver must also perform frequency control so that the reference frequency period becomes a constant frequency.
第3図に第1図に示した実施例の動作を説明する波形例
を示す。受信するFM信号が期間T1で一定周波数でT2の期
間T2で映像信号の周波数が変化する信号の場合、第1図
において、FM復調回路5の出力である復調波形aは期間
T1で直流電圧23となり、期間T2で映像信号24の波形が得
られ、映像信号処理回路6では映像信号24の同期情報か
ら、期間T1に対応するパルス制御信号bを発生する。ま
た、映像信号処理回路6からは電源投入時、あるいは選
局等により一時的に信号がとだえた時に、パルス制御信
号bが発生するまでの時間T0に対応した制御信号cが出
力される。今、一例として期間T1でのパルス制御信号b
の電圧を高い電圧、他の期間を低い電圧とし制御信号c
の期間T0での電圧を高い電圧、他の期間を低い電圧とし
固定電圧回路12の電圧を期間T1でのパルス信号bの高い
電圧とほぼ同じ電圧とすると、スイッチ11の出力は期間
T0では固定電圧となり、パルス制御信号bの発生により
パルス制御信号bが出力される。FIG. 3 shows a waveform example for explaining the operation of the embodiment shown in FIG. If FM signal received by the signal which changes the frequency of the video signal in the period T 2 of the T 2 at a constant frequency in the period T 1, in FIG. 1, the demodulated waveform a, which is the output of the FM demodulator circuit 5 during the period
The DC voltage 23 is obtained at T 1 , the waveform of the video signal 24 is obtained during the period T 2 , and the video signal processing circuit 6 generates the pulse control signal b corresponding to the period T 1 from the synchronization information of the video signal 24. Further, the video signal processing circuit 6 outputs a control signal c corresponding to the time T 0 until the pulse control signal b is generated when the power is turned on or when the signal is temporarily cut off due to channel selection or the like. Now, as an example, the pulse control signal b in the period T 1
Of the control signal c is a high voltage and the other period is a low voltage.
When the voltage in the period T 0 is high and the other periods are low, and the voltage of the fixed voltage circuit 12 is substantially the same as the high voltage of the pulse signal b in the period T 1 , the output of the switch 11 is
At T 0 , the voltage becomes a fixed voltage, and the pulse control signal b is output when the pulse control signal b is generated.
期間T0での回路動作は、積分回路9で積分出力が選択さ
れるため積分回路9の出力波形eは復調信号aの平均値
電圧となり、スイッチ13とスイッチ16は常に導通となる
ためスイッチ13の出力fおよびホールド回路14の出力h
は上記平均値電圧となり、スイッチ16の出力gおよびホ
ールド回路17の出力iは比較電圧発生回路15の電圧とな
り、差動増幅回路18の働きで復調信号の平均値電圧と比
較電圧発生回路の出力電圧が等しくなるように局部発振
回路3の周波数を制御する。従って、局部発振回路3の
発振周波数が温度等で変動し、離調していても上記平均
値AFCの働きで、すばやく復調信号aを発生してパルス
制御信号bの発生をスムーズに行う。しかし、このT0期
間は基準周波数が映像信号の平均値で変わるため、復調
信号aの基準電圧23が変化して、映像信号の輝度信号が
白あるいは黒側へ変化する。In the circuit operation in the period T 0 , since the integral output is selected by the integrating circuit 9, the output waveform e of the integrating circuit 9 becomes the average value voltage of the demodulated signal a, and the switch 13 and the switch 16 are always conductive, so that the switch 13 Output f and output h of hold circuit 14
Is the above-mentioned average value voltage, and the output g of the switch 16 and the output i of the hold circuit 17 become the voltage of the comparison voltage generating circuit 15. The differential amplifier circuit 18 acts to output the average value voltage of the demodulated signal and the output of the comparison voltage generating circuit. The frequency of the local oscillator circuit 3 is controlled so that the voltages become equal. Therefore, even if the oscillation frequency of the local oscillation circuit 3 fluctuates due to temperature or the like, and even if the tuning is detuned, the average value AFC serves to quickly generate the demodulation signal a and smoothly generate the pulse control signal b. However, since the reference frequency changes with the average value of the video signal during this T 0 period, the reference voltage 23 of the demodulation signal a changes, and the luminance signal of the video signal changes to the white or black side.
次にパルス制御信号bが発生すると、積分回路9の出力
eは復調信号aとなり、スイッチ11の出力dはパルス制
御信号bとなるため、スイッチ13とスイッチ16はパルス
制御信号bのT1期間だけ導通して、他のT2期間は遮断と
なりスイッチ13の出力fにはT1期間だけ復調信号aの基
準電圧25が、スイッチ16の出力gには比較電圧発生回路
15の電圧がT1期間だけ出力され、各々ホールド回路14と
17によりT1期間の電圧をT2期間の間ホールドするため差
動増幅回路18の入力hとiは図のように、T1期間で充電
されT2期間で少しずつ放電する特性となるが、第1のサ
ンプルホールド回路と第2のサンプルホールド回路は充
放電の時定数を同じにすることで、T2期間における差動
増幅回路の出力電圧の変化を小さくすることができる。
すなわち、本回路はT1期間の復調信号aの基準電圧25と
比較電圧発生回路15の出力電圧が等しくなるように局部
発振回路3の発振周波数を制御し、T2期間はホールド回
路の放電時定数を大きくとり、かつ、基準電圧と比較電
圧の放電時定数を同じにすることで、差動増幅回路18の
出力電圧変動を著しく小さくし、T2期間の発振周波数の
変動を小さくすることができる。ここで、第1および第
2のサンプルホールド回路へスイッチの導通時に接続さ
れるFM復調回路5,積分回路9および比較電圧発生回路15
の出力インピーダンスを小さく設定することで、サンプ
ルホールド回路の充電時定数は小さくできるため、上記
ホールド効果により短い期間のパルス信号でも安定なサ
ンプリングAFCが構成できる。Next, when the pulse control signal b is generated, the output e of the integrating circuit 9 becomes the demodulation signal a and the output d of the switch 11 becomes the pulse control signal b, so that the switches 13 and 16 are in the T 1 period of the pulse control signal b. only conductive, the reference voltage 25 only the demodulated signal a T 1 period in the output f of the switch 13 becomes the other period T 2 is cut off, the output g of the switch 16 the comparison voltage generating circuit
The voltage of 15 is output only for the period of T 1 , and the hold circuit 14 and
The voltage of period T 1 as the input h and i FIG differential amplifier circuit 18 for holding between the period T 2 by 17, although the characteristics of discharging portions at period T 2 is charged with period T 1 The first sample-hold circuit and the second sample-hold circuit have the same charge-discharge time constant, so that the change in the output voltage of the differential amplifier circuit during the T 2 period can be reduced.
That is, this circuit controls the oscillation frequency of the local oscillation circuit 3 so that the reference voltage 25 of the demodulated signal a during the T 1 period and the output voltage of the comparison voltage generation circuit 15 become equal, and during the T 2 period, when the hold circuit is discharged. By making the constant large and making the discharge time constants of the reference voltage and the comparison voltage the same, it is possible to significantly reduce the output voltage fluctuation of the differential amplifier circuit 18 and reduce the fluctuation of the oscillation frequency during the T 2 period. it can. Here, the FM demodulation circuit 5, the integration circuit 9, and the comparison voltage generation circuit 15 which are connected to the first and second sample and hold circuits when the switch is conductive.
Since the charging time constant of the sample hold circuit can be made small by setting the output impedance of the sample output to a small value, a stable sampling AFC can be constructed even with a pulse signal of a short period due to the hold effect.
第4図に第1図におけるAFC回路構成部分の一具体的な
回路例を示す。スイッチ26と抵抗32と容量33で積分回路
を構成し、容量33がスイッチ26によって接地されると復
調信号aの積分信号がトランジスタQ2のベースへ出力さ
れ、スイッチ26によって容量33の接地が切断されると復
調信号aがトランジスタQ2のベースへ出力される。ここ
でスイッチ26はon抵抗の小さい電子スイッチ、たとえば
ダイオードの順方向特性を用いることで簡単に実現でき
る。また、本構成によれば復調信号aが無変調時にトラ
ンジスタQ2のベースへ印加される直流レベルは、積分出
力と否積分出力とも同じであることから両出力間のレベ
ル調整は不要である。復調信号あるいは復調信号の積分
信号を出力するトランジスタQ2と比較電圧発生回路の出
力トランジスタQ3はエミッタフォロアの定電圧回路とし
て出力インピーダンスを小さくし、このインピーダンス
とホールド回路の容量30および31で形成される充電時定
数を小さくして短い期間の導通で充電を行い、ホールド
時はトランジスタQ4,Q5,Q6およびQ7,Q8,Q9の多段接続で
容量30および31から見た出力側のインピーダンスを大き
くして、放電時定数を大きくしてホールド時の電圧変動
を小さくするとともに、2つのホールド回路の放電時定
数を同じにしているため、差動増幅回路のトランジスタ
Q10とQ11のベース電圧の差が変化せず、差動増幅回路出
力の電圧は不変で良好なホールド効果が長い期間得られ
る。FIG. 4 shows a concrete circuit example of the AFC circuit constituent portion in FIG. The switch 26, the resistor 32, and the capacitor 33 form an integrating circuit. When the capacitor 33 is grounded by the switch 26, the integrated signal of the demodulation signal a is output to the base of the transistor Q 2 , and the switch 26 disconnects the grounding of the capacitor 33. Then, the demodulated signal a is output to the base of the transistor Q 2 . Here, the switch 26 can be easily realized by using an electronic switch having a low on resistance, for example, the forward characteristic of a diode. Further, according to this configuration, the DC level applied to the base of the transistor Q 2 when the demodulated signal a is not modulated is the same for both the integrated output and the non-integrated output, so that level adjustment between both outputs is unnecessary. The transistor Q 2 that outputs the demodulated signal or the integrated signal of the demodulated signal and the output transistor Q 3 of the comparison voltage generation circuit function as a constant voltage circuit of the emitter follower to reduce the output impedance and are formed by this impedance and the capacitances 30 and 31 of the hold circuit. The charging time constant is reduced and charging is performed for a short period of conduction, and at the time of holding, the transistors Q 4 , Q 5 , Q 6 and Q 7 , Q 8 , Q 9 are connected in multiple stages to see from the capacitors 30 and 31. Since the impedance on the output side is increased, the discharge time constant is increased to reduce the voltage fluctuation during hold, and the discharge time constants of the two hold circuits are made the same, the transistors of the differential amplifier circuit are
The difference between the base voltages of Q 10 and Q 11 does not change, the voltage of the differential amplifier circuit output does not change, and a good hold effect can be obtained for a long period.
以上説明したように、本発明のFMテレビジョン受信装置
によれば、局部発振器のAFC手段は、基準となる一定周
波数期間の信号に対応したパルス信号が発生している期
間では、復調信号の特定期間の信号電圧をサンプリング
ホールドとして該局部発振器の周波数制御をするので、
該特定期間が短い期間であっても、該局部発振器の周波
数制御を安定するし、また、電源投入時や信号の一時遮
断時でも、該サンプルホールド回路は該復調信号を積分
回路で積分した積分出力をホールドして局部発振器を周
波数制限するから、安定した受信が可能である。As described above, according to the FM television receiver of the present invention, the AFC unit of the local oscillator specifies the demodulated signal in the period in which the pulse signal corresponding to the signal in the constant frequency period serving as the reference is generated. Since the frequency of the local oscillator is controlled by using the signal voltage of the period as the sampling hold,
Even when the specific period is short, the frequency control of the local oscillator is stabilized, and the sample hold circuit integrates the demodulated signal by an integrating circuit even when the power is turned on or the signal is temporarily cut off. Since the output is held and the frequency of the local oscillator is limited, stable reception is possible.
第1図は本発明によるFMテレビジョン受信装置の一実施
例を示す構成図、第2図は第1図に示した実施例の受信
処理対象となるテレビジョン信号の一例を示す波形図、
第3図は第1図における各部の信号を示す波形図、第4
図は第1図におけるAFC回路構成部分の一具体回路例を
示す回路図である。 2……周波数混合回路、3……局部発振回路、 4……帯域通過フィルタ、 5……FM復調回路、6……映像信号処理回路、 9……積分回路、 11,13,16,26,27,28,29……スイッチ回路、 14,17……ホールド回路、 18……差動増幅回路、15……比較電圧発生回路、 12……固定電圧発生回路、 19……加算器、30,31,33……容量、 32……抵抗。FIG. 1 is a configuration diagram showing an embodiment of an FM television receiving apparatus according to the present invention, and FIG. 2 is a waveform diagram showing an example of a television signal which is a reception processing target of the embodiment shown in FIG.
FIG. 3 is a waveform diagram showing signals at various parts in FIG. 1, and FIG.
FIG. 1 is a circuit diagram showing a specific circuit example of the AFC circuit constituent portion in FIG. 2 ... Frequency mixing circuit, 3 ... Local oscillation circuit, 4 ... Band pass filter, 5 ... FM demodulation circuit, 6 ... Video signal processing circuit, 9 ... Integration circuit, 11,13,16,26, 27,28,29 …… Switch circuit, 14,17 …… Hold circuit, 18 …… Differential amplifier circuit, 15 …… Comparison voltage generation circuit, 12 …… Fixed voltage generation circuit, 19 …… Adder, 30, 31,33 …… Capacity, 32 …… Resistance.
Claims (1)
ビジョンFM信号を受信して第2のテレビジョンFM信号に
周波数変換する周波数変換器と、該第2のテレビジョン
FM信号を復調してテレビジョン信号を復調するFM復調器
と、サンプルホールド回路を有し該サンプルホールド回
路のホールド出力に応じて該局部発振器の発振周波数を
制御するAFC手段と、該AFC手段を復調された該テレビジ
ョン信号の特定期間の信号電圧をサンプルホールドして
動作する第1のモードと復調された該テレビジョン信号
の平均電圧をホールドして動作する第2のモードとを選
択設定する制御手段とを有するFMテレビジョン受信装置
において、 該第1のモードのときには、時定数を小さくして復調さ
れた該テレビジョン信号を通過させ、該第2のモードの
ときには、時定数を大として復調された該テレビジョン
信号の積分電圧値を選択出力する積分手段を設け、 該積分手段の出力を該サンプルホールド回路に供給する
ことを特徴とするFMテレビジョン受信装置。1. A frequency converter comprising a local oscillator and a mixer for receiving a first television FM signal and converting the frequency into a second television FM signal, and the second television.
An FM demodulator that demodulates an FM signal to demodulate a television signal, an AFC unit that has a sample hold circuit and controls the oscillation frequency of the local oscillator according to the hold output of the sample hold circuit, and the AFC unit. A first mode in which the signal voltage of the demodulated television signal during a specific period is sample-held to operate and a second mode in which the average voltage of the demodulated television signal is held to operate are selectively set. In the FM television receiver having a control means, the time constant is made small to pass the demodulated television signal in the first mode, and the time constant is made large in the second mode. Integrating means for selectively outputting the integrated voltage value of the demodulated television signal is provided, and the output of the integrating means is supplied to the sample hold circuit. FM television receiver that.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60128151A JPH0759060B2 (en) | 1985-06-14 | 1985-06-14 | FM television receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60128151A JPH0759060B2 (en) | 1985-06-14 | 1985-06-14 | FM television receiver |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61288578A JPS61288578A (en) | 1986-12-18 |
| JPH0759060B2 true JPH0759060B2 (en) | 1995-06-21 |
Family
ID=14977644
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60128151A Expired - Lifetime JPH0759060B2 (en) | 1985-06-14 | 1985-06-14 | FM television receiver |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0759060B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4814887A (en) * | 1988-05-23 | 1989-03-21 | General Instrument Corporation | Automatic frequency control |
| JPH02113729A (en) * | 1988-10-24 | 1990-04-25 | Sony Corp | Receiver |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH074007B2 (en) * | 1992-04-16 | 1995-01-18 | 株式会社日立製作所 | FM television receiver |
-
1985
- 1985-06-14 JP JP60128151A patent/JPH0759060B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61288578A (en) | 1986-12-18 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |