JPH0760896B2 - Charge coupled device - Google Patents
Charge coupled deviceInfo
- Publication number
- JPH0760896B2 JPH0760896B2 JP61307030A JP30703086A JPH0760896B2 JP H0760896 B2 JPH0760896 B2 JP H0760896B2 JP 61307030 A JP61307030 A JP 61307030A JP 30703086 A JP30703086 A JP 30703086A JP H0760896 B2 JPH0760896 B2 JP H0760896B2
- Authority
- JP
- Japan
- Prior art keywords
- type
- coupled device
- gaas
- charge
- type semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 claims description 24
- 230000007704 transition Effects 0.000 claims description 10
- 239000000463 material Substances 0.000 claims description 6
- 150000001875 compounds Chemical class 0.000 claims description 5
- 239000000758 substrate Substances 0.000 claims description 4
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 13
- 238000001444 catalytic combustion detection Methods 0.000 description 11
- 230000006798 recombination Effects 0.000 description 7
- 238000005215 recombination Methods 0.000 description 7
- 239000000969 carrier Substances 0.000 description 4
- 230000003287 optical effect Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000010365 information processing Effects 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000015654 memory Effects 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 238000003909 pattern recognition Methods 0.000 description 1
- 238000007781 pre-processing Methods 0.000 description 1
- 238000012216 screening Methods 0.000 description 1
- 230000005428 wave function Effects 0.000 description 1
Landscapes
- Solid State Image Pick-Up Elements (AREA)
- Bipolar Integrated Circuits (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は空間光変調器や光・電子集積回路の一要素とし
ての発展が可能な直接遷移型の化合物半導体を材料に用
いた電荷結合デバイス（以下、CCDと略記する）に関す
る。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a charge coupled device using a direct transition type compound semiconductor as a material, which can be developed as one element of a spatial light modulator or an optical / electronic integrated circuit. (Hereinafter referred to as CCD).
CCDはイメージ・センサやデジタルメモリ、アナログ信
号の処理等に広範な応用が拡がりつつある。CCDは通常
材料に間接遷移型の半導体であるSiを用いて作られる
が、光情報処理への応用という観点からは半導体レーザ
や発光ダイオード等が製作できるAlGaAs/GaAs系やInGaA
sP/InP系といった直接遷移型の半導体材料に適した構造
のものが望まれる。又、Si−CCDの動作速度は電子の移
動度によって制限され高々１〜10MHzであるが、更に高
速で動くCCDが必要とされている。テレビカメラからの
画像データを実時間で高速に積和演算処理してパターン
認識を行なう画像処理用CCDの需要は近年、増々高まり
つつあるが、この様な要求に応えるためには移動度が大
きい上述のGaAsやInPといった化合物半導体を用いるこ
とが最適である。CCDを化合物半導体で作る上での問題
点はキャリア寿命が短かい点にある。あるイメージがレ
ンズを通してCCD上に結像されると、チャネル内に電子
と正孔が生ずる。Si−CCDではSiが間接遷移型の半導体
であるために再結合時間は約１μｓと長く、電子と正孔
が再結合する前に電荷を転送することが容易である。こ
れに対して直接遷移型材料であるGaAsやInP系では発光
再結合時間は数nsecと短かいために、例えば100MHzのク
ロック速度で動作させようとしても、転送前にキャリア
が消滅してしまい転送損失が非常に大きくなってしまう
という問題点があった。従って、アイ・イー・イー・イ
ー・エレクトロン・デバイスレターズ（IEEE Electron
Device Letters,vol.EDL−2,No.3,pp70〜72,1981）に見
られように、GaAs−CCDでは0.994といった電荷転送効率
を実現するためには発光再結合速度よりも早い1GHzとい
った速度で動作させることが必要となる。そのためにク
ロック速度に対して融通性がなくなってしまうという問
題が生じた。CCDs are being widely applied to image sensors, digital memories, and analog signal processing. CCD is usually made by using Si which is an indirect transition type semiconductor as a material, but from the viewpoint of application to optical information processing, it is possible to manufacture semiconductor lasers and light emitting diodes, etc.
A structure suitable for a direct transition type semiconductor material such as sP / InP system is desired. The operating speed of the Si-CCD is limited to 1 to 10 MHz at the maximum due to the mobility of electrons, but a CCD operating at a higher speed is required. In recent years, the demand for image processing CCDs that perform pattern recognition by performing real-time high-speed product-sum operation processing of image data from TV cameras has increased, but the mobility is high to meet such demands. It is optimal to use the compound semiconductor such as GaAs or InP described above. The problem with making CCDs from compound semiconductors is that the carrier life is short. When an image is formed on the CCD through a lens, electrons and holes are generated in the channel. In Si-CCD, since Si is an indirect transition type semiconductor, the recombination time is as long as about 1 μs, and it is easy to transfer charges before the electrons and holes are recombined. On the other hand, in the case of GaAs and InP which are direct transition materials, the radiative recombination time is as short as several nanoseconds. Therefore, even if it is attempted to operate at a clock speed of 100 MHz, for example, carriers disappear before transfer There was a problem that the loss would be very large. Therefore, IEEE Electron Device Letters (IEEE Electron
Device Letters, vol.EDL-2, No.3, pp70 to 72, 1981), in order to realize a charge transfer efficiency of 0.994 for GaAs-CCD, a speed of 1 GHz, which is faster than the radiative recombination rate. It is necessary to operate with. Therefore, there is a problem in that the flexibility of the clock speed is lost.
本発明は上記欠点を除き得る電荷結合デバイスを提供す
るもので、直接遷移型の化合物半導体材料を用い、キャ
リアのド・ブロイ波長程度に相当する薄いｎ型半導体層
とｐ型半導体層とを交互に多層に半導体基板上に多層を
積層することによって電荷転送用のチャネルが形成され
ていることを特徴とする。The present invention provides a charge-coupled device capable of eliminating the above-mentioned drawbacks, in which a direct transition type compound semiconductor material is used, and a thin n-type semiconductor layer and a p-type semiconductor layer corresponding to a de Broglie wavelength of a carrier are alternately formed. In addition, the charge transfer channel is formed by stacking multiple layers on the semiconductor substrate.
ド・ブロイ波長程度で量子効果が現われる様な薄いｎ型
とｐ型の半導体層とを交互に積層した多層構造体では第
２図のバンド図で示した様に光照射によって生成した電
子と正孔が空間的に分離される。その結果、発光再結合
時間をバルクの場合に比べて非常に長くできる。発光再
結合速度Ｂは、 Ｂ＝C|∫Ψｅ（）Ψ＊ ｈ（）dV|2 …（１） の様に表わされる。（１）式でＣは定数、Ψe,Ψｈはそ
れぞれ電子と正孔の波動関数であり、電子がｎ型半導体
層に、又、正孔はｐ型半導体層に分離してそれぞれの位
置に局在する結果、（１）式の右辺に現われる重なり積
分は小さくなり、発光再結合速度を遅くできる。GaAs系
で構成した上述の様な多層構造体では電子と正孔の発光
再結合時間が数μsecにまで長くなることが報告されて
いる。従って、本発明を用いれば、直接遷移型の半導体
を用いても短いキャリア寿命にクロック速度が束縛され
ることなく電荷の電送を行なうことができる。In a multilayer structure in which thin n-type and p-type semiconductor layers are alternately laminated so that a quantum effect appears at about de Broglie wavelength, as shown in the band diagram of FIG. The holes are spatially separated. As a result, the radiative recombination time can be made much longer than that in the bulk case. The radiative recombination rate B is expressed as follows: B = C | ∫Ψ e () Ψ * h () dV | 2 (1) In the formula (1), C is a constant, and Ψ e and Ψ h are wave functions of electrons and holes, respectively. The electrons are separated into the n-type semiconductor layer and the holes are separated into the p-type semiconductor layer, and their positions are respectively separated. As a result, the overlap integral appearing on the right side of the equation (1) becomes small and the radiative recombination rate can be slowed down. It has been reported that the radiative recombination time of electrons and holes is increased to several μsec in the above-mentioned multilayer structure composed of GaAs. Therefore, according to the present invention, even if a direct transition type semiconductor is used, it is possible to transfer charges without the clock speed being restricted by the short carrier life.
次に、本発明について図面を参照して説明する。 Next, the present invention will be described with reference to the drawings.
第１図は本発明の一実施例の断面図である。半絶縁性の
GaAs基板11の上に層厚115Åのｐ型GaAs層12と同じく115
Åの層厚のｎ型GaAs層13とが交互に110周期積層されて
形成されている。チャネルの層厚は約2.5μｍである。
ｐ型GaAs層12とｎ型GaAs層13のキャリア濃度は共に５×
1016cm-3である。画像はこの電荷結合デバイスに入る前
に増幅，拡大，縮小等の前処理が行なわれる。光強度は
最大１μw/画素に調整される。クロック速度を100MHz,
画像を取り込むゲート時間は1secとする。そうすると0.
8μｍの光によって発生するキャリアは最大約10-6個と
なる。一画素当りの体積は約８μm3であり、発生キャリ
アによる過剰キャリア密度は1.3×105cm-3となる。この
値はバッククランドのキャリア濃度に比べて十分小さ
く、スクリーニング効果等によるポテンシャル等の変化
は問題とならない。14はショットキー型のTi−Auから成
る電荷転送用の不透明電極、15は薄い半透明のTiを用い
た半透明電極である。電極間隔は２μｍで３相のクロッ
ク発振器によって電荷転送を行なう。16はｐ型領域,17
はｎ型領域でイオン注入によって形成し、上側に電荷検
出用の電極を形成した。このような構成によりGaAs系の
半導体を用いて電荷転送の容易なCCDを得ることができ
る。なお、上気実施例ではGaAsを用いた場合を示した
が、これに限らずInP系その他の直接遷移型の半導体を
用いることができる。FIG. 1 is a sectional view of an embodiment of the present invention. Semi-insulating
Same as the p-type GaAs layer 12 with a layer thickness of 115 Å on the GaAs substrate 11.
The n-type GaAs layers 13 having a layer thickness of Å are alternately laminated for 110 cycles. The layer thickness of the channel is about 2.5 μm.
The carrier concentrations of the p-type GaAs layer 12 and the n-type GaAs layer 13 are both 5 ×
It is 10 16 cm -3 . The image is subjected to preprocessing such as amplification, enlargement and reduction before entering the charge coupled device. The light intensity is adjusted to a maximum of 1 μw / pixel. Clock speed 100MHz,
The gate time for capturing images is 1 second. Then 0.
The maximum number of carriers generated by light of 8 μm is about 10 −6 . The volume per pixel is about 8 μm 3 , and the excess carrier density due to the generated carriers is 1.3 × 10 5 cm -3 . This value is sufficiently smaller than the carrier concentration of the back ground, and changes in the potential and the like due to the screening effect or the like are not a problem. Reference numeral 14 is an opaque electrode for charge transfer made of Schottky type Ti-Au, and 15 is a semitransparent electrode using thin semitransparent Ti. The electrode interval is 2 μm, and charge is transferred by a three-phase clock oscillator. 16 is a p-type region, 17
Was formed by ion implantation in the n-type region, and an electrode for charge detection was formed on the upper side. With such a structure, a CCD with easy charge transfer can be obtained using a GaAs semiconductor. In addition, although the case where GaAs is used is shown in the above embodiment, the present invention is not limited to this, and an InP-based semiconductor or other direct transition type semiconductor can be used.
本発明によれば、直接遷移型半導体をチャネルを用いて
も、キャリアの寿命が長くでき、電荷転送が容易とな
る。この電荷結合デバイスは空間光変調器として使用で
き、又、光半導体デバイスと集積することによって様々
な光情報処理が可能となる。According to the present invention, even if a direct transition type semiconductor is used as a channel, the life of carriers can be extended and charge transfer becomes easy. The charge-coupled device can be used as a spatial light modulator, and can be integrated with an optical semiconductor device to enable various optical information processing.
第１図は本発明の一実施例の断面図、第２図はバンド図
である。 11……GaAs基板、12……ｐ型GaAs層、13……ｎ型GaAs
層、14……不透明電極、15……透明電極、16……ｐ型領
域、17……ｎ型領域。FIG. 1 is a sectional view of an embodiment of the present invention, and FIG. 2 is a band diagram. 11 ... GaAs substrate, 12 ... p-type GaAs layer, 13 ... n-type GaAs
Layer, 14 ... Opaque electrode, 15 ... Transparent electrode, 16 ... P-type region, 17 ... N-type region.
Claims (1)
ャリアのドブロイ波長程度に相当する薄いｎ型半導体層
とｐ型半導体層とを交互に半導体基板上に多層に積層す
ることによって電荷転送用のチャネルが形成されている
ことを特徴とする電荷結合デバイス。1. A charge transfer device comprising a direct transition type compound semiconductor material, wherein thin n-type semiconductor layers and p-type semiconductor layers corresponding to a de Broglie wavelength of a carrier are alternately laminated in multiple layers on a semiconductor substrate. A charge-coupled device, characterized in that a channel is formed therein.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61307030A JPH0760896B2 (en) | 1986-12-22 | 1986-12-22 | Charge coupled device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61307030A JPH0760896B2 (en) | 1986-12-22 | 1986-12-22 | Charge coupled device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63158874A JPS63158874A (en) | 1988-07-01 |
| JPH0760896B2 true JPH0760896B2 (en) | 1995-06-28 |
Family
ID=17964186
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61307030A Expired - Fee Related JPH0760896B2 (en) | 1986-12-22 | 1986-12-22 | Charge coupled device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0760896B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7141768B2 (en) | 2000-04-28 | 2006-11-28 | Nexicor, Llc | Fastening device |
-
1986
- 1986-12-22 JP JP61307030A patent/JPH0760896B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7141768B2 (en) | 2000-04-28 | 2006-11-28 | Nexicor, Llc | Fastening device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63158874A (en) | 1988-07-01 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |