JPH0761006B2 - Data recording system for operation recorder - Google Patents

Description

Detailed Description of the Invention [Industrial applications]

The present invention relates to an improvement of a data counting system of an operation recording apparatus having a counting circuit for inputting and counting a pulse signal detected from a sensor and outputting the number of signals counted immediately before in synchronization with an input clock.

[Prior art]

Like a counter such as INTEL8253, in the counting circuit that counts the pulse signal input from the sensor and writes and clears the immediately preceding count value in synchronization with the input clock, when the operating machine stops, the pulse signal Since there is no input and the count value becomes 0, the count value of the operation data input immediately before is not initialized (written) and remains, so that the correct count number cannot be read.

[Problems to be Solved by the Invention]

The present invention has been made in view of the above circumstances, and initializes (writes) the immediately preceding count value even when the operating machine stops.
It is an object of the present invention to provide a data count system capable of reading out a correct count number.

[Means for solving problems]

To achieve the above object, according to the present invention, as shown in the functional block diagram of FIG. 1, a pulse signal detected from a sensor S is input and counted, and the number of signals counted immediately before is synchronized with an input clock. In the data counting system of the operation recording device 5 having the output counting circuit 4, (a). Dummy pulse generating means for outputting a dummy pulse signal each time the number of signals counted by the counting circuit 4 is written and cleared is provided (b). An exclusive OR circuit 2 is provided, which inputs the dummy pulse signal together with the pulse signal from the sensor S, calculates an exclusive OR, and outputs the exclusive OR to the clock terminal of the count circuit 4, (c). The technical means is provided by providing a data adjusting means 3 for subtracting a dummy pulse signal from the number of signals counted and integrated by the counting circuit 4 and storing the result in a memory.

[Work]

The pulse signal detected by the sensor S is input to the counting circuit 4 and counted. This count value is newly written in the memory or the like in synchronization with the input clock of the pulse signal input from the sensor S next. Simultaneously with this writing, the dummy pulse generating means 1 outputs a dummy pulse signal. The dummy pulse signal is input to the exclusive OR circuit 2 together with the pulse signal from the sensor S, the exclusive OR is taken, and the dummy pulse signal is input to the clock terminal of the count circuit 4. In addition, the number of pulses corresponding to the dummy pulse signal is subtracted from the number of signals counted by the counting circuit 4, and an accurate count number is stored in the memory. Therefore, even when the operating machine is stopped, the dummy pulse signal output together with the output signal immediately before is input to the count circuit 4 through the exclusive OR circuit, and the previous count value is stored in the memory in synchronization with it. Can be output.

【Example】

An embodiment in which the present invention is applied to a vehicle operation recording system using an IC card will be described below with reference to the drawings. The block diagram shown in FIG. 1 shows the hardware configuration of this embodiment, in which a keyboard 41 and a display 42 are connected to a control unit 10 composed of an 8-bit CPU via an address bus and a data bus B. Second interface (PIO) 11 for connecting the card contactor 43 of the IC card to the first interface (PIO) 12
And an interface (SIO) 13 for serial communication,
Interface 14 for connecting vehicle speed sensor S1 and tachometer S2 to measure vehicle speed and engine speed, and PROM15 used as memory for operation recording software etc.
RAM 16, which is used as a backup memory or software memory, a real-time clock 17 backed up by a vehicle battery, and a serial communication interface (CTC) 18. In the above configuration, the INTEL8253 count circuit (counter) is used as the interface 14 for measuring the vehicle speed and the engine speed. A decoder 31 is connected to the counting circuit 14 as shown in FIG. 3, and a dummy pulse signal is supplied to each of exclusive OR circuits 21 and 22 described later by a control signal from the dummy pulse generating means 1 of the control section 10. Is being output. In this counting circuit 14, the speed sensor S
It counts the pulse signals input from 1 and the digital tachometer (engine speed detection sensor) S2, and further initializes (writes to memory). That is, the pulse signal detected by the speed sensor S1 is
It is input to one of the first exclusive OR circuits 21 through the speed data input photocoupler 5 and the amplifier 6. To the other of the first exclusive OR circuit 21, a dummy pulse signal which is controlled by the dummy pulse generating means 1 and is transmitted each time the count circuit 14 is written and cleared by the decoder 31 is input. Further, regarding the pulse signal sent from the digital tachometer S2, the photo coupler 7 for inputting the engine rotation data is also used.
And an amplifier 8 and is input to one of the second exclusive OR circuits 22. A dummy pulse signal which is controlled by the dummy pulse generating means 1 and is transmitted from the decoder 31 every time the count circuit 14 is written and cleared is input to the other of the second exclusive OR circuit 22. To be done. Therefore, in each of the exclusive OR circuits 21 and 22, the exclusive OR is taken from the pulse signals of the sensors S1 and S2 input respectively and the dummy pulse signal inputted from the dummy pulse generating means 1 to obtain the counting circuit. 14 clock terminals (CLK
0, CLK1). As described above, the counting circuit is synchronized with this input clock.
At 14 the count value counted immediately before is written in the memory, and the dummy pulse generating means 1 inputs the dummy pulse from the decoder 31 to the exclusive OR circuits 21, 22. As a result, when the number of pulse signals detected from the sensor is larger than 0, the pulse signal is always input to the count circuit, and even when the detected value from the sensor becomes 0, writing is performed by the dummy pulse generated immediately before. It can be performed. With such a configuration, when the vehicle is stopped and the vehicle speed signal or the like does not change, the vehicle speed sensor does not output a pulse signal, but it is generated by writing and clearing the count value performed immediately before. Since the dummy pulse is output, the pulse signal can be input to the counting circuit 14, and since the clock signal is generated, the number of signals counted immediately before can be measured. Therefore, when the pulse signal is not input, the count value that has been counted immediately before is not written or cleared, and the count value can be written in the memory in real time without the previous count value remaining. it can. Since the count value written in this way includes the number of dummy pulse signals, it is necessary to subtract the number of dummy pulse signals when storing it as operation data. Therefore, the above processing is performed by the data adjusting means 3,
In the present embodiment, the number of dummy pulse signals is subtracted from the count value by software and stored in the memory 16 or output to the outside. Further, in the present invention, by adopting the above configuration, a predetermined number of dummy pulses are generated from the dummy pulse generating means 1 and the count number is confirmed (the number of input dummy pulses and the count written by the count circuit 14). It is also possible to check whether or not the count circuit is operating normally by determining and monitoring whether or not the values match. The counting circuit 14 in the present embodiment also controls the buzzer sound to the card contactor, and 41 in the figure indicates the connection to the buzzer. The data counting system of the operation recording device of the present invention is
The present invention is not limited to the above-mentioned embodiment, but can be used for recording the operation data of various operating machines. The clock terminal is obtained by taking the exclusive OR of the dummy pulse for each input from various sensors. By inputting to, the same operational effect can be obtained, and the versatility is excellent.

【The invention's effect】

As described above, according to the present invention, when the counting circuit that inputs the pulse signal detected from the sensor and outputs the counted signal number in synchronization with the input clock is used, the input signal from the sensor is stopped due to the stop of the operating machine. Even if does not change, the count number can be accurately read by adding a simple configuration. It is also useful to check the operation of the counting circuit.

[Brief description of drawings]

FIG. 1 is a functional block diagram of the present invention, FIG. 2 is a block diagram showing a hardware configuration of an operation data recording system using an IC card according to an embodiment of the present invention, and FIG. 3 is a circuit diagram showing a data counting system. Is. 1 ... Dummy pulse generating means 2 ... Exclusive OR circuit 3 ... Data adjusting means 4 ... Counting circuit 5 ... Photo coupler 6 ... Amplifier 7 ... Photo coupler 8 ... Amplifier 10 ... Control unit 14 ...... Count circuit 21 ...... First exclusive OR circuit 22 ...... Second exclusive OR circuit 31 ...... Decoder S1 ...... Speed sensor S2 ...... Digital tachometer

Claims (1)

[Claims] 1. A data counting system for an operation recording apparatus, comprising a counting circuit for inputting and counting pulse signals detected from a sensor and outputting the number of signals counted immediately before in synchronization with an input clock. The dummy pulse generating means for outputting a dummy pulse signal each time the number of signals counted by is written and cleared, and the above-mentioned dummy pulse signal together with the pulse signal from the sensor are input and the exclusive OR is calculated to obtain the clock of the counting circuit. A data counting system for an operation recording device, comprising: an exclusive OR circuit for outputting to a terminal; and a data adjusting means for subtracting a dummy pulse signal component from the number of signals counted by the counting circuit and storing it in a memory.