JPH076330B2 - Electric control unit for vehicle door opening and closing system - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a vehicle door opening / closing system, and more particularly, to an opening / closing opening of a vehicle such as a wagon or a bus, which can be opened / closed laterally along the opening / closing opening. The present invention relates to an electric control device for a vehicle opening / closing system suitable for controlling opening / closing of a provided door by a rotary electric motor.

[Prior art]

Conventionally, in an electric control device for a vehicle door opening / closing system of this type, as disclosed in, for example, JP-A-58-69980, a resistor is connected in series to a rotary electric motor, and When the rotation speed becomes lower than the allowable lower limit value, the resistance is short-circuited, and the voltage applied to the rotary motor is increased by an amount corresponding to the resistance short circuit, which causes an unnecessary decrease in the rotation speed of the rotary motor. Instead, there is one that keeps the time required to close or open the door within a substantially constant range.

[Problems to be solved by the invention]

However, in such a configuration, when the load on the rotary motor is light, the rotation speed of the rotary motor increases too much in the closing or opening process of the door, and the closing speed or the opening speed of the door increases too much. On the other hand, when the load on the rotary electric motor is heavy, there is a problem that the rotational speed of the rotary electric motor is too low in the closing and opening process of the door, and the closing and opening speed is too low. In addition, such a problem was more remarkable because the lower limit of tolerance was unchanged.

In order to cope with such a situation, the present invention sets an upper limit value and a lower limit value of an allowable rotation speed range of a rotary electric motor in a vehicle door opening / closing system based on a time required for the door to reach a predetermined opening / closing degree after the opening / closing operation is started. The present invention seeks to provide an electrical control device that is adapted to make a decision.

[Means for solving problems]

In solving such problems, the structural features of the present invention are as follows.
It is applied to a door opening / closing system equipped with a rotary electric motor that opens and closes a door that can be opened and closed laterally along the entrance and exit of a vehicle by rotating in one direction and rotating in the other direction.
Operating means for generating a first operation signal when the door is opened and a second operation signal when the door is closed, and a first drive state in response to the first operation signal to bring the rotary electric motor into one direction. As described above, the power supply to the rotary motor from the power supply via the resistor is allowed, the second drive state is set in response to the second operation signal, and the rotary motor is rotated from the power supply via the resistor to the other direction to rotate the rotary motor in the other direction. Drive means for allowing power supply to the motor, speed detection means for detecting the rotation speed of the rotary motor and generating it as a speed detection signal, and short-circuit means for selectively short-circuiting the resistor according to the value of the speed detection signal. In an electric control device provided, timing detection means for detecting a predetermined initial opening opening timing (or predetermined initial closing degree closing timing) of the door and generating it as a timing detection signal, and the first (or second) Integrating means for integrating the elapsed time after the generation of the working signal to generate an integrated signal, and an upper limit value and a lower limit value of the permissible rotation speed width of the rotary motor in response to the timing detection signal, and a small value of the integral signal. (Or large) to determine both large (or small) and generate as an upper limit value signal and a lower limit value signal, respectively, and an output signal when the value of the speed detection signal exceeds the value of the upper limit value signal. Output signal generating means for extinguishing the output signal when the value of the speed detection signal becomes smaller than the value of the lower limit value signal, and the driving in response to the generation of the output signal when the value of the integration signal is small. First of means (or second)
Of the output signal is allowed to disappear in response to the disappearance of the output signal, and the return of the driving means to the first (or second) driving state is allowed. And a control means for releasing the short circuit of the resistor by the short circuit means in response to the occurrence and controlling the short circuit of the resistor by the short circuit means in response to the disappearance of the output signal. .

[Action effect]

Thus, according to the present invention, when the vehicle is opened and closed when the vehicle is stopped by inclining in the opening and closing direction of the door, the weight of the door is opened and closed by its own weight. After the generation of the first (or second) operation signal, even if the load of the rotary motor is reduced on one side and the load of the rotary motor is increased on the other side of the opening process and the closing process, Each value of the upper limit value signal and the lower limit value signal generated from the determination means in response to the generation of the timing detection signal from the timing detection means is the value of the integrated signal, that is, the door of the door determined by the generation of the timing detection signal. Predetermined initial opening degree opening time (or prescribed initial closing degree closing time)
Both are determined to be larger (or smaller) as they are shorter (or longer), and the generation timing and disappearance timing of the output signal from the output signal generation means are based on increase and decrease of the rotation speed according to the load of the rotary electric motor. The value of the speed detection signal is determined by each reaching time of the value of the upper limit signal and the value of the lower limit signal, the control means, when the value of the integration signal is small, by the generation of the output signal of the drive means The first (or second) driving state is extinguished to reduce the rotation speed of the rotary electric motor, and the extinction of the output signal causes the driving means to return to the first (or second) driving state to perform the rotation. When the value of the integrated signal is large, the rotation speed of the electric motor is increased, and in response to the generation of the output signal, the short circuit of the resistor by the short-circuiting means is released to decrease the rotation speed of the rotary electric motor. In response to the disappearance of the output signal, the short circuit of the resistor by the short circuit means is allowed to increase the rotation speed of the rotary electric motor, so that the rotary electric motor is low in accordance with the large load thereof and small in load. Therefore, the opening speed (that is, opening time) and the closing speed (that is, closing time) of the door are determined by the load of the rotary motor. Regardless of fluctuations, it can always be maintained accurately and constantly.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.
FIG. 2 and FIG. 2 show an example in which the electric control device according to the present invention is applied to the opening / closing mechanism 20 of the bus door 10.
The bus is provided on the side wall of the bus so that it can be opened and closed in the front-rear direction along the door. The opening / closing mechanism 20 is provided with a stepped drive shaft 21 suspended from a part of the floor surface of the bus in the bus, and the drive shaft 21 extends horizontally from a part of the inner wall of the bus. It is rotatably supported in a horizontal direction between the support arm 22 and a part of the floor surface. Drive shaft 21
A pair of upper and lower connecting arms 21 extending horizontally from the large diameter part of the
Each of a and 21a is connected to the inner wall portion of the door 10 at each tip so as to be rotatable relative to the inner wall portion in the horizontal direction, whereby the drive shaft 21 is rotated counterclockwise in FIG. When the door 10 is rotated, the connecting arm 21a, 21a
Behind the bus due to the action of a (left in the figure in Fig. 2)
When the drive shaft 21 rotates clockwise in this state, the door 10 is closed toward the front of the bus (right side in FIG. 2) by the action of the connecting arms 21a and 21a. Further, the opening / closing mechanism 20 includes a large-diameter spur gear 23 pivotally supported on the lower end of the large-diameter portion of the drive shaft 21, and a small-diameter spur gear that meshes with the spur gear 23.
The spur gear 24 is integrally supported by the output shaft of the DC motor M mounted on the floor of the bus.
When the door 10 is fully opened (or fully closed), the door 10 is in a fully opened state (or fully closed state) due to engagement / disengagement with a fully opened lock mechanism (or fully closed lock mechanism) provided at a peripheral portion of the entrance / exit. Closed). The forward rotation (or reverse rotation) of the DC motor M corresponds to the opening (or closing) of the door 10.

As shown in FIG. 1, the electric control device has an operation switch 30.
And a fully open detection switch 40a, a fully closed detection switch 40b,
The auxiliary detection switch 40c and the relays 50, 60, 70 connected to the operation switch 30 are included, and the operation switch 30 is arranged near the driver's seat of the bus and is connected to the DC power supply via the ignition switch IG of the bus. A double throw contact 31 connected to the positive terminal of B and a pair of fixed contacts 32, 33 are provided. In response to the connection of the double throw contact 31 with the fixed contact 32, the operation switch 30 generates the first operation signal required for opening the door 10 at a high level, and the fixed contact of the double throw contact 31. In response to the connection with 33, the second operation signal necessary for closing the door 10 is generated at a high level, and the fixed contacts 32, 33 of the double throw contact 31 are also generated.
The generation of the first and second operation signals is stopped in the cutoff state, that is, in the neutral state.

The full-open detection switch 40a is a normally closed type, and is opened only when the door 10 is fully opened to generate a full-open detection signal at a high level. The fully closed detection switch 40b is of a normally closed type and is opened only when the door 10 is fully closed to generate a fully closed detection signal at a high level. Auxiliary detection switch 40c is a normally open type and door 10
Is closed to the position just before the fully closed position, and the position detection signal immediately before the fully closed position is generated at a low level. Relay 50
Has an electromagnetic coil 51 and a double throw switch 52,
The double throw switch 52 closes the double throw contact 52a to the fixed contact 52b (or 52c) by exciting (or demagnetizing) the electromagnetic coil 51. In such a case, the double throw contact 52a is connected to the first input terminal of the DC motor M, the fixed contact 52b is connected to the positive terminal of the DC power supply B, while the fixed contact 52c is grounded.

The relay 60 has an electromagnetic coil 61 and a double throw switch 62. The double throw switch 62 turns on the double throw contact 62a to the fixed contact 62b (or 62c) by exciting (or demagnetizing) the electromagnetic coil 61. . In such a case, the double throw contact 62a is connected to the second input terminal of the DC motor M via the load resistor 80, the fixed contact 62b is connected to the positive terminal of the DC power source B, while the fixed contact 62c is grounded. ing. The relay 70 has an electromagnetic coil 71
And a normally open switch 72 that is closed (or opened) by exciting (or demagnetizing) the electromagnetic coil 71,
The switch 72 is connected in parallel with the load resistor 80.

In addition, as shown in FIG. 1, the electric control device includes a pair of inverters 90a and 90b and a pair of negative AND gates 100a and 1a.
00b (negative logic NAND gates 100a, 100b). The negative AND gate 100a is connected to the fixed contact 32 of the operation switch 30 through the inverter 90a at its first inverting input terminal, and its second inverting input. Fully open detection switch 40a
It is grounded through. Then, the negative AND gate 100a responds to the disappearance (or generation) of the full-open detection signal from the full-open detection switch 40a under the inverting action of the inverter 90a in response to the generation of the first operation signal from the operation switch 30. Generates a low level signal (or a high level signal). When the first operation signal from the operation switch 30 disappears, the negative AND gate 100a produces a high level signal.

The negative AND gate 100b is connected at its first inverting input terminal to the fixed contact 33 of the operation switch 30 via the inverter 90b, and the second gate of the negative AND gate 100b is connected.
The inverting input terminal is grounded via the fully closed detection switch 40b. Then, the negative AND gate 100b disappears (or generates) the fully closed detection signal from the fully closed detection switch 40b under the inversion action of the inverter 90b in response to the generation of the second operation signal from the operation switch 30. In response, a low level signal (or a high level signal) is generated. When the second operation signal from the operation switch 30 disappears, the negative AN
D-gate 100b produces a high level signal.

In addition, the electric control device includes a negative NAND gate 110 (a negative logic AND gate 110) and a pair of inverters 120a and 120b.
And a pair of negative NAND gates 130a and 130b and a pair of monostable multivibrators 140a and 140b. The negative NAND gate 110 is connected to the output terminal of the negative AND gate 100b at its first inverting input terminal. The second inverting input terminal is grounded via the auxiliary detection switch 40c. Then, the negative NAND gate 110
During the generation of the low level signal from the negative AND gate 100b, a high level signal (or a low level signal) is generated in response to the disappearance (or generation) of the position detection signal immediately before the full closing from the auxiliary detection switch 40c. The negative NAND gate 110 also generates a high level signal in response to the high level signal from the negative AND gate 100b.

The negative NAND gate 130a has its first inverting input terminal connected to the output terminal of the negative AND gate 100a, and the second inverting input terminal of the negative NAND gate 130a is grounded through the inverter 120a and the fully closed detection switch 40b. ing. Therefore, the negative NAND gate 130a generates a low level signal from the negative AND gate 100a and generates a low level signal from the fully closed detection switch 40b. Generates a high level signal (or a low level signal) in response to the inversion action of the inverter 120a in response to the generation (or disappearance) of. In addition, the NAND gate 130a is a negative AND gate 100
It produces a low level signal in response to a high level signal from a.

The negative NAND gate 130b is connected at its first inverting input terminal to the output terminal of the negative AND gate 100b, and the second inverting input terminal of this negative NAND gate 130b is grounded through the inverter 120b and the full-open detection switch 40a. There is. Accordingly, the negative NAND gate 130b receives a high level signal in response to the generation (or disappearance) of the full open detection signal from the full open detection switch 40a under the generation of the low level signal from the negative AND gate 100b. A level signal (or low level signal) is generated. Further, the NAND gate 130b is a negative AND gate 100b.
Produces a low level signal in response to a high level signal from. The monostable multivibrator 140a generates a timer signal at a high level in response to the high level signal from the negative NAND gate 130a, while the monostable multivibrator 140a.
140b generates a timer signal at a high level in response to the high level signal from the negative NAND gate 130b. In such a case, the generation time of each timer signal from both monostable multivibrators 140a, 140b corresponds to each time required for the initial opening operation and the initial closing operation of the door 10, respectively.

The negative AND gate 150a has its first inverting input terminal grounded through the full open detection switch 40a, and the second inverting input terminal of this negative AND gate 150a has grounded through the full close detection switch 40b. Then, the negative AND gate 150a generates a low level signal in response to the disappearance of both the fully open detection signal from the fully open detection switch 40a and the fully closed detection signal from the fully closed detection switch 40b, and outputs from the fully open detection switch 40a. A high level signal is generated in response to the generation of the fully open detection signal or the fully closed detection signal from the fully closed detection switch 40b. In such a case, the conversion timing of the output from the negative AND gate 150a from the high level to the low level corresponds to the predetermined initial opening degree (or the predetermined initial closing degree) of the door 10. The integration circuit 160 receives the first (or second) operation signal from the operation switch 30 through the OR gate 150b, integrates the elapsed time after the generation of the operation signal, and generates the integrated signal.

The speed sensor 170 detects the rotation speed N of the DC motor M and generates a series of pulse signals having a frequency proportional to this. Frequency-voltage converter 180 (hereinafter, F-V converter 180)
Converts the frequency of each pulse signal from the speed sensor 170 into a speed voltage of a level proportional to this. In such a case, F
The speed voltage from the −V converter 180 corresponds to the rotation speed N of the DC motor M.

The sample-hold circuit 190 has a normally open type analog switch 191 as shown in FIG. 3. The analog switch 191 has an integrating circuit at its input terminal 191a as shown in FIGS. Connected to the output terminal of 160,
The control terminal 191b is connected to the output terminal of the negative AND gate 150a. Then analog switch 19
1 is closed in response to the low level signal from the negative AND gate 150a and outputs the integrated signal from the integrator circuit 160 to the output terminal 1
It originates from 91c. The field effect transistor 193 has an analog switch 191 at its gate terminal via a capacitor 192.
This transistor 19 is connected to the output terminal 191c of
The drain terminal of 3 is grounded via a resistor 194, while the source terminal of the transistor 193 is connected to the DC power supply to receive the power supply voltage + Vcc from the DC power supply. Then, the transistor 193 holds the level of the integrated signal from the analog switch 191 in cooperation with the capacitor 192 and generates a hold voltage from its drain terminal.

As shown in FIGS. 1 and 4, the load area determination circuit 200 includes a voltage divider 201, comparators 202, 203 and 204 connected to the voltage divider 201 and the sample hold circuit 190, and AND gates 205 and 206 connected to both the comparators 203 and 204. It is composed of and. The voltage divider 201 is composed of resistors 201a, 201b and 201c connected in series with each other.
Divide the voltage according to each resistance value of a, 201b and 201c.
First from the common terminal of 01b and the common terminal of both resistors 201b and 201c
And a second divided voltage, respectively. In such cases,
The first and second divided voltages from the voltage divider 201 are the direct current motor M
The resistance values of the resistors 201a, 201b, 201c are determined so as to correspond to the upper limit value of the heavy load region rotational speed and the upper limit value of the medium load region rotational speed, respectively.

The comparator 202 compares the hold voltage from the sample and hold circuit 190 with the first divided voltage from the voltage divider 201, and when the hold voltage is lower (or higher) than the first divided voltage, a high level signal (or Low level signal). This means that the comparator 202 generates the high level signal as the first determination signal representing the heavy load region of the DC motor M (N <the heavy load region rotation speed upper limit value). The comparator 203 compares the hold voltage from the sample and hold circuit 190 with the first divided voltage from the voltage divider 201, and when the hold voltage is higher (or lower) than the first divided voltage, a high level signal (or Low level signal). The comparator 204 divides the hold voltage from the sample hold circuit 190 into a voltage divider 201.
A high level signal (or a low level signal) is generated when the hold voltage is higher (or lower) than the second divided voltage as compared with the second divided voltage from.

The AND gate 205 has a non-inverting input terminal connected to the output terminal of the comparator 203, and the inverting input terminal of the AND gate 205 is connected to the output terminal of the comparator 204. Then, the AND gate 205 generates a high level signal in response to the high level signal from the comparator 203 and the low level signal from the comparator 204, and outputs this high level signal from the high level signal from the comparator 204 or from the comparator 203. It disappears in response to a low level signal. This means that the AND gate 205 outputs the high level signal as the second determination signal representing the medium load region of the DC motor M (the heavy load region rotation speed upper limit value <N <the medium load region rotation speed upper limit value). Means that. The AND gate 206 generates a high level signal in response to each high level signal from both comparators 203 and 204, and extinguishes this high level signal in response to the low level signal from the comparator 203 (or 204). This is AND gate 206
Means that the high level signal is generated as the third determination signal representing the light load region of the DC motor M (the upper limit value of the rotation speed of the medium load region <N).

The speed discriminating circuit 210, as shown in FIGS. 1, 4, and 5, is a voltage divider 210a connected to the load region determining circuit 200.
And comparators 210b, 210c, 210d and 210e connected to the voltage divider 201a and the FV converter 180. The voltage divider 210a has transistors 211, 212, 213, and the transistor 211 is connected at its base to the output terminal of the comparator 202 via the resistor 211a (see FIGS. 4 and 5). The transistor 211 is grounded at its emitter, and is connected at its collector to the positive terminal of a DC power supply (not shown) via resistors 214, 217, 218, 219 connected in series. Therefore, the transistor 211 becomes conductive (or non-conductive) in response to the generation (or disappearance) of the first determination signal from the comparator 202.

The transistor 212 is ANDed at its base via the resistor 212a.
It is connected to the output terminal of gate 205 and the emitter of this transistor 212 is grounded while the transistor 2
The twelve collectors are resistors 215,217,21 connected in series with each other.
It is connected to the positive terminal of the DC power supply through 8,219. Thus, the transistor 212 becomes conductive (or non-conductive) in response to the generation (or disappearance) of the second decision signal from the AND gate 205. The transistor 213 is connected at its base to the output terminal of the AND gate 206 via a resistor 213a, the emitter of this transistor 213 is grounded, while the collector of this transistor 213 is via each resistor 216, 217, 218, 219 connected in series. It is connected to the positive terminal of the DC power supply. Thus, the transistor 213 becomes conductive (or non-conductive) in response to the generation (or disappearance) of the third decision signal from the AND gate 206.

In addition, each series resistor 214, 217, 218, 219 is connected to the transistor 211.
The power supply voltage + Vcc from the direct-current power source is divided under the conduction of each of the output terminals P1, P2 and P3 as the first, second and third heavy load reference voltages (see FIG. 5). See each). Each series resistor 215,217,218,219 is
While the transistor 212 is conducting, the power supply voltage + Vcc from the DC power source is divided, and the divided voltages are used as the first, second and third medium load reference voltages, and the output terminals P1, P2 and P3.
It occurs from each. In addition, each DC string resistor 216,217,21
8, 219 divides the power supply voltage + Vcc from the DC power source under the conduction of the transistor 213, and divides each of these divided voltages into the first voltage.
1, Output terminals P1, P as the second and third light load reference voltages
It occurs from 2 and P3 respectively.

In such a case, the first, second and third light load reference voltages from the voltage divider 210a are the lower limit of rotation speed N1H, the intermediate value of rotation speed N2H and the upper limit of rotation speed N in the heavy load region of the DC motor M.
Corresponds to 3H respectively. Further, the first, second and third medium load region reference voltages from the voltage divider 210a are the rotational speed lower limit value N1M and the rotational speed intermediate value N2 in the medium load region of the DC motor M.
It corresponds to M and the rotation speed upper limit value N3M, respectively. further,
The second and third light load reference voltages from the voltage divider 210a correspond to the rotation speed lower limit value N1L, the rotation speed intermediate value N2L and the rotation speed upper limit value N3L in the light load region of the DC motor M, respectively. However, the resistance value of the resistor 214 <the resistance value of the resistor 215 <the resistance
It has a resistance value of 216, and N1H <N1M <N1L, N2H <
N2M <N2L, N3H <N3M <N3L.

The comparator 210b outputs the speed voltage from the FV converter 180 to the first heavy load reference voltage from the output terminal P1 of the voltage divider 210a,
The high-level signal is generated only when the voltage is lower than the first medium load reference voltage or the first light load reference voltage, and the comparator 210c
A high level signal is generated only when the speed voltage from the FV converter 180 is higher than the second heavy load reference voltage, the second medium load reference voltage or the second light load reference voltage from the output terminal P2 of the voltage divider 210a. , The comparator 210d is high only when the speed voltage from the FV converter 180 is lower than the second heavy load reference voltage, the second medium load reference voltage or the second light load reference voltage from the output terminal P2 of the voltage divider 210a. A level signal is generated, and the comparator 210e indicates that the speed voltage from the FV converter 180 is the third heavy load reference voltage from the output terminal P3 of the voltage divider 210a, the third medium load reference voltage, or the third light load reference voltage. Generates a high level signal only when higher than the voltage.

As shown in FIGS. 1, 4, and 5, the timer circuit 220 is connected between the load region determination circuit 200, the speed determination circuit 210 and the positive NOR gate 280. Integrator 220a connected to speed discrimination circuit 210
And a voltage divider 220b connected to the load region determination circuit 200 and a comparator 220c connected to the integrator 220a and the voltage divider 220b.
And A connected to the speed discrimination circuit 210 and the comparator 220c.
It is composed of an ND gate 220d. The integrator 220a is
The high level signal is received from the comparator 210e through the buffer 221 and the generation time of this high level signal is integrated by the resistor 222 and the capacitor 223 to generate an integrated signal.

The voltage divider 220b has transistors 224, 225, 226, and the transistor 224 is connected at its base to the output terminal of the comparator 202 via the resistor 224a. Also,
The transistor 224 is grounded at its emitter and is connected at its collector through the resistors 227 and 229a to the positive terminal of the DC power supply. Therefore, the transistor 224 generates (or disappears) the first decision signal from the comparator 202.
To become conductive (or non-conductive). Transistor 22
5 is connected to the output terminal of the AND gate 205 through the resistor 225a at its base, the emitter of this transistor 225 is grounded, while the collector of this transistor 225 is through both resistors 228 and 229a, the positive side of the DC power source. It is connected to the terminal. Then, transistor 225 is AND gate 205
Becomes conductive (or non-conductive) in response to the generation (or disappearance) of the second determination signal from.

The transistor 226 is ANDed at its base via a resistor 226a.
It is connected to the output terminal of gate 206 and the emitter of this transistor 226 is grounded while this transistor 2
The collector of 26 is connected to the positive terminal of the DC power supply through both resistors 229 and 229a. Then, the transistor 226
Is the generation (or disappearance) of the third decision signal from the AND gate 206
To become conductive (or non-conductive). Each series resistance 227,
229a divides the power supply voltage + Vcc from the DC power source under the conduction of the transistor 224 to generate a first divided voltage from the output terminal d (see FIG. 6).

Each series resistor 228,229a divides the power supply voltage + Vcc from the DC power source under the conduction of the transistor 225 to generate a second divided voltage from the output terminal d, and each series resistor 229,229a.
Is generated from the output terminal d as the third divided voltage by dividing the power supply voltage + Vcc from the DC power source while the transistor 226 is conducting. In such a case, the resistance values of the resistors 227, 228, 229 are sequentially set to be smaller so that the first divided voltage> the second divided voltage> the third divided voltage.

The comparator 220c generates a high level signal (or low level signal) when the first, second or third divided voltage from the voltage divider 220b is higher (or lower) than the level of the integrated signal from the integrator 220a. To do. AND gate 220d has both comparators 2
A high level signal (or a low level signal) is generated in response to both of the high level signals from 10e and 220c (or one of the low level signals). This is the AND gate 220d
Means that the high level signal is generated as a timer signal. In such a case, the generation time of the timer signal from the AND gate 220d is sequentially shortened from the generation of the first to the third divided voltage from the voltage divider 220b.

As shown in FIGS. 1 and 5, the RS flip-flop 230 is connected at its set terminal S to the output terminal of the comparator 210e of the speed discrimination circuit 200, while at its reset terminal R is connected to the output terminal of the comparator 210d. It is connected to the. Therefore, the RS flip-flop 230 is set in response to the high level signal from the comparator 210e and generates a low level signal from its output terminal Q through the buffer 231 and also responds to the high level signal from the comparator 210d. Is reset from its output terminal Q to the buffer 23
A high level signal is generated through 1. RS flip-flop 2
40 is connected at its set terminal S to the output terminal from the comparator 210c.
The reset terminal R of is connected to the output terminal of the comparator 210b. Then, the RS flip-flop 240 is set in response to the high level signal from the comparator 210c to generate a low level signal from its output terminal Q, and is reset in response to the high level signal from the comparator 210b. A high level signal is generated from the output terminal Q.

As shown in FIG. 1, the negative NAND gate 260 has its first inverting input terminal connected through the OR gate 250 to the output terminal of the negative NAND gate 110 and the output terminals of both the monostable multivibrators 140a and 140b. The second inverting input terminal of the negative NAND gate 260 is connected to the output terminal Q of the RS flip-flop 230 through the buffer 231. The OR gate 250 is a high level signal from the negative NAND gate 110 and the bi-stable multivibrator 14
It generates a high level signal (or low level signal) in response to one occurrence of each timer signal from 0a, 140b (or the disappearance of all three of these three signals). The negative NAND gate 260 generates a low level signal in response to at least one of the high level signals from the OR gate 250 and the buffer 231, and a high level signal in response to both the low level signals from the OR gate 250 and the buffer 231. Generate a signal.

The negative AND gate 270a generates a high level signal in response to at least one of the high level signals from the negative AND gate 100a and the negative NAND gate 260, and outputs a high level signal to each low level signal from the negative AND gate 100a and the negative NAND gate 260. In response, a low level signal is generated. This means that the electromagnetic coil 51 of the relay 50 is excited (or demagnetized) in response to the low level signal (or high level signal) from the negative AND gate 270a. The negative AND gate 270b generates a high level signal in response to at least one of the high level signals from both the negative AND gates 100b and the negative NAND gate 260, and the negative AND gate 100b and the negative NAND gate 100b.
A low level signal is generated in response to each high level signal from gate 260. This is the electromagnetic coil of relay 60
It means that 61 is excited (or demagnetized) in response to the low level signal (or high level signal) from the negative AND gate 270b. Positive NOR gate 280 responds to the timer signal from timer circuit 220, the high level signal from RS flip-flop 240 and the generation of one of the high level signals from OR gate 250 (or the disappearance of these three signals). A level signal (or high level signal) is generated. This means that the electromagnetic coil 71 of the relay 70 is positive.
It means to be excited (or demagnetized) in response to the low level signal (or high level signal) from the NOR gate 280.

In the present embodiment configured as described above, the bus running under the closing of the ignition switch IG,
It is assumed that the DC motor M stops on a traveling road surface corresponding to a medium load region (for example, a relatively flat traveling road surface). Then, in such a state, since the door 10 is in the fully closed state, the fully closed detection switch 40b becomes the fully opened detection switch 4b.
The fully closed detection signal is generated based on the disappearance of the fully opened detection signal from 0a, the high level signal is generated from the negative AND gate 150a, and the auxiliary detection switch 40c generates the position detection signal immediately before fully closed. Further, each operation signal from the operation switch 30 has disappeared, and the FV converter 180 to the speed sensor 170 has disappeared.
The speed voltage generated by the cooperation with the is zero because the DC motor M is stopped.

When the first operation signal (see symbol a in FIG. 7) is generated by the operation of the operation switch 30 to open the door 10 in such a state, the negative AND gate 100a opens the full open detection switch 40a. Inverter 90 responding to the first operation signal from operation switch 30 under the disappearance of the detection signal
The negative NAND gate 130a responds to the fully closed detection signal from the fully closed detection switch 40b by generating the low level signal in response to the inversion action of a and the low level signal from the negative AND gate 100a under the inversion action of the inverter 120a. A monostable multivibrator that generates a high level signal in response to a signal
Generate a timer signal from 140a.

In addition, the RS flip-flop 230 is set by the OR gate 150b in response to the first operation signal from the operation switch 30 to generate a low level signal, and the negative NAND gate 260
Receives the RS flip-flop 2 under the action of the OR gate 250 in response to the timer signal from the monostable multivibrator 140a.
Generates a low level signal in response to a high level signal from 30 and negative AND gate 270a produces a low level signal in response to a low level signal from negative AND gate 100a and a low level signal from negative NAND gate 260. Occur. Further, the positive NOR gate 280 receives the timer signal from the monostable multivibrator 140a through the OR gate 250 and generates a low level signal. Further, the integrator circuit 160 receives the first operation signal from the operation switch 30 through the OR gate 150b and integrates the elapsed time after the generation of the first operation signal to generate an integrated signal.

Then, the relay 50 turns on the double throw contact 52a of the double throw switch 52 to the fixed contact 52b by exciting the electromagnetic coil 51 in response to the low level signal from the negative AND gate 270a (see reference numeral b1 in FIG. 7). Also, relay 70 is positive N
The switch 72 is activated by exciting the electromagnetic coil 71 in response to the low level signal from the OR gate 280 (see reference numeral c1 in FIG. 7).
To close the load resistor 80. At this time, the relay 60 is in the state shown in FIG. 1 under the high level signal from the negative AND gate 270b. Then, the power supply current from the DC power source B flows through the fixed contact 52b and the double throw contact 52a of the relay 50 into the DC motor M from its first input terminal and flows out from the second input terminal of the DC motor M, and then the switch 72. And through the double throw contact 62a of the relay 60 into the fixed contact 62c. In other words, the DC motor M directly receives the power supply current from the DC power supply B when the load resistance 80 is short-circuited, and starts to increase the forward rotation speed along the curve d1 in FIG. Then, the spur gear 24 is rotated counterclockwise by the spur gear 24 interlocked with the direct-current motor M, and the drive shaft 21 is accordingly rotated by the drive shaft 21.
By a, the door 10 starts to open to the left in the drawing in FIG. 2 against the engaging force with the fully closed lock mechanism.

In the above process, the negative AND gate 150a
When the high-level signal from the signal becomes low level in response to the disappearance of the fully closed detection signal from the fully closed detection switch 40b based on the opening of the door 10 at the predetermined initial opening, the sample hold circuit 19
0 holds the level of the integrated signal generated from the integration circuit 160 at this stage (corresponding to the predetermined initial opening opening time of the door 10 in the medium load area of the DC motor M) as the hold voltage, and causes the load area determination circuit 200 to hold it. Give. Then, in the load area determination circuit 200, the sample hold circuit 1
Since the hold voltage from 90 is between the first and second divided voltage from the voltage divider 201, the comparator 203 receives the first decision signal from the comparator 202 and the high level signal from the comparator 204, respectively. Generates a high level signal and the AND gate 205 generates a second decision signal. Note that AN
The third decision signal from D-gate 206 remains extinguished.

Next, in the speed discrimination circuit 201, the transistor 212
Becomes conductive in response to the second decision signal from the AND gate 205 of the load region decision circuit 200, and each series resistor 215, 217, 218, 219 outputs the first, second and second middle load reference voltage from each output terminal P1, P2, P3. It occurs respectively. At this stage, based on the increase in the forward rotation speed of the DC motor M, the FV converter 180 changes the speed sensor 1
The speed voltage generated by the cooperation with 70 is the speed determination circuit 210.
When the voltage becomes higher than the second medium load reference voltage from the voltage divider 210a, the comparator 210c generates a high level signal and each of the comparators 210b, 210d, 210e generates a low level signal.

Then, the RS flip-flop 240 generates a low level signal in response to the high level signal from the comparator 210c and generates a high level signal from the positive NOR gate 280 under the disappearance of the timer signal from the monostable multivibrator 140a, In response to this, the relay 70 eliminates the electromagnetic coil 71 (see reference numeral c2 in FIG. 7) to open the switch 72 and release the short circuit of the load resistor 80. This means that the DC motor M
Means to increase the forward rotation speed along the curve d2 in FIG. 7 by receiving the voltage obtained by subtracting the voltage drop due to the load resistance 80 from the power supply voltage from the DC power supply B. In this case, as understood from both curves d1 and d2, the degree of increase in the forward rotation speed of the DC motor M is N1M <N in relation to the load resistance 80.
When N2M <N <N3M rather than <N2M, it becomes gentle and saturated.
Therefore, the door 10 continues to open while reducing the increase rate of its opening speed. In other words, in the medium load region (see reference numeral 1 in FIG. 7), the rotation speed of the DC motor M is N2M <N <N.
The upward saturation tendency is maintained in the range of 3M and the opening speed of the door 10 is maintained substantially constant.

When the door 10 is fully opened, the fully open detection switch 40a generates a fully open detection signal, the negative AND gate 100a generates a high level signal, the negative AND gate 270a generates a high level signal, and the relay 50 causes the electromagnetic coil 51 to operate. By demagnetizing, the double throw contact 52a is closed to the fixed contact 52c, and the DC motor M is cut off from the DC power supply B. As a result, the direct-current motor M stops the forward rotation and stops the opening operation of the drive mechanism 20 for the door 10. In this case, the door 10 is easily engaged with the full-open lock mechanism and maintained in the full-open state due to the inertia due to the opening speed. After the door 10 is fully opened in this way, the operation switch 30 is kept in the neutral state.

When a second operation signal (see symbol A in FIG. 7) is generated by the operation of the operation switch 30 to close the door 10 in such a state, the negative AND gate 100b outputs a signal from the fully closed detection switch 40b. Under the disappearance of the fully closed detection signal, the low level signal is generated by receiving the inverting action of the inverter 90b in response to the second operation signal, and the negative NAND gate 13
0b generates a high level signal in response to the low level signal from the negative AND gate 100b under the inverting action of the inverter 120b in response to the full open detection signal from the full open detection switch 40a, and outputs the timer signal from the monostable multivibrator 140b. Generate.

Further, the RS flip-flop 230 is reset by the OR gate 150b in response to the second operation signal from the operation switch 30 to generate a high level signal, and the negative NAND gate 26
0 generates a low level signal in response to the high level signal from the RS flip-flop 230 under the action of the OR gate 250 in response to the timer signal from the monostable multivibrator 140b, and the negative AND gate 270b is negative. A
Low level signal from ND gate 100b and negative NAND
The low level signal is generated in response to the low level signal from the gate 260. Further, the positive NOR gate 280 receives a timer signal from the monostable multivibrator 140b through the OR gate 250 and generates a low level signal. Further, the integrating circuit 160 receives the second operation signal from the operation switch 30 through the OR gate 150b, integrates the elapsed time after the generation of the second operation signal, and generates an integrated signal.

Then, the relay 60 turns on the double throw contact 62a to the fixed contact 62b by exciting the electromagnetic coil 61 in response to the low-level signal from the negative AND gate 270b (see reference numeral B1 in FIG. 7), and the relay 70 turns on the positive NOR. Excitation of the electromagnetic coil 71 in response to the low level signal from the gate 280 (reference numeral in FIG. 7)
(See C1) to close switch 72 and short-circuit load resistance 80. At this time, the relay 50 is in the state shown in FIG.

Then, the power supply current from the DC power source B flows through the fixed contact 62b of the relay 60, the double throw contact 62a and the switch 72 of the relay 70 into the second input terminal of the DC motor M, and the first input of the DC motor M. It flows out of the terminal, passes through the double throw contact 52a of the relay 50, and flows into the fixed contact 52c. In other words, the DC motor M directly receives the power supply voltage from the DC power supply B and starts increasing the reverse rotation speed along the curve D1 in FIG. 7 due to the short circuit of the load resistor 80. Then, the spur gear 23 is rotated clockwise by the spur gear 24 interlocking with the DC motor M, and in response to this, the drive mechanism 20 causes the connecting arms 21a and 21a to engage the door 10 with the fully open lock mechanism. It begins to close forward against.

In the above process, the negative AND gate 150a
When the high-level signal from the signal becomes low level in response to the disappearance of the full-open detection signal from the full-open detection switch 40a based on the closing of the door 10 at the predetermined initial closing degree, the sample hold circuit 19
0 holds the level of the integrated signal (corresponding to the predetermined initial closing degree closing time of the door 10 in the middle load region of the DC motor M) generated from the integrating circuit 160 at the present stage as a hold voltage, and the load region determining circuit 200 Given to.

Then, the load region determination circuit 200 generates the second determination signal based on the disappearance of the first and third determination signals as described above,
And the voltage divider 210a of the speed determination circuit 210 is the first, the same as above.
Generating second and third medium load reference voltages. At this stage, when the speed voltage generated by the cooperation of the FV converter 180 and the speed sensor 170 based on the increase in the reverse rotation speed of the DC motor M becomes higher than the second medium load reference voltage from the voltage divider 210a, The comparator 210c generates a high level signal and each of the comparators 210b, 210d, 210e generates a low level signal.

Then, the RS flip-flop 240 generates a low level signal in response to the high level signal from the comparator 210c, and in response thereto, the positive NOR gate 280 goes high in response to the disappearance of the timer signal from the monostable multivibrator 140b. A level signal is generated, and the relay 70 deenergizes the electromagnetic coil 71 (see symbol C2 in FIG. 7) to open the switch 72 and release the short circuit of the load resistor 80. This means that the DC motor M
Means that the reverse rotation speed is increased along the curve D2 in FIG. 7 by receiving the voltage obtained by subtracting the voltage drop due to the load resistance 80 from the power supply voltage from the DC power supply B. In such a case, as understood from both curves D1 and D2, the degree of increase in the reverse rotation speed of the DC motor M is N1M <N in relation to the load resistance 80.
When N2M <N <N3M rather than <N2M, it becomes gentle and saturated.
Therefore, the door 10 continues to close while reducing the increase in its opening speed. In other words, the medium load area (reference numeral I in FIG. 7)
2), the rotation speed of the DC motor M maintains a rising saturation tendency in the range of N2M <N <N3M, and the closing speed of the door 10 is maintained substantially constant.

When the door 10 reaches the position just before fully closed and a position detection signal just before fully closed is generated from the auxiliary detection switch 40c, the negative NAND gate
110 generates a high level signal and the positive NOR gate 28
0 acts on the OR gate 250 in response to the same high level signal to generate a low level signal, and the relay 70 short-circuits the load resistor 80 by closing the switch 72. Then, the voltage applied to the DC motor M rises by the short circuit of the load resistor 80, the reverse rotation speed of the DC motor M increases, and the closing force on the door 10 increases. This means that the door 10 is brought into the fully closed state while being easily engaged with the fully closed lock mechanism under the action of the drive mechanism 20.

When the door 10 is fully closed in this way, the fully closed detection switch 40b
Generates a full-closed detection signal, the negative AND gate 100b generates a low level signal, the negative AND gate 270b generates a high level signal, and the relay 60 demagnetizes the electromagnetic coil 61 to make the double throw contact 62a fixed contact 62c. To disconnect the DC motor M from the DC power supply B. As a result, the DC motor M stops the closing action of the drive mechanism 20 on the door 10 by preventing the reverse rotation. In this case, due to the inertia of the door 10 due to its closing speed, the door 10 is easily engaged with the fully closed lock mechanism and maintained in the fully closed state. After the door 10 is fully closed in this way, the operation switch 30 is kept in the neutral state.

Further, in the above description of the operation, it is assumed that the bus is stopped on the sloped road surface with its forward direction directed toward the top of the sloped road surface. When a first operation signal is generated from the operation switch 30 to open the door 10 in such a state, the DC motor M causes the DC power supply B to short-circuit the load resistor 80 in the same manner as described above. The power supply voltage is directly received to start normal rotation, and in response thereto, the drive mechanism 20 starts opening the door 10 against the engaging force with the fully closed lock mechanism. In such a case, the disengagement of the door 10 from the fully closed lock mechanism is further facilitated by the rearward weight of the door 10 to its own weight.

In the above process, the negative AND gate 150a
When the high level signal generated from the signal becomes low level as described above, the sample and hold circuit 190 causes the integration circuit 160 to
The level of the integrated signal (corresponding to the predetermined initial opening time of the door 10 in the light load region of the DC motor M) is held as a hold voltage and applied to the load region determination circuit 200. Then, in the load area determination circuit 200,
The hold voltage from the sample and hold circuit 190 is the voltage divider 2
Since it is higher than the second divided voltage from 10, both comparators 203,
Both 204 generate a high level signal under the extinction of the first decision signal from the comparator 202, and the AND gate 206 produces a third decision signal under the extinction of the second decision signal from the AND gate 205.

Then, in the speed determination circuit 210, the transistor 213
Becomes conductive in response to the third decision signal from the AND gate 206 of the load region decision circuit 200, and the series resistors 213, 217, 218, 219 output the first, second, and third light load reference voltages from the output terminals P1, P2, P3. It occurs respectively. At this stage, based on the increase in the forward rotation speed of the DC motor M, the FV converter 180 changes the speed sensor 120.
When the speed voltage generated by the cooperation with the voltage becomes higher than the second light load reference voltage from the voltage divider 210a of the speed determination circuit 210,
In the same manner as described above, the DC motor M operates on the basis of the power supply voltage from the DC power source B when the load resistance 80 is released from the short circuit.
The forward rotation speed is further increased while receiving the voltage reduced by the voltage drop due to. In such a case, the rear weight of the door 10 acts so as to reduce the load on the DC motor M, so that the forward rotation speed of the DC motor M continues to increase along the curve d3 in FIG. 7 and increases the opening speed of the door 10. Let

Based on the increase in the forward rotation speed of the DC motor M, the FV converter 180
When the speed voltage from the voltage divider is higher than the third light load reference voltage from the voltage divider 210a, the comparator 210e generates a high level signal, and in response thereto, the RS flip-flop 230 generates a low level signal. Further, in the timer circuit 220, the voltage divider 220b is the AND gate 206 of the load area determination circuit 200.
Generates a third divided voltage under the conduction of the transistor 226 in response to the third decision signal from the integrator 220a, and an integrator 220a generates an integrated signal in response to the start of integration in response to the high level signal from the comparator 210e. Then, the comparator 220c displays the second
A high level signal is generated based on the divided voltage> the level of the integrated signal, and a timer signal is generated from the negative AND gate 220d.

As described above, when the timer circuit 220 generates the low level signal from the RS flip-flop 230, the negative NAND gate 260 outputs the RS signal via the buffer 231.
In response to the low level signal from the flip-flop 230, a high level signal is generated to generate a high level signal from the negative AND gate 270a, while a positive NOR gate 2 is generated.
80 responds to the timer signal from timer circuit 220 to generate a low level signal. Then relay 50 is negative
Double throw contact by demagnetizing the electromagnetic coil 51 in response to the high level signal from the AND gate 270a (see b2 in FIG. 7)
52a is turned on to the fixed contact 52c, while the relay 70 closes the switch 72 by exciting the electromagnetic coil 71 in response to the low level signal from the positive NOR gate 280 to close the load resistance 80.
Short circuit. As a result, the direct current motor M is directly short-circuited at both input terminals thereof due to the short circuit of the load resistor 80, and a strong dynamic braking action occurs. As a result, the forward rotation speed of the DC motor M starts to decrease at the same time when it reaches the rotation speed upper limit N3L.
As shown by a curve d4 in the figure, the descent is made to effectively suppress an unnecessary increase in the opening speed of the door 10.

Next, if the speed voltage from the FV converter 180 is lower than the second light load reference voltage from the voltage divider 210a after the disappearance of the timer signal from the timer circuit 220 due to the decrease in the forward rotation speed of the DC motor M. , The comparator 210d generates a high level signal, the RS flip-flop 230 generates a high level signal, the negative NAND gate 260 generates a low level signal, the negative AND gate 270a generates a low level signal, and the relay 50 is electromagnetic. Excitation of coil 51 (reference numeral in FIG. 7)
The double throw contact 52a is closed by the fixed contact 52b (see b3). Then, the DC motor M stops its dynamic braking action and receives a power supply voltage from the DC power supply B via the load resistor 80 to increase the forward rotation speed along the curve d5 in FIG. As a result, the reduction in the opening speed of the door 10 is suppressed. After that,
Similarly, the DC motor M repeatedly decreases the forward rotation speed due to the dynamic braking action and increases the forward rotation speed due to the cancellation of the dynamic braking action. In other words, the DC motor M raises / decreases the forward speed in the range of N2L ≦ N ≦ N3L in the light load region (see the reference numeral II in FIG. 7) while increasing the opening speed of the door 10. Keep almost constant. In such a case, N2L> N2M and
Since N3L> N3M, the rotation speed range of the DC motor M under light load is maintained higher than the rotation speed range under medium load, and as a result, the opening speed of the door 10 is less than that of the DC motor M. Accurately maintained constant based on the rotation speed range that matches the load. The action when the door 10 is fully opened is the same as described above.

In such a state, the operation switch 30 should be closed to close the door 10.
When the second operation signal is generated from the DC motor M, the DC motor M is short-circuited by the load resistor 80 in the same manner as described above.
The drive mechanism 20 starts to close the door 10 forward against the full-open lock mechanism by directly receiving the power supply voltage from the drive mechanism 20 and reversing.
In such a case, the disengagement of the door 10 from the fully open lock mechanism is
Despite the rear weight of the door 10, this is easily done in connection with the short circuit of the load resistor 80. The electromagnetic coil 61 of the relay 60 is in an excited state (see reference numeral B2 in FIG. 7).

In the above process, the negative AND gate 150a
When the high level signal generated from the signal becomes low level as described above, the sample and hold circuit 190 causes the integration circuit 160 to
The level of the integrated signal from (corresponding to a predetermined initial closing degree closing time of the door 10 in the heavy load region of the DC motor M) is held as a hold voltage and applied to the load region determining circuit 200. Then, in the load area determination circuit 200,
The hold voltage from the sample and hold circuit 190 is the voltage divider 2
Since it is lower than the first divided voltage from 01, comparator 202
Generates a first decision signal based on the generation of low level signals from both comparators 203 and 204.

Then, in the speed determination circuit 210, the transistor 211
Is turned on in response to the first decision signal from the comparator 202 of the load area decision circuit 200, and the series resistors 214, 217, 218 and 219 respectively output the first, second and third heavy load reference voltages from the respective output terminals P1, P2 and P3. Occur. At this stage, when the speed voltage from the FV converter 180 becomes higher than the second heavy load reference voltage from the voltage divider 210a of the speed discriminating circuit 210 based on the increase in the reverse rotation speed of the DC motor M, the DC motor M becomes In the same manner as described above, when the short circuit of the load resistor 80 is released, the reverse rotation speed is attempted to be increased in the state of receiving the voltage obtained by subtracting the voltage drop due to the load resistor 80 from the power supply voltage from the DC power source B. . However, since the weight of the rear side of the door 10 acts to increase the load on the DC motor M, the reverse rotation speed of the DC motor M decreases along the curve d6 in FIG. Then,
The FV converter is based on the decrease in the reverse rotation speed of the DC motor M.
When the speed voltage from 180 drops below the first heavy load reference voltage from the voltage divider 210a, the comparator 210b generates a high level signal, the RS flip-flop 240 generates a high level signal, and the positive NOR gate 280 is low level. A signal is generated, and the relay 70 closes the switch 72 by exciting the electromagnetic coil 71 (see reference numeral C3 in FIG. 7) to load resistance 80.
Short circuit. Then, the DC motor M directly receives the power supply voltage from the DC power supply B due to the short circuit of the load resistor 80 against the dead weight of the receiving door 10 and increases the reverse rotation speed along the curve d7 in FIG. As a result, a decrease in the closing speed of the door 10 is suppressed.

Then, when the speed voltage from the FV converter 180 becomes higher than the second load reference voltage from the voltage divider 210a based on the increase in the reverse rotation speed of the DC motor M, the comparator 210c generates a high level signal and the RS flip-flop. 240 generates a low level signal to invert the low level signal from the positive NOR gate 280 into a high level signal, and the relay 70 deactivates the electromagnetic coil 71 (see C4 in FIG. 7) to switch 72.
Open and release the short circuit of load resistor 80. Then, the voltage applied to the DC motor M decreases by the amount of voltage drop due to the load resistance 80, and the reverse rotation speed of the DC motor M decreases along the curve d8 in FIG. Thereafter, in the same manner, the DC motor M repeats the increase of the reverse rotation speed due to the short circuit of the load resistor 80 and the decrease of the reverse rotation speed due to the release of the short circuit. In other words, the DC motor M
In the heavy load area (see symbol III in Fig. 7), N
In the range of 1H ≦ N ≦ N2H, the reverse speed is increased / decreased and the closing speed of the door 10 is maintained substantially constant. In this case, since N1H <N1M and N2H <N2M, the rotation speed range of the DC motor M under heavy load is kept lower than the rotation speed range under medium load, and as a result, the door 10 is closed. The speed is accurately maintained constant based on the rotation speed range that matches the actual load of the DC motor M. The action when the door 10 is fully closed is the same as described above.

Further, in the above operation, when the DC motor M is rotating in the medium load region or the heavy load region, the rotation speed of the DC motor M does not reach the rotation speed upper limit value N3M or N3H. However, instead of this, the FV converter during rotation in the middle load region of the DC motor M
When the speed voltage from 180 becomes higher than the third medium load reference voltage from the voltage divider 210a, the comparator 210e generates a high level signal and the RS flip-flop 230 generates a low level signal. Further, in the timer circuit 220, the voltage divider 220b generates the second divided voltage under the conduction of the transistor 225 in response to the second decision signal from the AND gate 205 of the load region decision circuit 200, and the integrator 220a. Is the comparator 21
Generate an integrated signal in response to a high level signal from 0e,
The comparator 220c generates a high level signal based on the second divided voltage> the level of the integrated signal, and the AND gate 2
Generate a timer signal from 20d.

Then, the negative AND gate 270a responds to the low level signal from the RS flip-flop 230.
In cooperation with the gate 260, the double throw contact 52a of the relay 50 is closed to the fixed contact 52c as described above, while the positive NO
The R gate 280 responds to the timer signal from the timer circuit 220 to short-circuit the load resistor 80 by the relay 70 in the same manner as described above. As a result, the direct current motor M is directly short-circuited at both input terminals thereof due to the short circuit of the load resistor 80, and a strong dynamic braking action occurs. In such a case, since the generation time of the timer signal from the timer circuit 220 is maintained longer than when the DC motor M is under a light load, the effect of reducing the rotation speed of the DC motor M after reaching the rotation speed upper limit N3H is effective. Can be realized very quickly.

In addition, while the DC motor M is rotating under a heavy load region, the F
The speed voltage from the −V converter 180 is the third voltage from the voltage divider 210a.
When the voltage becomes higher than the heavy load voltage, the comparator 210e generates a high level signal and the RS flip-flop 230 generates a low level signal. Further, in the timer circuit 220, the voltage divider 220b is the AND gate 202 of the load area determination circuit 200.
Generate a first divided voltage under the conduction of the transistor 224 in response to the first decision signal from the comparator 220a, the integrator 220a generates an integrated signal in response to the high level signal from the comparator 210e, and the comparator 220c , A high level signal is generated based on the first divided voltage> the level of the integrated signal, and AND
A timer signal is generated from the gate 220d.

Then, the negative AND gate 270a responds to the low level signal from the RS flip-flop 230.
In cooperation with the gate 260, the double throw contact 52a of the relay 50 is closed to the fixed contact 52c as described above, while the positive NO
In response to the timer signal from the timer circuit 220 of the R gate 280, the load resistor 80 is short-circuited by the relay 70 as described above. As a result, the direct current motor M is directly short-circuited at both input terminals thereof due to the short circuit of the load resistor 80, and a strong dynamic braking action occurs. In such a case, since the generation time of the timer signal from the timer circuit 220 is maintained longer than when the DC motor M is under a medium load, the effect of reducing the rotation speed of the DC motor M after reaching the rotation speed upper limit N3L is effective. Can be realized very quickly.

Further, in the above-described operation, the case where the bus is stopped on the uphill road with its forward direction directed toward the top of the uphill road has been described, but the present invention is not limited to this. Even when the traveling direction is stopped toward the top of the uphill road surface, it is possible to achieve substantially the same effects as the above.

In addition, in the above-mentioned embodiment, the example in which the present invention is applied to the door 10 provided on the side wall of the bus so as to be openable and closable in the front-rear direction along the door has been described. Not limited to this, the present invention may be applied to a door that can be opened / closed in the left / right direction along the entrance / exit located on the rear wall of the bus, and in this case, the application target is not limited to the bus, for example, a wagon. It may be a car.

Further, in carrying out the present invention, instead of the door 10, the present invention may be applied to a door provided on a bus or the like so as to be foldable in the front-rear direction.

[Brief description of drawings]

1 and 2 are overall configuration diagrams showing an embodiment of the present invention,
FIG. 3 is a detailed circuit diagram of the sample hold circuit in FIG. 1, FIG. 4 is a detailed circuit diagram of the load area determination circuit in FIG. 1, and FIG. 5 is a detailed circuit diagram of the speed determination circuit in FIG. FIG. 6 is a detailed circuit diagram of the timer circuit (which is connected to the load area determination circuit) in FIG. 1, and FIG. 7 is a time chart for explaining the operation of the present invention. Explanation of symbols B …… DC power supply, M …… DC motor, 10 …… door, 20 ……
Drive mechanism, 30 …… Operation switch, 40c …… Auxiliary detection switch, 50,60,70 …… Relay, 80 …… Load resistance, 90a, 90b,
120a, 120b …… Inverter, 100a, 100b, 150a, 170a, 170b
…… Negative AND gate, 110,130a, 130b, 260 …… Negative NAND gate, 140a, 140b …… Monostable multivibrator, 160 …… Integrator circuit, 170 …… Speed sensor, 180 ・ ・ ・
… F-V converter, 190… Sample and hold circuit, 200…
… Load area determination circuit, 210 …… Speed determination circuit, 230,240…
… RS flip-flop, 280… Positive NOR gate.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Gosaku Terabayashi 1 Toyota Town, Toyota City, Aichi Prefecture, Toyota Motor Co., Ltd. (72) Inventor Hisatoshi Ota 1 Toyota Town, Toyota City, Aichi Prefecture, Toyota Motor Co., Ltd. (72) Inventor Daikichi Yoshihiro, Arakawa Vehicle Industry Co., Ltd., 25, Kamifujiike, Yoshiwara-cho, Toyota City, Aichi Prefecture (72) Inventor Katsuhiko Kamiya 25, Kamifujiike, Yoshihara-cho, Aichi Prefecture, Arakawa Vehicle Industry Co., Ltd.

Claims (1)

[Claims] 1. A door opening / closing system provided with a rotary electric motor which is provided at an entrance / exit of a vehicle so as to be opened / closed laterally along the entrance / exit, and which is opened by one-direction rotation and closed by another-direction rotation. Operating means for generating a first operation signal when the door is opened and a second operation signal when the door is closed; and a first drive state in response to the first operation signal to turn the rotary motor in one direction. As described above, the power supply to the rotary motor from the power supply via the resistor is allowed, the second drive state is set in response to the second operation signal, and the rotary motor is rotated from the power supply via the resistor to the other direction to rotate the rotary motor in the other direction. Drive means for allowing power supply to the motor, speed detection means for detecting the rotation speed of the rotary motor and generating it as a speed detection signal, and a short circuit for selectively short-circuiting the resistor according to the value of the speed detection signal. An electric control device including a step, and a timing detection unit that detects a predetermined initial opening degree opening timing (or a predetermined initial closing degree closing timing) of the door and generates a timing detection signal, the first (or second) ) Integrating means for integrating the elapsed time after the generation of the operation signal to generate an integrated signal, and an upper limit value and a lower limit value of the allowable rotational speed width of the rotary motor in response to the timing detection signal, the value of the integrated signal. Deciding means that decides to be large (or small) according to the small (or large) of both, and is generated as an upper limit signal and a lower limit signal, respectively, and output when the value of the speed detection signal becomes larger than the value of the upper limit signal. An output signal generating means for generating a signal and extinguishing the output signal when the value of the speed detection signal becomes smaller than the value of the lower limit value signal; and responding to the generation of the output signal when the value of the integration signal is small. Then, the first (or second) drive state of the drive means is extinguished, and in response to the disappearance of the output signal, the return of the drive means to the first (or second) drive state is allowed, When the value of the integrated signal is large, the short circuit of the resistor by the short circuit means is released in response to the generation of the output signal, and the short circuit of the resistor by the short circuit means is allowed in response to the disappearance of the output signal. An electric control device for a vehicle door opening / closing system, which is provided with: