JPH0766963B2 - Method of manufacturing isolation - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a method of manufacturing an isolation provided for electrically isolating a plurality of semiconductor elements from each other in a semiconductor integrated circuit.

[Conventional example]

A conventional isolation structure will be described for a CCD (charge transfer device) shown in FIG. In the figure, the comb-shaped portion 1 shown by hatching is an isolation region, which is formed by diffusing a high-concentration impurity from the surface of the semiconductor substrate toward the inside. A plurality of transfer electrodes 2 are formed on the upper surface of the semiconductor substrate via a gate oxide film (not shown), and a charge transfer channel 3 is formed under the transfer electrodes 2 except the isolation region 1. Then, transfer drive signals Φ _V1 ~
By applying Φ _V4 , the signal charge is transferred, and since the transfer channels 3 adjacent to each other are electrically separated by isolation, the signal charge always moves in the predetermined transfer channel 3. Has become.

[Problems to be solved by the invention]

However, in the isolation of such a structure, since it is formed by photo-lithography, the minimum width 1 (see FIG. 9) is 1 to 2 μm in a normal manufacturing process, and a high density is manufactured. 0.8 in process
The limit is about μm, which makes it difficult to develop, for example, a solid-state image pickup device and other electronic circuit devices that aim to increase the density and the number of pixels.

[Means for solving problems]

The present invention has been made in view of such problems, and an object thereof is to provide a method for manufacturing an isolation having an extremely narrow width.

To achieve this object, the present invention stacks a first silicon oxide film and a first nitride film on the upper surface of a semiconductor substrate, and further deposits a polysilicon layer of a predetermined shape on the upper surface of the first nitride film. A first step, a second step of forming a polyoxide film on the upper surface and side surfaces of the polysilicon layer, and a second step on the upper surface of the polyoxide film and the exposed surface of the first nitride film.
A third step of depositing a nitride film of the second nitride film, a fourth step of removing a region of the second nitride film on the polysilicon layer having a width substantially equal to the width of the polysilicon layer by etching, The oxide film is removed by etching to expose the surface of the polysilicon layer and form a gap corresponding to the thickness of the polyoxide film between the side edges of the polysilicon layer and the second nitride film. And a step of removing the second nitride film by etching to expose the surface of the first nitride film and the surface of the first silicon oxide film corresponding to the gap, and then etching the polysilicon layer. A sixth step of removing and the first step in the semiconductor substrate
Forming a second silicon oxide film on the portion not covered with the nitride film by thermal oxidation, and then removing the first nitride film and the first silicon oxide film by etching to form a surface in the semiconductor substrate. And a seventh step of exposing.

〔Example〕

An embodiment of a method for manufacturing isolation according to the present invention will be described below with reference to the drawings. 1 to 8 are longitudinal sectional views of a main part showing a series of manufacturing steps in order.

The manufacturing method and structure will be described with reference to these drawings. First, in the first manufacturing step, as shown in FIG. 1, for example, the first silicon is formed on the surface of a P ⁻ type semiconductor substrate (substrate) 4. An oxide film (SiO ₂ ) 5 and a first nitride film (Si ₃ N ₄ ) 6 are laminated, and a polysilicon layer 7 having an appropriate shape is further deposited on the upper surface of the first oxide film 6. For example, CC
When forming D, the length and width W are designed according to the shape of the transfer channel to be formed.

In the second manufacturing process, as shown in FIG. 2, the poly oxide film 8 is formed on the upper surface and the side surface of the polysilicon layer 7 by vapor phase growth (CVD) or the like. Here, as an example, the thickness of the first silicon oxide film 5 is 250 Å, the first nitride film 6 is
Is formed to a thickness of 1500 Å, the polysilicon layer 7 is formed to a thickness of 5000 Å, and the polyoxide film 8 is formed to a thickness of about 0.2 μm.

Next, in the third manufacturing process shown in FIG. 3, about 1500Å
The second nitride film 9 having a thickness of 1 is deposited by vapor phase epitaxy.

In the next fourth manufacturing step shown in FIG. 4, the second chamber film 9
Of the above, a region corresponding to the polysilicon layer 7 and having substantially the same width W as the polysilicon layer 7 is removed by etching to expose the upper end surface of the polyoxide film 8.

In the fifth manufacturing process shown in FIG. 5, the poly oxide film 8 is
Are removed by etching to expose the surface of the polysilicon layer 7. As a result, the thickness of the polyoxide film 8 (Δl0.2) between the side edges of the polysilicon layer 7 and the second nitride film 9 is increased.
A gap 10 corresponding to (μm) is formed.

Next, in a sixth manufacturing step shown in FIG. 6, the second nitride film 9 is further removed by etching to expose the surface of the first nitride film 6. At this time, the first exposed in the gap 10
Part of the nitride film 6 is also etched at the same time, and as shown in FIG.
Exposed with a width Δl. Then, the polysilicon layer 7 is removed by etching.

Next, in a seventh step, a second step is performed in the semiconductor substrate 4 by thermal oxidation, for example, wet oxidation, as shown in FIG.
An insulating layer 11 of silicon dioxide (SiO ₂ ) to be a silicon oxide film of is formed. Since these insulating layers 11 are formed through the portions not covered with the first nitride film 6, that is, the gaps 10, the width Δw should be about 0.2 μm when the depth Δh is designed to be 0.4 to 0.5 μm. You can

In the final step for manufacturing the isolation shown in FIG. 8, the first nitride film 6 and the first silicon oxide film 5 are removed by etching to expose the surface of the semiconductor substrate 4.

After passing through the above manufacturing process, a CCD or the like is manufactured. For example, when forming a CCD, an n ⁻ -type impurity layer is formed on the surface portion of the semiconductor substrate 4 by a thermal diffusion or ion implantation technique, and then a gate oxide film is formed and then a transfer electrode made of polysilicon or the like is formed. . As a result, a CCD having the insulating layer 11 as an isolation region and the impurity layer as a transfer channel is formed.

As described above, according to this embodiment, the insulating layer 11 can be made extremely narrower than the isolation region 1 (see FIG. 9) of the conventional impurity diffusion layer, which is effective in improving the degree of integration. is there. Moreover, since the insulating layer 11 itself does not have conductivity, no wiring is required as in the case of performing isolation using a depletion layer, and higher integration can be achieved.

〔The invention's effect〕

As described above, according to the present invention, the first silicon oxide film and the first nitride film are laminated on the upper surface of the semiconductor substrate, and the polysilicon layer having a predetermined shape is further deposited on the upper surface of the first nitride film. And a second step of forming a poly oxide film on the upper surface and the side surface of the polysilicon layer, and a second nitriding process on the upper surface of the poly oxide film and the exposed surface of the first nitride film. A third step of depositing a film; a fourth step of removing a region of the second nitride film on the polysilicon layer having a width substantially equal to the width of the polysilicon layer by etching; and the polyoxide film. Are removed by etching to expose the surface of the polysilicon layer and form a gap corresponding to the thickness of the polysilicon oxide film between the polysilicon layer and the side end portion of the second nitride film. Etching the second nitride film And exposing the surface of the first nitride film and the surface of the first silicon oxide film corresponding to the gap, and then removing the polysilicon layer by etching. A second silicon oxide film is formed on a portion of the inside not covered with the first nitride film by thermal oxidation, and then the first nitride film and the first silicon oxide film are removed by etching; A seventh step of exposing the surface in the semiconductor substrate, and an insulating layer approximately corresponding to the thickness of the poly oxide film is formed as an isolation region in the semiconductor substrate, so that the isolation layer having an extremely narrow width is formed. The semiconductor integrated circuit can be highly integrated.

[Brief description of drawings]

1 to 8 are longitudinal sectional views of a main part showing a manufacturing process in an embodiment of a method for manufacturing an isolation according to the present invention, and FIG. 9 is a plan view of a main part showing a conventional isolation structure for a CCD. It is a figure. 4 ... Semiconductor substrate, 5 ... First silicon oxide film, 6 ...
... first nitride film, 7 ... polysilicon layer, 8 ... polyoxide film, 9 ... second nitride film, 10 ... gap, 11 ... insulating layer (second silicon oxide film).

Claims (1)

[Claims] 1. A first step of stacking a first silicon oxide film and a first nitride film on an upper surface of a semiconductor substrate, and further depositing a polysilicon layer of a predetermined shape on the upper surface of the first nitride film. A second step of forming a poly oxide film on the upper surface and the side surface of the polysilicon layer, and a third step of depositing a second nitride film on the upper surface of the poly oxide film and the exposed surface of the first nitride film. A fourth step of removing a portion of the second nitride film on the polysilicon layer, which is approximately the same width as the polysilicon layer, by etching; and a step of removing the polyoxide film by etching. Exposing the surface of the polysilicon layer and forming a gap between the polysilicon layer and a side end of the second nitride film, the gap corresponding to the thickness of the polysilicon oxide film; The film is removed by etching and the first A sixth step of exposing the surface of the first silicon oxide film corresponding to the surface of the oxide film and the gap, and then removing the polysilicon layer by etching; and the first nitriding in the semiconductor substrate. A second silicon oxide film is formed on a portion not covered with the film by thermal oxidation, and then the first nitride film and the first silicon oxide film are removed by etching to expose the surface in the semiconductor substrate. And a seventh step of: