JPH0766997B2 - Ceramic substrate for electronic parts - Google Patents
Ceramic substrate for electronic partsInfo
- Publication number
- JPH0766997B2 JPH0766997B2 JP63210321A JP21032188A JPH0766997B2 JP H0766997 B2 JPH0766997 B2 JP H0766997B2 JP 63210321 A JP63210321 A JP 63210321A JP 21032188 A JP21032188 A JP 21032188A JP H0766997 B2 JPH0766997 B2 JP H0766997B2
- Authority
- JP
- Japan
- Prior art keywords
- ceramic substrate
- dividing
- row
- substrate
- slit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000000758 substrate Substances 0.000 title claims description 54
- 239000000919 ceramic Substances 0.000 title claims description 29
- 230000007547 defect Effects 0.000 description 6
- 101700004678 SLIT3 Proteins 0.000 description 3
- 102100027340 Slit homolog 2 protein Human genes 0.000 description 3
- 101710133576 Slit homolog 2 protein Proteins 0.000 description 3
- 102100027339 Slit homolog 3 protein Human genes 0.000 description 3
- 230000002950 deficient Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000001788 irregular Effects 0.000 description 3
- 230000007423 decrease Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 238000005452 bending Methods 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
Landscapes
- Structure Of Printed Boards (AREA)
Description
【発明の詳細な説明】 産業上の利用分野 本発明は、電子機器に使用されるチップ部品等の電子部
品用セラミック基板に関するものである。Description: TECHNICAL FIELD The present invention relates to a ceramic substrate for electronic components such as chip components used in electronic equipment.
従来の技術 従来のこの種の分割溝入りセラミック基板は第５図に示
すような構造であった。第５図はチップ部品を作るため
のセラミック基板の概略図を示しており、11はセラミッ
ク基板、12は縦方向の第２の分割用スリット、13は横方
向の第１の分割用スリットである。14はセラミック基板
11の周縁の枠部分15に縦、横の第１、第２の分割用スリ
ット12,13が長くはみ出しているところを示している。
第６図は第５図の横方向から２つに割った時の縦方向か
ら見た拡大断面を示し、ｌは縦方向の分割用スリット12
のスリット深さであり、全列同じ深さで形成されてい
る。2. Description of the Related Art A conventional grooved ceramic substrate of this type has a structure as shown in FIG. FIG. 5 is a schematic view of a ceramic substrate for making a chip component, 11 is a ceramic substrate, 12 is a vertical second dividing slit, and 13 is a horizontal first dividing slit. . 14 is a ceramic substrate
It is shown that the longitudinal and lateral first and second dividing slits 12 and 13 are extended over the frame portion 15 at the periphery of 11 for a long time.
FIG. 6 shows an enlarged cross section as seen in the vertical direction when it is divided in two from the horizontal direction in FIG. 5, and 1 is a slit 12 for dividing in the vertical direction.
The slit depth is equal to that of all the rows.
第７図は、第５図の枠部分15を含んで横方向の第１の分
割用スリット13により分割した短冊状の基板を表わし、
更にその部分は縦方向に分割される前の両端１列目、２
列目を表わしているセラミック基板の図であり、16は分
割される前の１列目の小基板、17は分割される前の２列
目の小基板であり、枠部分15、小基板16,17がつながっ
ている。FIG. 7 shows a strip-shaped substrate including the frame portion 15 of FIG.
Furthermore, the part is in the first row at both ends before it is divided in the vertical direction,
It is the figure of the ceramic board which shows the line, 16 is the small board of the 1st line before the division, 17 is the small board of the 2nd line before the division, frame part 15, small board 16 , 17 are connected.
第８図は、第７図の短冊状の基板を縦方向の第２の分割
用スリット12にそって分割し、小基板になったものをチ
ップ部品として製品化したときの構造図を表わし、それ
は異形を伴っている。FIG. 8 shows a structural diagram when the strip-shaped substrate of FIG. 7 is divided along the second slit 12 for division in the vertical direction and the small substrate is commercialized as a chip component, It is accompanied by variants.
第９図は、第８図の矢印方向からみた異形を伴ったチッ
プ部品の形状を表わしている。18は抵抗体を覆っている
保護膜である。この様に従来のセラミック基板では分割
性の面において、チップ部品の縦方向の第２の分割工法
上小基板数が少ないと分割性は悪くなり、その影響が第
７図に示すように両端１列目と２列目の２つの小基板に
分割する時に発生し、製品化した場合、第９図に示すよ
うな異形を生じたり、割れずに双子になるものが発生
し、分割不良率（異形、双子不良）が高くなり、またそ
れによって、分割寸法のバラツキが大きくなり、それが
後工程での機械トラブル（つまり、挿入ミス）を発生さ
せ、全体の稼動率をも著しく悪化させるという原因にな
っていた。更に、第９図のように、チップ部品の異形に
よる実装マウント時のトラブルも生じるという多数の欠
点があった。FIG. 9 shows the shape of the chip component with the irregular shape seen from the direction of the arrow in FIG. Reference numeral 18 is a protective film covering the resistor. As described above, in terms of the dividability of the conventional ceramic substrate, if the number of the small substrates is small due to the second dicing method in the vertical direction of the chip component, the dividability is deteriorated, and the effect is as shown in FIG. This occurs when the substrate is divided into two small substrates in the second row and the second row, and when it is commercialized, a deformed shape as shown in FIG. Deformation, twin defect) becomes high, and the variation of the division dimension becomes large, which causes mechanical trouble (that is, insertion error) in the post process and significantly deteriorates the overall operation rate. It was. Further, as shown in FIG. 9, there were a number of drawbacks in that the mounting and mounting of the chip parts caused problems due to the deformation of the chip parts.
発明が解決しようとする課題 このような従来のセラミックの短冊状の基板で両端１列
目、２列目の分割性を良くするためには、両端１列目、
２列目の分割用スリットの深さを深くすれば、その部分
の分割性は良くなり分割寸法バラツキも小さくなるが、
分割用スリットを深くした分、セラミック基板の抗折強
度が低下し、基板運搬時や、基板に印刷する場合、印圧
によって基板割れが多発し印刷不良率の悪化や、基板カ
ケくずによる印刷マスクの損傷が発生するため、新たな
問題が発生してくる。DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention In order to improve the dividing property of the first row at both ends and the second row at such a conventional ceramic strip substrate,
If the depth of the dividing slit in the second row is increased, the dividing property of that portion is improved and the variation in the dividing dimension is reduced,
The bending strength of the ceramic substrate is reduced by the depth of the dividing slit, and when the substrate is transported or printed on the substrate, the printing pressure causes frequent cracking of the substrate, worsening the print defect rate and printing masks due to substrate chipping. Because of the damage, new problems will arise.
また、設備面において、両端１列目、２列目の分割性を
良くするためには、分割圧力を高めればよいが、この場
合、設備の各分割部品摩耗が早くなり、交換寿命が短く
設備の維持費がよりかかってしまうと共に、交換時間が
増えた分設備停止で生産性が減退してしまうという二重
三重の問題点が発生してくる。In terms of equipment, in order to improve the splittability of the first and second rows at both ends, the splitting pressure may be increased. In this case, the wear of each split part of the equipment is accelerated, and the replacement life is short. In addition to the higher maintenance cost, there will be double or triple problems that productivity will decline due to equipment stoppage due to the increased replacement time.
本発明は、上述した様な短冊状の基板の両端１列目、２
列目の分割不良率の悪化や、摩耗部品交換回数増加によ
る稼動率の低下を解決するためのセラミック基板を提供
することを目的としている。The present invention is directed to both ends of the strip-shaped substrate as described above in the first row and the second row.
It is an object of the present invention to provide a ceramic substrate for solving the deterioration of the division failure rate of the row and the decrease of the operation rate due to the increase in the number of times of replacement of worn parts.
課題を解決するための手段 以上のような問題点を解決するために本発明は、第１の
分割用スリットにより分割した短冊状の基板を、更に分
割して小基板を形成する第２の分割用スリットの両端側
の２本の深さを他の第２の分割用スリットより深くした
ものである。Means for Solving the Problems In order to solve the above problems, the present invention provides a second division in which a strip-shaped substrate divided by a first dividing slit is further divided to form a small substrate. The depth of the two slits on both end sides is deeper than that of the other second dividing slits.
作用 この構成によれば、短冊状の基板の両端１列目、２列目
の第１の分割用スリットの深さを他より深くして、両端
１列目、２列目の小基板が異形、双子を伴わない、高品
質の分割を可能とするとともに、第１の分割用スリット
のはみ出し寸法を分割することによって短くできて小基
板の取数を増やすことのできるものである。With this configuration, the depth of the first dividing slits on both ends of the strip-shaped substrate in the first row and the second row is made deeper than the other, and the small substrates in the first row and the second row on both ends are deformed. It is possible to perform high-quality division without twins, and to shorten the protrusion size of the first dividing slit so that the number of small substrates can be increased.
実施例 以下、本発明のチップ固定抵抗器用セラミック基板の実
施例を用いて図面を参照しながら説明する。第１図は本
発明の一実施例によるセラミック基板１であり、縦方向
の第２の分割用スリット２のうち両端１列目、２列目の
分割用スリット2aの深さを他の分割用スリット2bより深
くし、更に第２の分割用スリット２、横方向の第１の分
割用スリット３の枠部分４へのはみ出し寸法を短くした
ものである。なお、この第１図は、セラミック基板１を
横方向の第１の分割用スリット３で半分に割った図であ
る。第２図は、第１図において枠部分を含んで横方向に
第１の分割用スリット３により分割した後の短冊状の基
板の状態を表わし、更に、その部分は縦方向に第２の分
割がされる前の両端１列目、２列目を表わしている。５
は分割される前の１列目の小基板、６は２列目の小基
板、７は３列目の小基板で、枠部分４、小基板5,6,7が
つながっている。Examples Hereinafter, examples of the ceramic substrate for a chip fixed resistor according to the present invention will be described with reference to the drawings. FIG. 1 shows a ceramic substrate 1 according to an embodiment of the present invention, in which the depths of the splitting slits 2a in the first and second rows at both ends of the second splitting slit 2 in the vertical direction are used for other splitting. The slit 2b is deeper than the slit 2b, and the protrusion size of the second dividing slit 2 and the lateral first dividing slit 3 to the frame portion 4 is shortened. Note that FIG. 1 is a diagram in which the ceramic substrate 1 is divided in half by the first slits 3 for division in the lateral direction. FIG. 2 shows a state of the strip-shaped substrate after being divided by the first dividing slit 3 in the horizontal direction including the frame portion in FIG. 1, and further, that portion is vertically divided into the second division. It shows the first row and the second row on both ends before being touched. 5
Is a small board in the first row before being divided, 6 is a small board in the second row, and 7 is a small board in the third row. The frame portion 4 and the small boards 5, 6, 7 are connected to each other.
第３図は第２図の縦方向の第２の分割用スリット２にそ
って分割した小基板になったものをチップ部品として製
品化した時の構造図を表わし、分割した小基板5,6,7は
異形を伴っていない。FIG. 3 is a structural diagram of a small substrate divided along the second slit 2 in the vertical direction of FIG. 2 and commercialized as a chip component. The divided small substrates 5, 6 , 7 has no eccentricity.
第４図は第３図の矢印方向から見た異形を伴わないチッ
プ部品の形状を表わしている。８は抵抗体を覆っている
保護膜である。本発明は、第１図に示した様に基板の縦
方向のみ両端１列目、２列目の分割用スリット2aの深さ
を縦方向他列の分割用スリット2bの深さより30μｍ程度
深くし、かつその分割用スリット2aの深さを深くしたこ
とにより、分割しやすく、両端１列目、２列目の分割不
良の発生を防止するとともに、第１の分割用スリット３
のはみ出し寸法（横方向左右はみ出し寸法）を両端それ
ぞれ（例えば本実施例においては2.20mm）短くし、小基
板の取数の向上を図るものである。FIG. 4 shows the shape of the chip component without any irregular shape as seen from the direction of the arrow in FIG. Reference numeral 8 is a protective film covering the resistor. In the present invention, as shown in FIG. 1, the depth of the dividing slits 2a in the first and second rows at both ends of the substrate only in the vertical direction is set to be about 30 μm deeper than the depth of the dividing slits 2b in the other columns in the vertical direction. Moreover, by making the depth of the dividing slit 2a deeper, the dividing slit 2a can be easily divided, the occurrence of the dividing defect in the first row and the second row at both ends, and the first dividing slit 3
The protrusion size (lateral protrusion in the horizontal direction) is shortened at both ends (for example, 2.20 mm in this embodiment) to improve the number of small substrates.
以下、本発明のセラミック基板について具体的実施例を
述べる。Specific examples of the ceramic substrate of the present invention will be described below.
本発明のセラミック基板2000枚を１ロット200枚とし、1
0ロットをチップ抵抗器製造ラインに投入した時の印刷
基板割れ件数と、セラミック基板の縦方向両端１列目、
２列目を小基板に分割する時に発生する第２の分割用ス
リット溝２における分割不良発生率の各ロットの総分割
不良を100％とした場合にその占める割合を確認し、従
来のセラミック基板使用品と比較した。The number of 2000 ceramic substrates of the present invention is 200 per lot.
The number of cracks in the printed board when 0 lots were put into the chip resistor manufacturing line, and the first row on both ends in the vertical direction of the ceramic board,
The ratio of the division defect occurrence rate in the second division slit groove 2 generated when dividing the second row into small substrates was confirmed when the total division defect of each lot was set to 100%, and the conventional ceramic substrate was confirmed. Compared with the used product.
但し、印刷及び分割条件は同じである。However, the printing and dividing conditions are the same.
その結果を表−１に示す。The results are shown in Table-1.
印刷基板割れ件数について、本発明及び従来品共全く発
生しなかった。更に、本発明のセラミック基板の縦方向
両端１列目、２列目の分割不良発生率は５〜９％とな
り、従来品は30〜40％占めていたものが大幅に減少し
た。すなわち、分割不良形状について、第９図のような
異形で不良になっていたものが、第４図のように異形を
伴わない良品が得られるようになった。Regarding the number of printed circuit board cracks, neither the present invention nor the conventional product occurred at all. Further, the rate of occurrence of division defects in the first and second columns on both ends in the vertical direction of the ceramic substrate of the present invention is 5 to 9%, which is 30 to 40% in the conventional product, which is greatly reduced. That is, as for the defective division shape, the defective shape shown in FIG. 9 was defective, but a good product having no irregular shape as shown in FIG. 4 was obtained.
発明の効果 以上のように本発明の電子部品用セラミック基板は、セ
ラミック基板の縦方向両端１列目、２列目の第２の分割
用スリットの深さを他の第２の分割用スリットの深さよ
り深くすることにより、チップ部品の縦方向の第２の分
割時の小基板数が少ないと分割しにくかった箇所（縦方
向両端１列目、２列目の小基板）について、品質の高い
安定した製品が生産できるとともに第１の分割用スリッ
トのはみ出し寸法も短くできて、電子部品用セラミック
基板１枚当りの小基板の取数を向上させることが可能と
なるという効果が得られる。 EFFECTS OF THE INVENTION As described above, in the ceramic substrate for electronic parts of the present invention, the depth of the second dividing slits in the first row and the second row at both longitudinal ends of the ceramic substrate is different from that of the other second dividing slits. By making the depth deeper than the depth, if the number of small boards at the time of the second vertical division of the chip component is small, it is difficult to divide (the small boards in the first row and the second row at both ends in the vertical direction) to have high quality. It is possible to produce a stable product, and to shorten the protruding size of the first dividing slit, and to improve the number of small substrates per electronic component ceramic substrate.
第１図は本発明の一実施例によるセラミック基板を示す
斜視図、第２図は第１図の枠部分を含んで横方向に第１
次分割した時の短冊状のセラミック基板の斜視図、第３
図は第２図を縦方向の第２の分割用スリット溝にそって
分割し小基板になったものをチップ部品として製品化し
た時の斜視図、第４図は第３図の矢印方向から見たチッ
プ部品の側面図、第５図は従来のセラミック基板を示す
斜視図、第６図は第５図の横方向から２つに割った時の
縦方向から見た拡大断面図、第７図は第５図の枠部分を
含んで横方向に第１次分割した短冊状のセラミック基板
の斜視図、第８図は第７図を縦方向の第２の分割用スリ
ットにそって分割し小基板になったものをチップ部品と
して製品化した時の斜視図、第９図は第８図の矢印方向
から見たチップ部品の側面図である。 １……セラミック基板、２……第２の分割用スリット、
３……第１の分割用スリット、5,6,7……小基板。FIG. 1 is a perspective view showing a ceramic substrate according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view showing a frame substrate of FIG.
3 is a perspective view of a strip-shaped ceramic substrate when divided next,
FIG. 4 is a perspective view when FIG. 2 is divided along a vertical second slit groove for division into a small substrate and is commercialized as a chip component, and FIG. 4 is from the arrow direction of FIG. FIG. 5 is a side view of the chip component seen, FIG. 5 is a perspective view showing a conventional ceramic substrate, FIG. 6 is an enlarged cross-sectional view seen from the vertical direction when it is divided into two from the horizontal direction of FIG. FIG. 8 is a perspective view of a strip-shaped ceramic substrate which is first divided in the horizontal direction including the frame portion of FIG. 5, and FIG. 8 is a sectional view of FIG. 7 divided along the second dividing slit in the vertical direction. FIG. 9 is a side view of the chip component viewed from the direction of the arrow in FIG. 8 when the small substrate is commercialized as a chip component. 1 ... Ceramic substrate, 2 ... Second slit for division,
3 ... 1st slit for division, 5, 6, 7 ... Small board.
Claims (1)
それぞれ複数本形成し、第１の分割用スリットにより分
割して短冊状に、さらに第２の分割用スリットにより分
割して小基板を形成する電子部品用セラミック基板にお
いて、上記複数の第２の分割用スリットの両端側の少な
くとも２本の分割用スリットを他の第２の分割用スリッ
トよりも深く形成したことを特徴とした電子部品用セラ
ミック基板。1. A plurality of first and second dividing slits are formed in each of the vertical and horizontal directions, divided into strips by the first dividing slits, and further divided by the second dividing slits. In a ceramic substrate for electronic parts forming a substrate, at least two dividing slits on both end sides of the plurality of second dividing slits are formed deeper than other second dividing slits. Ceramic substrate for electronic parts.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63210321A JPH0766997B2 (en) | 1988-08-24 | 1988-08-24 | Ceramic substrate for electronic parts |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63210321A JPH0766997B2 (en) | 1988-08-24 | 1988-08-24 | Ceramic substrate for electronic parts |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0258884A JPH0258884A (en) | 1990-02-28 |
| JPH0766997B2 true JPH0766997B2 (en) | 1995-07-19 |
Family
ID=16587490
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63210321A Expired - Fee Related JPH0766997B2 (en) | 1988-08-24 | 1988-08-24 | Ceramic substrate for electronic parts |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0766997B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0710024B2 (en) * | 1990-06-29 | 1995-02-01 | ローム株式会社 | Substrate for electronic parts |
| JP2565724Y2 (en) * | 1992-11-10 | 1998-03-18 | アイワ株式会社 | Printed circuit board device |
| JP2948522B2 (en) * | 1996-02-13 | 1999-09-13 | ローム株式会社 | Manufacturing method of chip-shaped electronic component |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6018418Y2 (en) * | 1979-02-07 | 1985-06-04 | 日本特殊陶業株式会社 | Structure of snap groove on ceramic substrate |
| JPS5821195U (en) * | 1981-08-05 | 1983-02-09 | ヤマハ株式会社 | automatic music transcription device |
| JPH0440241Y2 (en) * | 1984-11-21 | 1992-09-21 |
-
1988
- 1988-08-24 JP JP63210321A patent/JPH0766997B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0258884A (en) | 1990-02-28 |
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