JPH0767273B2 - Snubber circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] In a two-stone forward type switching regulator, a series circuit of a diode and a first capacitor is connected in parallel with one main switching element, and the main switching element A method in which the rise of the voltage at the time of off is moderated, the electric charge charged in the first capacitor is transferred to the second capacitor by utilizing resonance, and the terminal voltage of the first capacitor is set to almost zero to initialize it. Thus, the loss as a snubber circuit can be reduced, and the switching loss of the main switching element can be reduced.

[Industrial application field]

The present invention relates to a snubber circuit of a two-stone forward type switching regulator.

A switching regulator is used as a stabilized power supply for various electronic devices. A snubber circuit is provided in order to suppress the surge voltage generated at the time of turning off the main switching element of such a switching regulator and reduce the loss of the main switching element. The switching frequency of the main switching element of the switching regulator is set to several hundreds of KHz or more to reduce the size. It is desired to reduce the loss of the snubber circuit and the loss of the main switching element as the switching frequency becomes higher.

[Conventional technology]

The two-stone forward type switching regulator provided with the snubber circuit of the conventional example has, for example, the configuration shown in FIG. In the figure, Q11 and Q12 are field effect transistors as main switching elements, T11 is a transformer, T12 is a drive transformer, D11 to D14 are diodes, and R and R1 are
1, R12 is a resistor, C and C11 are capacitors, L11 is a choke coil, 30a and 30b are snubber circuits, 31 and 32 are power supply terminals for connecting a DC power supply, 33 and 34 are output terminals, and 35 is a drive control circuit. .

The snubber circuits 30a and 30b are composed of a resistor R and a capacitor C, and serve as drains of the field effect transistors Q11 and Q12.
Connected between sources. Field effect transistor Q1
The voltage induced in the secondary winding of the transformer T11 according to ON / OFF of 1, Q12 is rectified by the diodes D13, D14 and smoothed by the smoothing circuit including the choke coil L11 and the capacitor C11, and the output terminal 33, It is output from 34. The output voltage of the output terminals 33, 34 is detected by the drive control circuit 35, and the on / off periods of the field effect transistors Q11, Q12 are controlled via the drive transformer T12 so that the output voltage becomes a set value. It

When the field effect transistors Q11 and Q12 are turned off, the voltage between their drain and source becomes the snubber circuits 30a and 30b.
Is added to the capacitor C via the resistor R of, and its terminal voltage rises according to the charging time constant of the capacitor C,
The increase in the drain-source voltage of the field effect transistors Q11 and Q12 can be moderated. Thereby,
Field effect transistor Q11, which suppresses the generation of surge voltage,
Q12 can be protected.

When the field effect transistors Q11 and Q12 are turned off, the voltage generated in the primary winding of the transformer T11 is
It is fed back from the power supply terminals 31, 32 to the DC power supply via 1, D12.

FIG. 6 is a diagram for explaining the operation. (A) shows the drain-source voltage of the field effect transistors Q11 and Q12, (b) shows the drain current, and (c) shows the loss. Field effect transistor
The drain-source voltage of Q11 and Q12 is almost 0 V in the ON state as shown in (a). Then, at the time of turn-off, a surge voltage is generated mainly by the leakage inductance of the transformer T11, and then a DC voltage is generated. The loss of the field effect transistors Q11 and Q12 is composed of a loss due to on-resistance and a switching loss at turn-on and turn-off, as shown by hatching in (c).

[Problems to be solved by the invention]

The snubber circuits 30a and 30b of the conventional example have a resistor R and a capacitor C.
Since it is composed of a field effect transistor Q11,
The capacitor C is charged / discharged according to the turning on / off of Q12, and the charging / discharging is performed via the resistor R.
Will cause a loss. Also field effect transistors Q11, Q12
At the time of turn-on, the discharge current due to the remaining charge of the capacitor C flows and the snubber circuit has a resistance. Therefore, the turn-off due to the relatively rapid rise of the drain-source voltage of the field effect transistors Q11 and Q12. There is a loss of time. Such loss increases as the switching frequency is increased.

Therefore, due to the high frequency of the switching regulator,
Even if an attempt is made to reduce the size, the loss will increase, so there is a limit to the reduction in size.

It is an object of the present invention to reduce the snubber circuit loss and the main switching element loss.

[Means for solving problems]

The snubber circuit of the present invention will be described with reference to FIG.
Main switching elements 2a, 2b connected to the primary winding of the transformer 1 of the two-stone forward type switching regulator
A series circuit of a first capacitor 3 and a first diode 4 having a polarity for charging the first capacitor 3 is connected in parallel with one of the main switching elements 2a, and the first capacitor 3 In parallel with the main switching element 2a, 2
A series circuit including an auxiliary switching element 5 driven in synchronization with b, a second diode 6 having a polarity for discharging the first capacitor 4, a choke coil 7, and a second capacitor 8 is connected, A third diode 9 having a polarity for discharging the second capacitor 8 is connected to the connection point between the other main switching element 2b and the primary winding of the transformer 1.

Further, when the main switching elements 2a, 2b are turned off, the diodes 10, 11 which flow the current due to the energy stored in the transformer 1 in the primary winding are connected, and when the main switching elements 2a, 2b are turned on, the current is supplied to the primary winding of the transformer 1. A DC power supply 12 for flowing is connected, and rectifying diodes 13, 14 and a smoothing choke coil 15 and a capacitor 16 are connected to the secondary winding of the transformer 1.

[Action]

The main switching elements 2a and 2b and the auxiliary switching element 5 are on / off controlled in synchronization with each other, and the voltages and currents of the respective parts are as shown in (a) to (e) of FIG. (A) of the figure shows the voltage V ₂ (solid line) across the main switching element 2a and the terminal voltage V ₄ (dotted line) of the first capacitor 3, and (b) shows the voltage across the diode 11. V ₁
(Solid line) and the terminal voltage V ₃ of the second capacitor 8 (dotted line) are shown. Further, (c) shows currents I ₁ and I ₅ flowing through the main switching elements 2a and 2b, and (d) shows current I ₄ and second current flowing through the first capacitor 3 through the first diode 4. Current flowing from the capacitor 8 through the third diode 9
Indicates I ₂ . Further, (e) shows a current I ₆ flowing from the first capacitor 3 to the second capacitor 8.

In FIG. 2, the main switching elements 2a, 2 up to time t1
In the ON period of b and the auxiliary switching element 5,
The current I ₃ flowing through the primary winding of the transformer 1 becomes equal to the currents I ₅ and I ₁ flowing through the main switching elements 2a and 2b. The terminal voltage V ₄ of the first capacitor 3 during this period becomes almost zero as shown in FIG. 2 (a), and the voltage V ₁ across the diode 11 is shown in FIG. 2 (b). As shown in, the voltage is approximately equal to the voltage of the DC power supply 12.

At time t1, when the main switching elements 2a, 2b and the auxiliary switching element 5 are turned off, the first capacitor 3 passes through the first diode 4 and the second capacitor 8 passes through the third diode 9. As shown in FIG. 2 (d), the currents I ₄ and I ₂ are transmitted through the transformer 1 via
The currents I ₁ and I ₅ flowing through the primary windings due to the stored energy of the currents and flowing through the main switching elements 2a and 2b instantly become zero as shown in FIG. 2 (c). The terminal voltage V ₄ of the first capacitor 3 rises as shown in FIG. 2 (a) due to the inflow of the current I ₄ , and the terminal voltage V ₃ of the second capacitor 8 flows out of the current I ₂ . As a result, it descends as shown in FIG.

When the main switching elements 2a and 2b are turned off, as described above, after the currents I ₁ and I ₅ become almost zero, the voltage V
_{Since 2} rises, the switching loss becomes almost zero.

Main switching elements 2a, 2b and auxiliary switching element 5
During the off period, the voltage V ₂ across the main switching element 2a becomes substantially equal to the voltage of the DC power supply 12, and the voltage V ₁ across the diode 11 becomes substantially zero.

At time t3, when the main switching elements 2a and 2b and the auxiliary switching element 5 are turned on, a resonance circuit is formed by the first and second capacitors 3 and 8 and the choke coil 7, and the second diode 6 is omitted. If you do, the second
A resonance current shown by a solid line and a dotted line in (e) of the drawing flows. However, the current flowing from the second capacitor 8 to the first capacitor 3 is blocked by the second diode 6, and the current I ₆ shown by the solid line in (e) of FIG.
The terminal voltage V ₄ of the capacitor 3 becomes almost zero as shown in FIG. 2 (a), while the terminal voltage V ₃ of the second capacitor 8 is as shown in FIG. 2 (b). To rise. Further, the voltage V ₂ across the main switching element 2a becomes almost zero, and the current I ₅ flows as shown in (c). Therefore, the switching loss becomes almost zero.

When the main switching elements 2a and 2b and the auxiliary switching element 5 are turned off at time t4, the state becomes the same as that at time t1.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 3 is a circuit diagram of an embodiment of the present invention, in which T1 is a transformer, T2 is a drive transformer, Q1, Q2 are field effect transistors as main switching elements, Q3 is a field effect transistor as auxiliary switching elements, and D1, D2 is a diode, D3 is a first diode, D4 is a second diode, D5
Is the third diode, D6 and D7 are rectifying diodes, C1
Is the first capacitor, C2 is the second capacitor, C3 is the smoothing capacitor, L1 is the choke coil, R1 to R3 are resistors, and L2.
Is a smoothing choke coil, 20 is a snubber circuit, 21 and 22 are power supply terminals, 23 and 24 are output terminals, and 25 is a drive control circuit.

The snubber circuit 20 includes the first and second capacitors C1 and C2 and the first and second capacitors C1 and C2.
It is composed of the second and third diodes D3, D4, D5, the field effect transistor Q3 driven by the secondary winding of the drive transformer T2 in synchronization with the field effect transistors Q1, Q2, and the choke coil L1. ing. Then, when the field effect transistor Q3 is turned on, a resonance circuit is formed by the choke coil L1 and the capacitors C1 and C2, and a resonance current flows. In that case, the resonance current is generated by the second diode D4. Only flows from the first capacitor C1 to the second capacitor C2.

The induced voltage in the secondary winding of transformer T1 is
Is rectified by and is smoothed by the choke coil L2 and the capacitor C3 and output from the output terminals 23 and 24. The output voltage is detected by the drive control circuit 25, and the drive transformer T2 is set so as to reach the set value. The ON / OFF period of the field effect transistors Q1 and Q2 is controlled via the.

When the field effect transistors Q1, Q2, and Q3 are turned off, the stored energy of the transformer T1 causes the field effect transistor Q1.
The voltage applied between the drain and source of the first capacitor C1 is applied to the first capacitor C1 via the first diode D3 to charge the first capacitor C1. Therefore, the drain-source voltage of the field effect transistor Q1 gradually rises as the terminal voltage of the first capacitor C1 rises, and the generation of surge voltage can be suppressed. Further, the charged electric charge of the second capacitor C2 is discharged through the third diode D5 in the path passing through the primary winding of the transformer T1.

When the field effect transistors Q1, Q2, Q3 turn on,
The current from the DC power supply flows through the primary winding of the transformer T1 via the field effect transistors Q1 and Q2. Further, in the snubber circuit 20, the field effect transistor Q3 is turned on,
A resonance current flows from the first capacitor C1 to the second capacitor C2. In this case, if the capacitances of the first and second capacitors C1 and C2 are made equal, the discharge due to the resonance current causes
The terminal voltage of the first capacitor C1 becomes almost zero.

FIG. 4 is a diagram for explaining the operation of the embodiment of the present invention, in which (a) is the drain-source voltage of the field effect transistor Q1,
(B) is the drain current of the field effect transistor Q1,
(C) is the current flowing through the second diode D4, (d) is the terminal voltage of the first capacitor C1, (e) is the terminal voltage of the second capacitor C2, (f) is the drain of the field effect transistor Q2. Source-to-source voltage, (g) indicates loss.

In the ON period of the field effect transistors Q1, Q2, Q3,
The drain-source voltage becomes almost zero, and the drain current becomes a predetermined value. In this case, since the current flowing from the first capacitor C1 to the field effect transistor Q1 is blocked by the first diode D3 at turn-on, the field effect transistor Q1 passes through the resistor like a conventional snubber circuit.
The discharge current of the capacitor C1 does not flow into the capacitor C1 and the switching loss becomes small as shown in (g).

Also, by turning on the field effect transistor Q3,
The resonance current shown in (c) flows, and the terminal voltage of the first capacitor C1 decreases as shown in (d) and becomes almost zero. On the other hand, the terminal voltage of the second capacitor C2 is (e)
Rise as shown in.

When the field effect transistors Q1, Q2, Q3 are turned off, the current due to the energy stored in the transformer T1 flows through the diode D1 and the first diode D3 into the first capacitor C1,
At this time, the electric charge stored in the capacitor C2 is
It is discharged through T1. The drain-source voltage of the field effect transistor Q1 gradually rises in response to the rise of the terminal voltage of the first capacitor C1 and reaches the voltage of direct current. Further, the source potential of the field effect transistor Q2 gradually drops corresponding to the drop of the terminal voltage of the second capacitor C2, the drain-source voltage gradually increases, and reaches the DC power supply voltage of the applied voltage. That is, since the drain-source voltage rises slowly at turn-off, generation of a surge voltage can be suppressed, and the drain-source voltage rises only slightly until the drain current becomes zero. , The switching loss becomes small as shown in (g).

Although the above-mentioned embodiment shows the case where the field effect transistor is used as the main switching element and the auxiliary switching element, it is of course possible to use the bipolar transistor. Another field effect transistor Q1
Although the case where the snubber circuit 20 is connected to the side is shown, it is also possible to connect the snubber circuit 20 to the side of the other field effect transistor Q2.

〔The invention's effect〕

As described above, the present invention provides a main switching element in a two-stone forward type switching regulator.
A series circuit of a first capacitor and a first diode 4 is connected in parallel with 2a, and an auxiliary switching element 5 and a second diode 6 are connected in parallel with the first capacitor 3.
, A choke coil 7 and a second capacitor 8 are connected in series with each other, and a third diode 9 is connected so as to discharge the electric charge charged in the second capacitor 8. The main switching element 2a , 2b is turned off, a charging current flows through the second capacitor 3 so that the voltage across the main switching elements 2a, 2b rises slowly, suppressing the occurrence of surge voltage and reducing the main switching element.
Until the currents flowing through 2a and 2b become zero, the voltage across the main switching elements 2a and 2b rises very little, and the switching elements can be made extremely small.

When the main switching elements 2a and 2b are turned on, the first
Since the discharge current of the capacitor 3 does not flow to the main switching element 2a, the current flowing is small until the voltage across the main switching elements 2a and 2b becomes zero, and the switching loss can be made extremely small.

Further, since the first capacitor 3 discharges to the second capacitor 8 as a resonance current by the choke coil 7 and the second diode 6 blocks the reverse current, the terminal voltage of the first capacitor 3 becomes almost zero. And can be prepared for the next turn-off.

As described above, since the switching loss at the time of turn-on and the time of turn-off are made small and the capacitor is not charged and discharged through the resistor, there is no loss due to the resistor, and the loss can be reduced. Therefore, there is almost no increase in loss even when the frequency of the switching regulator is increased, and there is an advantage that the size can be further reduced.

[Brief description of drawings]

1 is an explanatory view of the principle of the present invention, FIG. 2 is an explanatory view of the first operation, FIG. 3 is a circuit diagram of an embodiment of the present invention, and FIG. 4 is an explanatory view of the operation of the embodiment of the present invention. FIG. 5 is a circuit diagram of a conventional example, No. 6
The figure is a diagram for explaining the operation of the conventional example. 1 is a transformer, 2a and 2b are main switching elements, and 3 is a first
Capacitor, 4 is a first diode, 5 is an auxiliary switching element, 6 is a second diode, 7 is a choke coil, 8 is a second capacitor, 9 is a third diode, 1
Reference numerals 0 and 11 are diodes, 12 is a DC power supply, 13 and 14 are rectifying diodes, and 15 and 16 are smoothing choke coils and capacitors.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Fumiaki Ihara Inventor Fumiaki Ihara 237 Sakado, Takatsu-ku, Kawasaki City, Kanagawa Fuji Denso Co., Ltd. (56) References JP 62-37064 (JP, A) JP 58-69463 (JP, A)

Claims (1)

[Claims] 1. A main switching element (2a, 2b) for suppressing surge voltage at turn-off of a main switching element (2a, 2b) connected to a primary winding of a transformer (1) of a two-stone forward type switching regulator. ) In the snubber circuit for reducing the loss, the first capacitor (3) is connected in parallel with the one main switching element (2a), and the first capacitor (3) of the polarity for charging the first capacitor (3). An auxiliary switching element (5) connected in series with the first diode (4) and driven in synchronization with the main switching element (2a, 2b) in parallel with the first capacitor (3); A series circuit of a second diode (6) having a polarity for discharging the first capacitor (3), a choke coil (7), and a second capacitor (8) is connected, and the second capacitor ( 8) Discharge Third diode (9), and the other of the main switching element (2b) and the snubber circuit being characterized in that connected to the connection point between the primary winding polarity to.