JPH0770392B2 - DC solenoid drive method - Google Patents
DC solenoid drive methodInfo
- Publication number
- JPH0770392B2 JPH0770392B2 JP63119026A JP11902688A JPH0770392B2 JP H0770392 B2 JPH0770392 B2 JP H0770392B2 JP 63119026 A JP63119026 A JP 63119026A JP 11902688 A JP11902688 A JP 11902688A JP H0770392 B2 JPH0770392 B2 JP H0770392B2
- Authority
- JP
- Japan
- Prior art keywords
- solenoid
- current
- transistor
- command
- time
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- Electronic Switches (AREA)
- Magnetically Actuated Valves (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は一定周期中のON時間を変える制御(以下デュー
ティ制御と称す)を行い、対象物理量を制御する直流ソ
レノイドの駆動方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial field of use] The present invention relates to a method for driving a DC solenoid that performs control (hereinafter referred to as duty control) for changing the ON time during a fixed period to control a target physical quantity. .
従来、この種の直流ソレノイド駆動方法を第2図乃至第
4図に基づいて説明する。Conventionally, a DC solenoid driving method of this type will be described with reference to FIGS. 2 to 4.
尚、第2図はソレノイド駆動回路図、第3図は第2図の
ソレノイド駆動回路に定電流チョッパー制御機能を有す
る回路図及び第4図(a),(b)は直流ソレノイド駆動方法
のタイミングチャートである。2 is a solenoid drive circuit diagram, FIG. 3 is a circuit diagram of the solenoid drive circuit of FIG. 2 having a constant current chopper control function, and FIGS. 4 (a) and 4 (b) are timings of the DC solenoid drive method. It is a chart.
即ち、第2図に示す如く、このソレノイド駆動回路は、
保持励磁の指令1及び過励磁の指令2を出力するデュー
ティ指令手段1と、抵抗2,3を介して接続された第1及
び第2トランジスタ4,5と、この第1トランジスタ4に
並列に接続されたソレノイド6及びツェナーダイオード
7と、上記ソレノイド6に接続された直流電源8と、上
記第1及び第2トランジスタ4,5間に介在された抵抗9
とから構成されている。That is, as shown in FIG. 2, this solenoid drive circuit is
Duty command means 1 for outputting command 1 for holding excitation and command 2 for overexcitation, first and second transistors 4 and 5 connected via resistors 2 and 3, and connected in parallel to the first transistor 4. The solenoid 6 and the Zener diode 7, the DC power source 8 connected to the solenoid 6, and the resistor 9 interposed between the first and second transistors 4 and 5.
It consists of and.
又、第3図に示すソレノイド駆動回路は、指令1,2を出
力するデューティ指令手段1と、このデューティ指令手
段1に抵抗10を介して接続された第1トランジスタ4
と、この第1トランジスタ4に抵抗2を介して並列に接
続されたツェナーダイオード7及び第3トランジスタ11
と、上記ツェナーダイオード7にダイオード12を介して
接続された直流電源8と、上記デューティ指令手段1に
AND素子13、単安定フリップフロップ14及び抵抗15を順
次介して接続された第2トランジスタ5と、同じく上記
デューティ指令手段1に接続された基準電圧発生器16
と、上記第2トランジスタ5に並列に接続された電流検
出抵抗17及び比較器18と、一端が上記第3トランジスタ
11と第2トランジスタ5との間に接続され、他端が上記
ダイオード12と直流電源8との間に接続されたソレノイ
ド6とから構成されて居り、上記比較器18は、上記AND
素子13と基準電圧発生器16とに夫々接続され、上記基準
電圧発生器16は、保持電流に対応する基準電圧Vr1の電
源16a、過励磁電流に対応する基準電圧Vr2の電源16b及
びスイッチ16cを有している。The solenoid drive circuit shown in FIG. 3 includes a duty command means 1 for outputting commands 1 and 2 and a first transistor 4 connected to the duty command means 1 via a resistor 10.
And a Zener diode 7 and a third transistor 11 connected in parallel to the first transistor 4 via a resistor 2.
A DC power source 8 connected to the Zener diode 7 via a diode 12 and the duty command means 1.
A second transistor 5 connected in sequence through an AND element 13, a monostable flip-flop 14 and a resistor 15, and a reference voltage generator 16 also connected to the duty command means 1.
A current detection resistor 17 and a comparator 18 connected in parallel to the second transistor 5, and one end of the third transistor
11 is connected to the second transistor 5, and the other end is composed of a solenoid 6 connected between the diode 12 and the DC power source 8. The comparator 18 is the AND circuit.
The reference voltage generator 16 is connected to the element 13 and the reference voltage generator 16, respectively, and the reference voltage generator 16 includes a power supply 16a having a reference voltage V r1 corresponding to a holding current, a power supply 16b having a reference voltage V r2 corresponding to an overexciting current, and a switch. Has 16c.
次に、かかるソレノイド駆動回路の動作を述べる。Next, the operation of the solenoid drive circuit will be described.
即ち、第4図(a)に示す如く、デューティ指令手段1
は、指令1,指令2を同時に出力し、各々のベース抵抗2
及び3を通して第1及び第2トランジスタ4及び5をON
状態にするので、直流電源8、ソレノイド6及び第1ト
ランジスタ4の回路に過励磁電流がT2時間流れる(過励
磁モード)。その後、指令2は無くなり第1トランジス
タ4がOFF状態となり、ソレノイド電流は、直流電源
8、ソレノイド6、抵抗9及び第2トランジスタ5の経
路で流れる(保持モード)。この電流は、上記過励磁電
流より抵抗9の値で決まる分だけ小さな値であり、ソレ
ノイド弁の状態を保持するに必要な値に設定され、保持
電流とよばれている。指令1はデューティ値分のT1時間
でOFFとなり、第2トランジスタ5もOFF状態になる。第
2トランジスタ5がOFFになる直前のソレノイド電流をi
0、ソレノイド6のインダクタンスをL、同抵抗をrと
し、ツェナーダイオード7のツェナー電圧をV2及び直流
電源8の電圧をEとすると、第2トランジスタ5がOFF
状態になってからの時間tとソレノイド電流iとの関係
は次式で表わせる。That is, as shown in FIG. 4 (a), the duty command means 1
Outputs command 1 and command 2 at the same time, and each base resistance 2
Turn on the first and second transistors 4 and 5 through
Since the state is set, the overexcitation current flows in the circuit of the DC power supply 8, the solenoid 6 and the first transistor 4 for T 2 time (overexcitation mode). After that, the command 2 disappears, the first transistor 4 is turned off, and the solenoid current flows through the path of the DC power source 8, the solenoid 6, the resistor 9 and the second transistor 5 (holding mode). This current is a value smaller than the above-described overexciting current by a value determined by the value of the resistor 9, and is set to a value required to hold the state of the solenoid valve, which is called a holding current. The command 1 is turned off at T 1 time corresponding to the duty value, and the second transistor 5 is also turned off. I is the solenoid current immediately before the second transistor 5 is turned off.
0 , the inductance of the solenoid 6 is L, the resistance is r, the zener voltage of the zener diode 7 is V 2 and the voltage of the DC power supply 8 is E, the second transistor 5 is turned off.
The relationship between the time t after the state is reached and the solenoid current i can be expressed by the following equation.
そこで、式(2)のi=0となる時間T1までソレノイド電
流は、直流電源8、ソレノイド6及びツェナーダイオー
ド7の経路で流れる。指令2のON指令時間T2は、過励磁
時間TEXに等しく、ソレノイド弁が動作する時間に所定
量加算された値に設置される。又、第4図(b)に示す如
く、デューティ値が小さくなり、T1<TEXとなった場
合、時間T1とT2とは等しくなり、両トランジスタ4,5は
同時にOFFされる。 Therefore, the solenoid current flows through the path of the DC power source 8, the solenoid 6 and the Zener diode 7 until time T 1 when i = 0 in the equation (2). The ON command time T 2 of the command 2 is equal to the overexcitation time T EX , and is set to a value obtained by adding a predetermined amount to the time the solenoid valve operates. Further, as shown in FIG. 4 (b), when the duty value decreases and T 1 <T EX , the times T 1 and T 2 become equal and both transistors 4 and 5 are turned off at the same time.
更に、定電流チョッパー制御機能を有するソレノイド駆
動回路においては、先ず、デューティ指令手段1より指
令1,指令2が同時に出力されると、指令1の出力で第1
及び第3トランジスタ4,11がON状態になり、AND素子13
の出力もHighで第2トランジスタ5がON状態となり、ソ
レノイド電流は、直流電源8、ソレノイド6、第2トラ
ンジスタ5及び電流検出抵抗17の経路Iで流れる。電流
検出抵抗17を流れる電流が大きくなると、比較器18の反
転入力端子電圧は高くなっていき、やがて、指令2の出
力で選択された基準電圧発生器16内の電源16bの基準電
圧Vr2より高くなると、比較器18の出力がLowになり、AN
D素子13の出力もLowで第2トランジスタ5はOFF状態と
なる。そのため、ソレノイド電流は、ソレノイド6、第
3トランジスタ11、ダイオード12及びソレノイド6の経
路IIで流れる。AND素子13の出力の立下り(High→Low)
より一定時間単安定フリップフロップ14の出力がLow
状態となっているので、第2トランジスタ5は、OFF
で、電流検出抵抗17を流れる電流はなく、比較器18の出
力がHighになるが、上記一定時間においては、AND素子1
3の出力は、Lowのままである。上記一定時間後、単安定
フリップフロップ14の出力がHighとなり、第2トランジ
スタ5がON状態になるので、再び、上記経路Iでソレノ
イド電流が流れる。以下、指令1がLowになるまで経路
IとIIとを繰り返す。但し、第4図(a)のように指令2
が途中でOFFになる場合は、基準電圧発生器16内で電源1
6aの基準電圧Vr1が選択され、ソレノイド電流が保持電
流値になる。次に、指令1がOFFになると、第1及び第
2トランジスタ4,5がOFF状態となり、第3トランジスタ
11とツェナーダイオード7とが作用し、上記経路IIで電
流が流れるが、この電流は式(1),(2)で示すような減衰
によりt1時間後には0となる。ソレノイド電流遮断時の
駆動回路の電力損失POFFは、遮断(つまり、第1及び第
2トランジスタ4,5が共にOFF状態)になる直前のソレノ
イド電流i0とソレノイド6のインダクタンスLで近似で
き、次式の関係がある。Furthermore, in the solenoid drive circuit having the constant current chopper control function, first, when the command 1 and the command 2 are simultaneously output from the duty command means 1, the command 1 outputs the first command.
And the third transistors 4 and 11 are turned on, and the AND element 13
Is also High, the second transistor 5 is turned on, and the solenoid current flows through the path I of the DC power supply 8, the solenoid 6, the second transistor 5, and the current detection resistor 17. As the current flowing through the current detection resistor 17 increases, the inverting input terminal voltage of the comparator 18 increases, and eventually the reference voltage V r2 of the power supply 16b in the reference voltage generator 16 selected by the output of the command 2 becomes higher than the reference voltage V r2 . When it goes high, the output of comparator 18 goes low,
The output of the D element 13 is also low, and the second transistor 5 is off. Therefore, the solenoid current flows through the solenoid 6, the third transistor 11, the diode 12, and the path II of the solenoid 6. Output of AND element 13 falls (High → Low)
The output of the monostable flip-flop 14 is low for a certain period of time.
Since it is in the state, the second transistor 5 is turned off.
Then, there is no current flowing through the current detection resistor 17, and the output of the comparator 18 becomes High, but the AND element 1
The output of 3 remains Low. After the fixed time, the output of the monostable flip-flop 14 becomes High and the second transistor 5 is turned on, so that the solenoid current flows through the path I again. Hereinafter, the paths I and II are repeated until the command 1 becomes Low. However, as shown in Fig. 4 (a), command 2
Is turned off during the operation, the power supply 1 is turned on in the reference voltage generator 16.
The reference voltage V r1 of 6a is selected, and the solenoid current becomes the holding current value. Next, when the command 1 is turned off, the first and second transistors 4 and 5 are turned off, and the third transistor
A current flows through the path II due to the action of 11 and the Zener diode 7, but this current becomes 0 after t 1 time due to the attenuation as shown in the equations (1) and (2). The power loss P OFF of the drive circuit when the solenoid current is cut off can be approximated by the solenoid current i 0 and the inductance L of the solenoid 6 immediately before the cutoff (that is, both the first and second transistors 4 and 5 are turned off). There is a relationship of the following formula.
従って、第2図に示す駆動回路では、ツェナーダイオー
ド7が、又、第3図に示す駆動回路では、第3トランジ
スタ11がほぼ全ての損失を担っていた。 Therefore, in the drive circuit shown in FIG. 2, the Zener diode 7 and the drive circuit shown in FIG.
然し乍ら、上述した従来の駆動方法においては、過励磁
電流が流れている際、第1及び第2トランジスタ4,5がO
FF状態になった時、直前のソレノイド電流i0が大きくな
り、ツェナーダイオード7又は第3トランジスタ11が負
担する電力損失が式(3)で示されるように非常に大きく
なるという問題点があった。However, in the above-described conventional driving method, when the overexciting current is flowing, the first and second transistors 4 and 5 are turned on.
In the FF state, the solenoid current i 0 immediately before becomes large, and there is a problem that the power loss borne by the Zener diode 7 or the third transistor 11 becomes very large as shown by the equation (3). .
本発明の目的は、上述の問題点に鑑み、過励磁指令中に
おける電流遮断時の電力損失が低減できる直流ソレノイ
ド駆動方法を提供するものである。In view of the above-mentioned problems, an object of the present invention is to provide a DC solenoid driving method capable of reducing power loss at the time of current interruption during an overexcitation command.
本発明は、上述した目的を達成するため、過励磁モード
及び保持励磁モードを有する直流ソレノイド駆動装置の
駆動方法において、過励磁モード期間中にソレノイドへ
の通電時間の短縮により前記過励磁モード時間が小さく
なった時に、前記通電時間の短縮に合わせて通電遮断前
に過励磁モードを保持励磁モードに切り換え、保持電流
値にてソレノイドへの通電を遮断するようにしたもので
ある。In order to achieve the above-mentioned object, the present invention provides a method for driving a DC solenoid drive device having an overexcitation mode and a holding excitation mode, wherein the overexcitation mode time is reduced by shortening the energization time of the solenoid during the overexcitation mode period. When it becomes smaller, the over-excitation mode is switched to the holding excitation mode before the turning-off of the energization in accordance with the shortening of the energization time, and the energization of the solenoid is cut off at the holding current value.
本発明においては、過励磁モード期間中であっても通電
遮断面に励磁モードを保持励磁モードに切り換えてソレ
ノイドへの通電を遮断するようにしたので、遮断時の遮
断電流が小さくなり、ソレノイド駆動回路の遮断時電力
損失が大幅に軽減される。In the present invention, even when the over-excitation mode is in operation, the energization cutoff surface is switched from the excitation mode to the excitation mode to cut off the energization to the solenoid. Power loss during circuit interruption is greatly reduced.
以下、本発明方法の一実施例を第1図に基づいて、本駆
動回路は従来例と同様なので、これを割愛して説明す
る。An embodiment of the method of the present invention will be described below with reference to FIG. 1, since this drive circuit is the same as the conventional example.
即ち、出力すべきデューティ値が小さくなり、指令1,2
の時間T1,T2が共に、上記過励磁間TEXより小さくなっ
た場合、T2<T1とし、電流遮断前に指令2をOFFにし
て、保持電流モードとし、ソレノイド電流を減少させ
る。この遮断前のソレノイド電流の減少のための時間T1
−T2は、ソレノイド6のインダクタンスL、回路抵抗値
及び遮断時に損失を負う素子の許容値により設定され
る。That is, the duty value to be output becomes smaller, and commands 1, 2
When both times T 1 and T 2 become smaller than T EX during the above-mentioned over-excitation, T 2 <T 1 is set, command 2 is turned off before the current is cut off, the holding current mode is set, and the solenoid current is reduced. . Time T 1 for this reduction of solenoid current before interruption
-T 2 is set by the inductance L of the solenoid 6, the circuit resistance value, and the allowable value of the element that causes a loss at the time of interruption.
以上説明したように本発明によれば、過励磁モード期間
中にソレノイドへの通電時間の短縮により前記過励磁モ
ード時間が小さくなった時に、前記通電時間の短縮に合
わせて通電遮断前に過励磁モードを保持励磁モードに切
り換え、保持電流値にてソレノイドへの通電を遮断する
ようにしたので、ソレノイド駆動回路の遮断時電力損失
が低減できる。従って、駆動回路部品の損失が軽減で
き、駆動装置の低コスト化及び小形化ができ、併せて、
部品の信頼性が向上できる等の特有の効果により上述の
課題を解決し得る。As described above, according to the present invention, when the over-excitation mode time becomes short due to the shortening of the energization time to the solenoid during the over-excitation mode period, the over-excitation is performed before the interruption of the current in accordance with the shortening of the energization time. Since the mode is switched to the holding excitation mode and the energization of the solenoid is cut off by the holding current value, the power loss at the time of breaking the solenoid drive circuit can be reduced. Therefore, the loss of the drive circuit parts can be reduced, the cost and size of the drive device can be reduced, and at the same time,
The above-mentioned problems can be solved by a unique effect that the reliability of parts can be improved.
第1図は本発明方法の一実施例に係る駆動回路のタイミ
ングチャート、第2図乃至第4図は従来例を示すもの
で、第2図は駆動回路図、第3図は定電流チョッパー制
御機能を有する駆動回路図、第4図は駆動回路のタイミ
ングチャートである。 1……デューティ指令手段、4……第1トランジスタ、
5……第2トランジスタ、6……ソレノイド、7……ツ
ェナーダイオード、9……直流電源、11……第3トラン
ジスタ、12……ダイオード、13……AND素子、14……単
安定フリップフロップ、16……基準電圧発生器、17……
電流検出抵抗。 尚、図中同一符号は、同一又は相当部分を示す。FIG. 1 is a timing chart of a drive circuit according to one embodiment of the method of the present invention, FIGS. 2 to 4 are conventional examples, FIG. 2 is a drive circuit diagram, and FIG. 3 is a constant current chopper control. FIG. 4 is a drive circuit diagram having a function, and FIG. 4 is a timing chart of the drive circuit. 1 ... Duty command means, 4 ... First transistor,
5 ... second transistor, 6 ... solenoid, 7 ... Zener diode, 9 ... DC power supply, 11 ... third transistor, 12 ... diode, 13 ... AND element, 14 ... monostable flip-flop, 16 …… Reference voltage generator, 17 ……
Current detection resistor. The same reference numerals in the drawings indicate the same or corresponding parts.
Claims (1)
直流ソレノイド駆動装置の駆動方法において、過励磁モ
ード期間中にソレノイドへの通電時間の短縮により前記
過励磁モードが小さくなった時に、前記通電時間の短縮
に合わせて通電遮断前に過励磁モードを保持励磁モード
に切り換え、保持電流値にてソレノイドへの通電を遮断
することを特徴とする直流ソレノイド駆動方法。1. A driving method of a DC solenoid drive device having an over-excitation mode and a holding-excitation mode, wherein the energization time is reduced when the over-excitation mode is reduced by shortening the energization time to the solenoid during the over-excitation mode period. A method for driving a direct current solenoid characterized in that the over-excitation mode is switched to the hold-excitation mode in accordance with the shortening of the energization and the energization to the solenoid is cut off by the holding current value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63119026A JPH0770392B2 (en) | 1988-05-16 | 1988-05-16 | DC solenoid drive method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63119026A JPH0770392B2 (en) | 1988-05-16 | 1988-05-16 | DC solenoid drive method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01289104A JPH01289104A (en) | 1989-11-21 |
| JPH0770392B2 true JPH0770392B2 (en) | 1995-07-31 |
Family
ID=14751145
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63119026A Expired - Lifetime JPH0770392B2 (en) | 1988-05-16 | 1988-05-16 | DC solenoid drive method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0770392B2 (en) |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0547334Y2 (en) * | 1985-09-03 | 1993-12-13 |
-
1988
- 1988-05-16 JP JP63119026A patent/JPH0770392B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH01289104A (en) | 1989-11-21 |
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