JPH0770576B2 - Mask pattern data verification method - Google Patents

Description

The present invention relates to a mask pattern data verification method for verifying mask pattern data for creating a mask pattern of a semiconductor integrated circuit, and has an object to prevent a shortage of storage capacity by quick turnaround of verification. In the verification method of the mask pattern data, the mask pattern data of the hierarchical structure including the matrix figure which the same figure repeats is expanded, the mask pattern is displayed by the expanded mask pattern data obtained, and the pattern is verified by the drawing. In the structure of the mask pattern, only the peripheral figure of the matrix figure is expanded, and the mask pattern having the matrix figure in which the central figure is removed is displayed, plotted, and verified.

[Industrial application field]

The present invention relates to a method of verifying mask pattern data, and more particularly to a method of verifying mask pattern data for verifying mask pattern data for creating a mask pattern of a semiconductor integrated circuit.

When creating mask pattern data for creating a mask pattern of a semiconductor integrated circuit, the same pattern group (figure) is often regularly arranged, especially in a memory section. Here, the pattern group is a figure composed of a plurality of patterns.

The pattern data of the matrix figure in which the above-mentioned figures are arranged in a grid of n rows in the vertical direction and m columns in the horizontal direction is called matrix data, and the matrix data is a data format that is frequently used when arranging patterns.

The mask pattern data created in this way has a hierarchical structure in which there is a hierarchy of pattern group data below a hierarchy of matrix data.

It is difficult to confirm the arrangement and overlap of each pattern with the mask pattern data having the above hierarchical structure, and it is necessary to verify this.

[Conventional technology]

Conventionally, when verifying the mask pattern data having a hierarchical structure, all the lattices of the matrix data are expanded into a pattern group, and then the expanded mask pattern data is subjected to a graphic display process or a plot drawing process, which is obtained. The layout, overlap, etc. of each pattern are checked by the display or drawings.

[Problems to be Solved by the Invention]

However, the data amount of the mask pattern data has greatly increased as the density and scale of the semiconductor integrated circuit have increased.

Therefore, not only the time required to fully develop the mask pattern data but also the time required for the graphic display processing or the plot drawing processing becomes long, and there is a problem that the verification turnaround is slow. Further, since the data amount of the expanded mask pattern data becomes huge, there is a problem that the storage capacity becomes insufficient.

The present invention has been made in view of the above points, and an object of the present invention is to provide a method of verifying mask pattern data, which has a fast verification turnaround and prevents a shortage of storage capacity.

[Means for Solving the Problems]

A mask pattern data verification method of the present invention is a mask for expanding mask pattern data having a hierarchical structure including a matrix figure which is repeated by the same figure, and displaying and drawing a mask pattern by the expanded mask pattern data thus obtained to perform verification. In the pattern data verification method, the figure only in the peripheral part of the matrix figure in the mask pattern data of the hierarchical structure is expanded (30 to 50), and the mask pattern having the matrix figure in which the figure in the central part is removed is displayed and plotted. And verify.

[Action]

In the present invention, only the peripheral figure of the matrix figure is expanded, and the central figure is not expanded.

Therefore, it is possible to prevent the number of data of the development mask pattern data from being significantly reduced, and to prevent a shortage of the capacity of the storage device for storing the development mask pattern data. Also, the processing time of each of the hierarchy development processing, the graphic display processing, and the plot drawing processing can be prevented. Becomes shorter, and verification turnaround becomes faster.

〔Example〕

First, an outline of a mask pattern data verification method of the present invention will be described. FIG. 2 is a block diagram of a system for realizing the method of the present invention, and FIG. 3 is a flowchart of an embodiment of verification processing.

In FIG. 2, 10 is a CPU, and 11 to 13 are storage devices. A program for executing the processes shown in FIGS. 1 and 2 is stored in the storage device 11, and is read and executed by the CPU 10 step by step. The storage device 12 stores the mask pattern data having a hierarchical structure, and the storage device 13
The expanded mask pattern data obtained by the method of the present invention is stored in.

The display data or the drawing data obtained by the graphic display processing or the plot drawing processing of the CPU 10 is supplied from the CPU 10 to the CRT 15 and the plotter 16, respectively, where the mask pattern is graphically displayed and the plot drawing is performed.

The storage devices 11 to 13 are configured by using a single or a plurality of magnetic disk devices.

In FIG. 3, the CPU 10 reads the mask pattern data of the hierarchical structure stored in the storage device 12 after initial setting in step 20, performs hierarchical expansion processing (step 21), and the expanded mask obtained here. The pattern data is written in the storage device 13.

Thereafter, in step 20, it is determined whether the graphic display output is designated or the plot drawing output is designated (step 22). Based on this discrimination, the expanded mask pattern data is read out and the graphic display process (step 23) is performed. Then, the data is displayed on the CRT 15 or the plotting process (step 24) is performed and the plotter 16 plots.

Here, as shown in FIG. 4 (A), the vertical direction (Y direction) n
Identical figures F _{11 to} F _{nm in} rows and in the horizontal direction (X direction) m columns
If the Matrix Figure MF is configured with,
The matrix data includes, for example, the type of figure F ₁₁ , the position of the matrix origin MO in the mask pattern, and the number of repetitions n, m, X, and Y in the X and Y directions.
The data of the figure F representing the figures F _{11 to} F _nm is, for example, the X and Y coordinates of the vertex position (when each pattern is a polygon) in the figure F for each pattern of the pattern group forming the figure F.

FIG. 1 shows a flow chart of the main part of the method of the present invention. The processing shown in FIG. 1 is executed by the matrix data expanding section in the hierarchical expansion processing shown in FIG.

In FIG. 1, in step 28, the variable A is set to "1", and the variable XX is set to the value (X value) in the X direction of the figure F _AA (put the value of the variable A in the subscript) (step 2).
9). Next, set the Y value of the figure in the A-th row from the bottom of the matrix figure MF to the variable YY (step 31),
The figure F is placed at the position indicated by the variables XX and YY (step 32). This is the generation of the figure F with (XX, YY) added as position information.

Thereafter, the X direction pitch in the matrix data is added to the variable XX (step 33), and the number of loops (the number of repetitions of steps 32 and 33) is repeated in the X direction of the matrix data m.
And the value m−2 (A−1) obtained from the value of the variable A (step 34), and steps 32 and 33 until they match.
repeat. If they match, go to step 35
Set the X value of the figure F _AA in XX, and change the Y value of the figure A in the A-th row from the top of the matrix figure MF.
Set to YY (step 35). Next, the figure F is placed at the position indicated by variables XX and YY (step 36), and the variables are set.
The X direction pitch in the matrix data is added to XX (step 37), and the number of loops (the number of repetitions of steps 36 and 37) is compared with the value m-2 (A-1) (step 38).
Repeat steps 36 and 37 until they match.

As a result, the matrix figure shown in FIG.
The bottom lines l ₁ and the top line l ₂ of the MF are the figures F _{n1 to} F _nm and F
_{11 to} F _1m will be deployed.

In step 39, the variable A is compared with the designated number of revolutions set in step 20, and if they do not match, the variable A is incremented by "1" (step 30). After that, the process proceeds to step 29, and steps 29, 31 to 38 are executed. repeat. If they match, the variable A is set to "1" in step 40, and the Y value of the figure F _AA is set to the variable YY (step 41). Next, the X of the figure A in the A-th column from the left of the matrix figure MF
The value is set to the variable XX (step 42), and the figure F is arranged at the position indicated by the variables XX and YY (step 43).

Thereafter, the Y-direction pitch in the matrix data is added to the variable YY (step 44), and the number of loops (the number of repetitions of steps 43 and 44) is repeated in the Y-direction of the matrix data n.
Is compared with the value obtained by subtracting 2A from (step 45), and steps 43 and 44 are repeated until they match. If they match, the process proceeds to step 46, in which the Y value of the figure F _AA is set in the variable YY, and the X value of the figure in the A-th column from the right of the matrix figure MF is set in the variable XX (step 4
6). Next, the figure F is placed at the position indicated by the variables XX and YY (step 47), and Y in the matrix data is placed in the variable YY.
Add the direction pitch (step 48) and set the loop count to n.
After comparing with −2A (step 49), steps 47 and 48 are repeated until they match.

As a result, the matrix figure shown in FIG.
The leftmost column l ₃ of the MF and the rightmost l ₄ of the figures F _{21 to} F _n-11 and
F _{2m to} F _n-1m are expanded.

In step 50, A is proportional to the designated number of revolutions set in step 20, and if they do not match, the variable A is incremented by "1" (step 51), after which the process proceeds to step 41 and steps 41 to 49 are repeated, If they match, the process ends.

FIG. 4 (B) shows the matrix figure MF developed when the designated number of turns is "1", and when the designated number of turns is "2", the inside of FIG. 4 (B) is shown. One figure is additionally developed next to.

If the outermost figurines of the matrix figurines MF are expanded in this manner, it is possible to verify the arrangement relationship and the overlap between the matrifiguria MF and the other figures adjacent thereto.

For example, FIG. A is arranged in a matrix of 64.times.65 pieces in FIG. A, and FIG.
In the mask pattern data in which two pieces are arranged, the data of the figure A in the expanded mask pattern data becomes 465920 when the entire matrix expansion is performed as in the conventional case. On the other hand, when the designated number of turns is "1" in the method of the present invention, the number of data of FIG. A in the expanded mask pattern data is 28,448 and the data amount is reduced by 93.9%.

As a result, it is possible to prevent the capacity of the storage device 13 from becoming insufficient, and the verification process, which conventionally takes one day, can be completed in only about 15 minutes, and the verification turnaround becomes faster.

〔The invention's effect〕

As described above, according to the method for verifying mask pattern data of the present invention, the turnaround of verification can be speeded up, the shortage of storage capacity can be prevented, and it is extremely useful in practice.

[Brief description of drawings]

FIG. 1 is a flowchart of an embodiment of a main part of the method of the present invention, FIG. 2 is a configuration diagram of a system for realizing the method of the present invention, FIG. 3 is a flowchart of an embodiment of a verification process, and FIG. FIG. 4 is a diagram for explaining the expansion of the matrix figure of the method of the present invention. In the figure, 10 is a CPU, 11 to 13 are storage devices, 15 is a CRT, 16 is a plotter, and 20 to 50 are steps.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI technical display location H01L 21/027

Claims (1)

[Claims] 1. A method of verifying mask pattern data, wherein mask pattern data having a hierarchical structure including a matrix figure which is repeated by the same figure is expanded, and a mask pattern is displayed and drawn by the expanded mask pattern data obtained for verification. , Expand the figure only in the peripheral part of the matrix figure in the mask pattern data of the hierarchical structure (30 to 50), and display and plot the mask pattern having the matrix figure in which the figure in the central part is removed to perform verification. A method for verifying mask pattern data.