JPH0770625B2 - Semiconductor memory device - Google Patents

Description

The present invention relates to a semiconductor memory device in which hot electrons generated by avalanche breakdown are accumulated in a floating gate to store information.

FIGS. 1, 2 and 3 show a conventional device of this type, FIG. 1 is a plan view, FIG. 2 is a transverse sectional view of FIG. 1, and FIG. It is a longitudinal cross-sectional view of FIG. In these figures, 1 is a control gate, 2 is a floating gate, 3 is a channel portion, 4 is a drain, 5 is a source, 6
Is a surface protective film, 7 is an interlayer insulating film, 8 is a gate oxide film, 9
Is a field oxide film, and 10 is a silicon substrate.

Next, the operation will be described.

In the depletion layer region near the drain 4, a part of the photoelectrons generated by avalanche breakdown overcomes the energy barrier at the interface between the silicon substrate 10 and the gate oxide film 8 and is generated by the electric field in the gate oxide film 8 created by the control gate 1. It flows through the gate oxide film 8 and falls into the floating gate 2 to be accumulated. Since the floating gate 2 is completely insulated from the outside by the interlayer insulating film 7 and the gate oxide film 8, the photoelectrons are stably held for a long time and have a memory function. In an actual memory device, a state where photoelectrons are accumulated in the floating gate 2 (data writing state),
Information is stored in an empty state (erased state).

Since the conventional semiconductor memory device is configured as described above, it is necessary to enhance the insulating properties of the interlayer insulating film 7 and the gate oxide film 8 around the floating gate 2 in order to improve the memory retention characteristic, which is a manufacturing defect. Due to this, there is a drawback that the memory retention property is also deteriorated when the insulation property is deteriorated.

The present invention has been made in order to eliminate the above-mentioned drawbacks of the conventional ones, and the floating gate having a two-layer structure can reduce the occurrence of memory volatilization failure due to manufacturing defects. It is intended to provide a memory device. An embodiment of the present invention will be described below with reference to FIGS.

In FIG. 4, the same reference numerals as those in FIGS. 1 to 3 indicate the same parts, and 2a and 2b are lower and upper floating gates, respectively.
As shown in FIG. 6 and FIG. 6, the insulating film 11 has a sandwiched two-layer structure.
And the upper floating gate 2b.

The floating gates 2a and 2b have the same structure as the conventional device except that they have a two-layer structure.

Next, the operation will be described.

In the depletion layer region near the drain 4, some of the photoelectrons generated by the avalanche breakdown flow in the gate oxide film 8 by the electric field generated by the control gate 1, and the floating gate 2a on the lower side and the floating gate 2b on the upper side are formed. It is accumulated and falls. The respective amounts of electric charges accumulated in the lower floating gate 2a and the upper floating gate 2b are designed so that the transistor operates sufficiently even if they exist independently.

As a result, even if the insulating property of the gate oxide film 8 is deteriorated due to a manufacturing defect and the memory retention characteristic of the lower floating gate 2a is deteriorated, as long as there is no problem in the memory retention characteristic of the upper floating gate 2b, Good storage retention characteristics are expected for the entire storage device.

In addition, due to manufacturing defects, the insulating property of the interlayer insulating film 7 is lowered,
Even when the memory retention characteristic of the upper floating gate 2b is deteriorated, similarly, the lower floating gate 2a can prevent the characteristic deterioration of the entire device.

Although the lower floating gate 2a and the upper floating gate 2b have the same shape in the above embodiment, the shape may have a left shape in order to adjust the accumulated charge amounts on the upper side and the lower side.

As described above, according to the present invention, the floating gate has the two-layer structure with the insulating film interposed, and the operation of the memory device has redundancy. Therefore, not only the reliability is improved, but also the yield is improved. There is.

[Brief description of drawings]

1 to 3 are plan views showing a conventional semiconductor memory device,
A horizontal sectional view and a vertical sectional view, and FIGS. 4 to 6 are a plan view, a horizontal sectional view and a vertical sectional view of a semiconductor memory device showing an embodiment of the present invention. In the figure, 1 is a control gate, 2a is a lower floating gate, 2b is an upper floating gate, 3 is a channel portion, 4 is a drain, 5 is a source, 6 is a surface protective film, 7 is an interlayer insulating film, 8 is A gate oxide film, 9 is a field oxide film, 10 is a silicon substrate, and 11 is an insulating film. The same reference numerals in the drawings indicate the same or corresponding parts.

Claims (1)

[Claims] 1. A semiconductor memory device in which hot electrons generated by avalanche breakdown are stored in a floating gate to store information, wherein the floating gate has a two-layer structure with an insulating film interposed. apparatus.