JPH0770754B2 - Method for forming resistance layer in semiconductor optical position detector - Google Patents
Method for forming resistance layer in semiconductor optical position detectorInfo
- Publication number
- JPH0770754B2 JPH0770754B2 JP4215985A JP4215985A JPH0770754B2 JP H0770754 B2 JPH0770754 B2 JP H0770754B2 JP 4215985 A JP4215985 A JP 4215985A JP 4215985 A JP4215985 A JP 4215985A JP H0770754 B2 JPH0770754 B2 JP H0770754B2
- Authority
- JP
- Japan
- Prior art keywords
- resistance layer
- resistance
- layer
- position detector
- semiconductor optical
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/20—Electrodes
- H10F77/244—Electrodes made of transparent conductive layers, e.g. transparent conductive oxide [TCO] layers
Landscapes
- Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)
Description
【発明の詳細な説明】 (産業上の利用分野) 本発明は、半導体光位置検出器における抵抗層の形成方
法に関するものである。The present invention relates to a method for forming a resistance layer in a semiconductor optical position detector.
(従来の技術) 本出願人は、先に特願昭57年161470号に係る半導体光位
置検出器を提案した。(Prior Art) The applicant previously proposed a semiconductor optical position detector according to Japanese Patent Application No. 161470/1982.
この半導体光位置検出器は、アモルファスシリコンを素
材とする光起電力層を備え、この光起電力層の一方また
は双方の面に抵抗層を形成するとともに、該抵抗層に集
電々極を配設した構成をもつ。This semiconductor photo-position detector includes a photovoltaic layer made of amorphous silicon, a resistive layer is formed on one or both surfaces of the photovoltaic layer, and a collector pole is arranged on the resistive layer. It has the configuration
(発明が解決しようとする問題点) 上記先願に係る半導体光位置検出器の抵抗層は、スパッ
タリング法あるいは真空蒸着法等の製法によって形成さ
れ、その材料としてはITO(インジウム−スズ−酸化
物)が使用されている。(Problems to be Solved by the Invention) The resistance layer of the semiconductor optical position detector according to the above-mentioned prior application is formed by a manufacturing method such as a sputtering method or a vacuum deposition method, and its material is ITO (indium-tin-oxide). ) Is used.
ところで、この種の検出器の検出感度を高めるには上記
抵抗層の抵抗値を高くすることが望ましいが、上記ITO
を抵抗層の材料として用いた場合、安定して得られるシ
ート抵抗は数+Ω/□であり、数100Ω/□以上のシー
ト抵抗を再現性よく得ることは困難であった。By the way, in order to enhance the detection sensitivity of this type of detector, it is desirable to increase the resistance value of the resistance layer.
When is used as the material of the resistance layer, the sheet resistance stably obtained is several + Ω / □, and it is difficult to obtain the sheet resistance of several hundreds Ω / □ or more with good reproducibility.
すなわち第7図は、スパッタリング法によってITOから
なる膜厚約1000Åの抵抗層を形成する場合の酸素分圧と
シート抵抗値との関係を基板温度をパラメータとして例
示しているが、再現性よく抵抗層を得るにはシート抵抗
値の変化が緩やかな酸素分圧下で抵抗層を形成する必要
があることから数100Ω/□以上のシート抵抗を得るこ
とは困難であった。That is, FIG. 7 illustrates the relationship between the oxygen partial pressure and the sheet resistance value when the resistance layer of ITO having a film thickness of about 1000 Å is formed by the sputtering method using the substrate temperature as a parameter. It is difficult to obtain a sheet resistance of several hundred Ω / □ or more because it is necessary to form the resistance layer under an oxygen partial pressure where the change in sheet resistance value is gentle in order to obtain a layer.
なおシート抵抗を高くするには、膜厚を薄くすればよ
く、たとえば上記膜厚(1000Å)を1/10以下にすれば数
百Ω/□のシート抵抗が得られる。しかしこの方法は製
造技術上、再現性がきわめて悪くなることから実用性に
欠ける。The sheet resistance can be increased by reducing the film thickness. For example, if the film thickness (1000Å) is set to 1/10 or less, a sheet resistance of several hundred Ω / □ can be obtained. However, this method is not practical because the reproducibility is extremely poor in terms of manufacturing technology.
(問題点を解決するための手段) 本発明は、アモルファスシリコンからなるpin構造の光
起電力層と、この光起電力層の少なくとも受光面側に形
成した透光性を有する抵抗層と、この抵抗層に配設した
位置信号取出し用の集電電極とを備えた半導体光位置検
出器に適用され、前記抵抗層を、酸化スズを主体とする
材料を用いて基板温度300〜400℃、酸素分圧5×10-4〜
5×10-5Torrの条件下でスパッタリング法により成膜す
ることを特徴としている。(Means for Solving Problems) The present invention relates to a photovoltaic layer having a pin structure made of amorphous silicon, a light-transmissive resistance layer formed on at least the light receiving surface side of the photovoltaic layer, It is applied to a semiconductor optical position detector equipped with a collecting electrode for extracting a position signal arranged in a resistance layer, and the resistance layer is a substrate temperature of 300 to 400 ° C using a material mainly containing tin oxide, and oxygen. Partial pressure 5 × 10 -4 ~
The feature is that the film is formed by a sputtering method under the condition of 5 × 10 −5 Torr.
(作用) 酸化スズを主体とする材料を用いて、所定の温度および
酸素分圧下で抵抗層を成膜しているので、高い面内平均
抵抗値が得られ、かつ面内での抵抗分布が比較的均一な
抵抗層が再現性良く形成される。(Function) Since the resistance layer is formed by using a material mainly containing tin oxide under a predetermined temperature and an oxygen partial pressure, a high in-plane average resistance value can be obtained and the in-plane resistance distribution can be improved. A relatively uniform resistance layer is formed with good reproducibility.
(実施例) 以下、本発明の実施例を添付図面を参照して詳細に説明
する。(Example) Hereinafter, an example of the present invention will be described in detail with reference to the accompanying drawings.
第1図(a)は本発明が適用される半導体光位置検出器
の一例を示す平面図、同図(b),(c)は各々同図
(a)のA−A′線、B−B′線による断面図である。FIG. 1 (a) is a plan view showing an example of a semiconductor optical position detector to which the present invention is applied, and FIGS. 1 (b) and (c) are lines AA 'and B- in FIG. 1 (a), respectively. It is sectional drawing by the B'line.
この半導体光位置検出器はガラス等からなる基板1上に
酸化スズ(SnO2)を主材料とする抵抗層2(透明導電
膜)がスパッタリング法によって形成されている。そし
て、この抵抗層2の上面に光起電力層3が形成され、さ
らに該層3の上面に前記抵抗層2と同様の材料からなる
抵抗層4が同様の方法によって形成されている。In this semiconductor optical position detector, a resistance layer 2 (transparent conductive film) containing tin oxide (SnO 2 ) as a main material is formed on a substrate 1 made of glass or the like by a sputtering method. A photovoltaic layer 3 is formed on the upper surface of the resistance layer 2, and a resistance layer 4 made of the same material as the resistance layer 2 is formed on the upper surface of the resistance layer 2 by the same method.
上記光起電力層3は3層構造を有し、図示されていない
が、上層、中層および下層が各々P型アモルファスシリ
コン、i型アモルファスシリコンおよびn型アモルファ
スシリコンで形成されている。なお、これらの層はCVD
法等によって形成される。The photovoltaic layer 3 has a three-layer structure, and although not shown, the upper layer, the middle layer and the lower layer are formed of P-type amorphous silicon, i-type amorphous silicon and n-type amorphous silicon, respectively. Note that these layers are CVD
It is formed by the method.
また上記抵抗層2の両端部には棒状をなした一対のx方
向集電々極5a,5bが対向配置され、同様に抵抗層4の両
端部には一対のy方向集電々極6a,6bが対向配置されて
いる。A pair of rod-shaped x-direction collector electrodes 5a, 5b are arranged opposite to each other at both ends of the resistance layer 2, and a pair of y-direction collector electrodes 6a, 6b are similarly arranged at both ends of the resistance layer 4. It is arranged opposite.
この位置検出器の等価回路は第3図に示すように表わさ
れる。すなわち光照射位置7においては抵抗層2,4間に
電流源8および理想ダイオード9が形成され、また受光
面を除く抵抗層2,4間には抵抗10と接合容量11が形成さ
れる。そして抵抗層2,4は各々分布抵抗12,14で構成され
る。The equivalent circuit of this position detector is represented as shown in FIG. That is, at the light irradiation position 7, the current source 8 and the ideal diode 9 are formed between the resistance layers 2 and 4, and the resistor 10 and the junction capacitance 11 are formed between the resistance layers 2 and 4 except the light receiving surface. The resistance layers 2 and 4 are composed of distributed resistances 12 and 14, respectively.
ここで、上記半導体光位置検出器の位置検出作用につい
て説明する。Here, the position detecting action of the semiconductor optical position detector will be described.
いま第4図(a),(b),(c)に示すように上記半
導体光位置検出器に光ビームAが入射すると、その入射
位置Pに光生成電流が発生する。このとき抵抗層2にお
いては入射位置Pと電極5a,5b間の抵抗rx1,rx2によって
上記電流が分割され、また抵抗層4においては位置Pと
電極6a,6b間の抵抗ry1,ry2によって上記電流が分割され
るので、電極5a,5bから電流Ix1,Ix2が、また電極6a,6b
から電流Iy1,Iy2が各々取出される。As shown in FIGS. 4A, 4B and 4C, when the light beam A is incident on the semiconductor optical position detector, a photo-generated current is generated at the incident position P. At this time, in the resistance layer 2, the current is divided by the resistances r x1 and r x2 between the incident position P and the electrodes 5a and 5b, and in the resistance layer 4, the resistances r y1 and r between the position P and the electrodes 6a and 6b. Since the current is divided by y2 , the currents I x1 and I x2 from the electrodes 5a and 5b and the electrodes 6a and 6b, respectively.
The currents I y1 and I y2 are taken out from each.
上記各分割電流Ix1,Ix2,Iy1,Iy2は、通常第5図に例示
するような信号処理回路に入力される。The divided currents I x1 , I x2 , I y1 , I y2 are usually input to a signal processing circuit as illustrated in FIG.
この処理回路は上記各電流が入力されるプリアンプ13〜
16と、電流和Ix1+Ix2およびIy1+Iy2を得る加算器17お
よび18と、電流差Ix1−Ix2およびIy1−Iy2を得る減算器
19および20と、加算器17と減算器19の各出力の比および
加算器18と減算器20の各出力の比を得る除算器21および
22とから構成され、除算器21および22から下式(1)に
示すx方向の光入射位置信号Pxおよび下式(2)に示す
y方向の光入射位置信号Pyが各々出力される。This processing circuit includes a preamplifier 13 to which the above currents are input.
16, adders 17 and 18 for obtaining current sums I x1 + I x2 and I y1 + I y2 , and subtractors for obtaining current differences I x1 −I x2 and I y1 −I y2
19 and 20, and a divider 21 and a ratioer which obtains a ratio between the outputs of the adder 17 and the subtractor 19 and a ratio between the outputs of the adder 18 and the subtractor 20.
22 and each of the dividers 21 and 22 outputs a light incident position signal P x in the x direction shown in the following formula (1) and a light incident position signal P y in the y direction shown in the following formula (2). .
なお、この処理回路によれば、入射光の強度およびその
変化に影響されない位置信号を得ることができる。 According to this processing circuit, a position signal that is not affected by the intensity of incident light and its change can be obtained.
ここで、x方向のみの位置検出に着目し、抵抗層2にお
ける電極5aと5b間の抵抗をr、電極5aと5b間の距離L、
電極5aおよび5bに接続される各負荷抵抗(アンプ13,14
の入力抵抗)をRとすると、第6図に示す等価回路が得
られる。Here, focusing on the position detection only in the x direction, the resistance between the electrodes 5a and 5b in the resistance layer 2 is r, the distance L between the electrodes 5a and 5b is L,
Each load resistance connected to electrodes 5a and 5b (amplifier 13,14
If the input resistance of is equal to R, the equivalent circuit shown in FIG. 6 is obtained.
この等価回路によれば、キルヒホッフの分法則に基づい
てIx1,Ix2が各々 ただし、ρ:抵抗層2の抵抗率 と表わされ、このIx1,Ix2を上式(1)に代入すると、 なる関係が得られる。同式(5)より位置信号Pxの出力
を大きくするには、(R/r)をできるだけ小さくすれば
よいことになる。なお、位置信号Pyの出力についても同
様である。According to this equivalent circuit, I x1 and I x2 are respectively calculated based on Kirchhoff's law of division. However, ρ is expressed as the resistivity of the resistance layer 2, and when these I x1 and I x2 are substituted into the above equation (1), A relationship is obtained. In order to increase the output of the position signal P x from the equation (5), (R / r) should be made as small as possible. The same applies to the output of the position signal P y .
(R/r)を小さくするには、Rを小さくするかrを大き
くすればよいが、負荷抵抗Rは処理回路の制約上むやみ
に小さくすることができない。In order to reduce (R / r), it is sufficient to reduce R or increase r, but the load resistance R cannot be reduced unnecessarily due to the restriction of the processing circuit.
本実施例では、酸化スズを主体とする材料を用いてスパ
ッタリング法により抵抗層を成膜しているが、そのさい
の基板温度を300〜400℃の範囲に、また酸素分圧値を5
×10-4〜5×10-5Torrの範囲にそれぞれ設定している。In this embodiment, the resistance layer is formed by the sputtering method using a material mainly containing tin oxide. At that time, the substrate temperature is in the range of 300 to 400 ° C., and the oxygen partial pressure value is 5
It is set in the range of × 10 -4 to 5 × 10 -5 Torr.
このような条件下で抵抗層を成膜すれば、第2図に示す
ように、成膜される抵抗層に極めて高いシート抵抗値
(膜厚1000Åで100Ω/□以上)を持たせることができ
る。If the resistance layer is formed under such conditions, as shown in FIG. 2, the resistance layer to be formed can have an extremely high sheet resistance value (100Ω / □ or more at a film thickness of 1000Å). .
したがって、本実施例によれば、上記(R/r)の値を低
下させて位置検出信号の出力を飛躍的に増大させること
ができ、これに伴ってS/N比も向上する。Therefore, according to the present embodiment, the value of (R / r) can be reduced and the output of the position detection signal can be dramatically increased, and the S / N ratio can be improved accordingly.
また、温度範囲300〜400℃におけるシート抵抗変化特性
相互に近似していることから明らかなように、上記温度
範囲内であればほぼ近似したシート抵抗が得られ、しか
も、上記各特性がそれほど急俊に立ち上がっていないの
で、5×10-4〜5×10-5Torrという広い酸素分圧範囲下
で高いシート抵抗が得られる。それゆえ、面内での抵抗
分布が比較的均一な抵抗層を再現性良く形成することが
できる。Further, as is clear from the fact that the sheet resistance change characteristics in the temperature range of 300 to 400 ° C are close to each other, it is clear that within the above temperature range, a sheet resistance close to each other can be obtained, and the above characteristics are not so sharp. Since it has not risen rapidly, high sheet resistance can be obtained under a wide oxygen partial pressure range of 5 × 10 −4 to 5 × 10 −5 Torr. Therefore, a resistance layer having a relatively uniform in-plane resistance distribution can be formed with good reproducibility.
第8図は抵抗層2,4を上記酸化スズを主体とする材料で
形成した半導体光位置検出器の出力特性を例示してい
る。同図において、破線は光ビームの照射位置を、また
実線はこの検出器で検出された位置を各々示している。FIG. 8 exemplifies the output characteristics of the semiconductor optical position detector in which the resistance layers 2 and 4 are formed of the above-mentioned material mainly containing tin oxide. In the figure, the broken line shows the irradiation position of the light beam, and the solid line shows the position detected by this detector.
なお、100%の酸化スズを用いて抵抗層2,4を形成する
と、その抵抗値が必要以上に大きくなるので、該抵抗層
の材料としては酸化スズに適量の不純物、たとえばアン
チモンを混入したものが使用される。If the resistance layers 2 and 4 are formed by using 100% tin oxide, the resistance value becomes unnecessarily large. Therefore, as the material for the resistance layer, tin oxide mixed with an appropriate amount of impurities such as antimony is used. Is used.
上記半導体光位置検出器は、光起電力層3の双方の面に
抵抗層を配した構成を有するが、本発明は光起電力層の
一方の面のみに抵抗層を形成する構造の検出器にも当然
適用することができ、この場合、この抵抗層にx,y方向
について集電々極5a,5b,6a,6bが配設され、かつ光起電
力層の他方の面に共通電極が設けられる。The semiconductor photo-position detector has a structure in which resistance layers are arranged on both sides of the photovoltaic layer 3, but the present invention is a detector having a structure in which the resistance layer is formed only on one side of the photovoltaic layer. Of course, in this case, the resistance layer is provided with collector electrodes 5a, 5b, 6a, 6b in the x and y directions, and a common electrode is provided on the other surface of the photovoltaic layer. To be
また本発明は1次元の検出器にも有効に適用しうる。な
お、実施例における抵抗層2は透明にする必要はない
が、この抵抗層2を透明にすれば、基板1側からの光入
射位置をも検出できることになる。The present invention can also be effectively applied to a one-dimensional detector. It is not necessary to make the resistance layer 2 transparent in the embodiment, but if the resistance layer 2 is made transparent, the light incident position from the substrate 1 side can be detected.
(発明の効果) 本発明によれば、面内平均抵抗値が高く、かつ面内での
抵抗分布が比較的均一な抵抗層を再現性良く形成するこ
とができ、これによって、信頼性の高い半導体光位置検
出器を量産することが可能になる。(Effects of the Invention) According to the present invention, it is possible to form a resistance layer having a high average in-plane resistance value and a relatively uniform in-plane resistance distribution with good reproducibility, which results in high reliability. It becomes possible to mass-produce semiconductor optical position detectors.
第1図は本発明が適用される半導体光位置検出器の一例
を示し、同図(a)はその平面図、同図(b)および同
図(c)は各々同図(a)のA−A′線およびB−B′
線による断面図、第2図は酸化スズを主材料とする抵抗
層の成膜条件とシート抵抗との関係を例示したグラフ、
第3図は第1図に示す位置検出器の等価回路図、第4図
は第1図に示す位置検出器の作用を説明する図、第5図
は2次元半導体光位置検出器の出力信号を処理する回路
の一例を示したブロック図、第6図はx方向検出時の作
用を示す等価回路図、第7図は、ITOからなる抵抗層の
成膜条件とシート抵抗との関係を例示したグラフ、第8
図は第1図に示す本発明が適用された半導体光位置検出
器の出力特性を例示したグラフである。 1……基板、2,4……抵抗層、3……光起電力層、5a,5
b,6a,6b……集電々極。FIG. 1 shows an example of a semiconductor optical position detector to which the present invention is applied. FIG. 1 (a) is a plan view thereof, and FIG. 1 (b) and FIG. -A 'line and BB'
FIG. 2 is a cross-sectional view taken along a line, and FIG. 2 is a graph illustrating the relationship between the film-forming conditions of the resistance layer containing tin oxide as a main material and the sheet resistance
FIG. 3 is an equivalent circuit diagram of the position detector shown in FIG. 1, FIG. 4 is a diagram explaining the operation of the position detector shown in FIG. 1, and FIG. 5 is an output signal of the two-dimensional semiconductor optical position detector. FIG. 6 is a block diagram showing an example of a circuit for processing the above, FIG. 6 is an equivalent circuit diagram showing the action at the time of detecting in the x direction, and FIG. 7 is an example of the relationship between the film forming conditions of the ITO resistance layer and the sheet resistance. Graph, No. 8
The drawing is a graph illustrating the output characteristic of the semiconductor optical position detector to which the present invention shown in FIG. 1 is applied. 1 ... Substrate, 2, 4 ... Resistor layer, 3 ... Photovoltaic layer, 5a, 5
b, 6a, 6b …… Current collecting poles.
Claims (1)
光起電力層と、この光起電力層の少なくとも受光面側に
形成した透光性を有する抵抗層と、この抵抗層に配設し
た位置信号取出し用の集電電極とを備えた半導体光位置
検出器に適用され、 前記抵抗層を、酸化スズを主体とする材料を用いて基板
温度300〜400℃、酸素分圧5×10-4〜5×10-5Torrの条
件下でスパッタリング法により成膜することを特徴とす
る半導体光位置検出器における抵抗層の形成方法。1. A photovoltaic layer having a pin structure made of amorphous silicon, a translucent resistance layer formed on at least the light-receiving surface side of the photovoltaic layer, and a position signal extraction provided on the resistance layer. The present invention is applied to a semiconductor optical position detector equipped with a collector electrode for use as a substrate, and the resistance layer is made of a material mainly composed of tin oxide at a substrate temperature of 300 to 400 ° C. and an oxygen partial pressure of 5 × 10 −4 to 5 A method for forming a resistance layer in a semiconductor optical position detector, characterized in that a film is formed by a sputtering method under a condition of × 10 -5 Torr.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4215985A JPH0770754B2 (en) | 1985-03-04 | 1985-03-04 | Method for forming resistance layer in semiconductor optical position detector |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4215985A JPH0770754B2 (en) | 1985-03-04 | 1985-03-04 | Method for forming resistance layer in semiconductor optical position detector |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61201482A JPS61201482A (en) | 1986-09-06 |
| JPH0770754B2 true JPH0770754B2 (en) | 1995-07-31 |
Family
ID=12628168
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4215985A Expired - Fee Related JPH0770754B2 (en) | 1985-03-04 | 1985-03-04 | Method for forming resistance layer in semiconductor optical position detector |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0770754B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4987461A (en) * | 1989-10-11 | 1991-01-22 | The University Of New Mexico | High position resolution sensor with rectifying contacts |
| JP2771709B2 (en) * | 1991-04-11 | 1998-07-02 | 三洋電機株式会社 | Optical position detector |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5950579A (en) * | 1982-09-16 | 1984-03-23 | Komatsu Ltd | Semiconductor optical position detector |
-
1985
- 1985-03-04 JP JP4215985A patent/JPH0770754B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61201482A (en) | 1986-09-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH04395B2 (en) | ||
| US5130775A (en) | Amorphous photo-detecting element with spatial filter | |
| JPH0671097B2 (en) | Color sensor | |
| US4698658A (en) | Amorphous semiconductor device | |
| JPS61141185A (en) | Manufacture of photovoltaic element | |
| JPH0770754B2 (en) | Method for forming resistance layer in semiconductor optical position detector | |
| JPH0691276B2 (en) | Method for forming collector electrode in semiconductor optical position detector | |
| US5315100A (en) | Photoelectric conversion apparatus for detecting movement of object with spatial filter electrode | |
| US4761547A (en) | Semiconductor photoelectric conversion device for light incident position detection | |
| US4851658A (en) | Color sensor having improved uniformity of sensitivity | |
| JP2755670B2 (en) | Photoelectric conversion element and photovoltaic device | |
| JP3469061B2 (en) | Solar cell | |
| JP2596419B2 (en) | Position detection device | |
| JP3398161B2 (en) | Photoelectric conversion device | |
| JPH0691277B2 (en) | Semiconductor position detector | |
| JPS61129509A (en) | Semiconductor optical position detector | |
| JPS63164281A (en) | Position detecting device | |
| JP2892921B2 (en) | Photovoltaic device | |
| JPS63137320A (en) | position detection device | |
| JPH04343276A (en) | Light position detector | |
| JPH0820210B2 (en) | Optical position detector | |
| JPS63164280A (en) | Position detecting device | |
| JPS63137319A (en) | Position detector | |
| JPH02148773A (en) | Optical sensor | |
| JPH03276683A (en) | Photoelectric conversion element and photovoltaic device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |