JPH0770799B2 - Circuit board - Google Patents
Circuit boardInfo
- Publication number
- JPH0770799B2 JPH0770799B2 JP61171376A JP17137686A JPH0770799B2 JP H0770799 B2 JPH0770799 B2 JP H0770799B2 JP 61171376 A JP61171376 A JP 61171376A JP 17137686 A JP17137686 A JP 17137686A JP H0770799 B2 JPH0770799 B2 JP H0770799B2
- Authority
- JP
- Japan
- Prior art keywords
- conductive layer
- layer
- circuit board
- insulating substrate
- conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
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- Parts Printed On Printed Circuit Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Description
【発明の詳細な説明】 本発明は電子機器に使用される回路基板に関するもので
ある。The present invention relates to a circuit board used in electronic equipment.
従来の技術 従来、各種の電子機器に使用される回路基板として第6
図のものがある。第6図中、1はスルーホール1aを設け
たセラミック等の絶縁基板、2は絶縁基板1の面上に銀
パラジウム等を印刷後焼成して形成された導電層、3は
酸化ルテニウム等を印刷後焼成して形成された抵抗層、
4は導電層2上を選択的に形成し、導電層2及び抵抗層
3を保護する絶縁層、5は導電層2の電極部2aに半田付
されたチップ状コンデンサ、トランジスタ等の回路部
品、6は両端が基板1の上、下面に形成された導電層2
に半田7によって加熱溶着された導電性のピンである。2. Description of the Related Art Conventionally, the sixth circuit board has been used in various electronic devices.
There is one in the figure. In FIG. 6, 1 is an insulating substrate made of ceramic or the like having through holes 1a, 2 is a conductive layer formed by printing silver palladium or the like on the surface of the insulating substrate 1 and firing, and 3 is printing ruthenium oxide or the like. A resistance layer formed by post-baking,
Reference numeral 4 denotes an insulating layer which selectively forms on the conductive layer 2 and protects the conductive layer 2 and the resistance layer 3. Reference numeral 5 denotes a chip-shaped capacitor soldered to the electrode portion 2a of the conductive layer 2, a circuit component such as a transistor, 6 is a conductive layer 2 whose both ends are formed on the upper and lower surfaces of the substrate 1, respectively.
It is a conductive pin heat-welded with solder 7.
発明が解決しようとする問題点 上記構成によれば、導電層2が、厚膜技術により印刷、
焼成して形成されており、この印刷、焼成は約850℃で
高温処理されるので処理過程における導電層2の割れ等
が生じ易く信頼性に欠けるという問題点があった。又絶
縁基板1の両面に形成された導電層2を電気的な導通を
図るのにピン6を必要とし、又このピン6と導電層2と
の半田付作業を必要とし、このため部品点数及び作業工
程の増加をもたらすという問題があった。Problems to be Solved by the Invention According to the above configuration, the conductive layer 2 is printed by the thick film technique,
Since it is formed by baking, and the printing and baking are carried out at a high temperature of about 850 ° C., there is a problem that the conductive layer 2 is liable to be cracked in the processing process and lacks reliability. Further, the pins 6 are required to electrically connect the conductive layers 2 formed on both surfaces of the insulating substrate 1 to each other, and soldering work between the pins 6 and the conductive layers 2 is required. There is a problem that it causes an increase in work processes.
本発明は上記問題点を解決した回路基板を提供すること
を目的とする。It is an object of the present invention to provide a circuit board that solves the above problems.
問題点を解決するための手段 本発明は、絶縁基板に抵抗材を印刷し、焼成して抵抗層
を形成し、無電解メッキあるいはスパッタにて第1の導
電層を形成し、電気メッキにて該第1の導電層上に第2
の導電層を形成し、該第1及び第2の導電層を選択除去
して配線部を形成し、該導電層の配線部及び該抵抗層を
保護する絶縁層を印刷して電極部を形成し、該電極部上
に該電極部と接続する回路部品を取り付けたものであ
る。Means for Solving the Problems In the present invention, a resistance material is printed on an insulating substrate, fired to form a resistance layer, and a first conductive layer is formed by electroless plating or sputtering, and then electroplating is performed. A second layer on the first conductive layer
Forming a conductive layer, selectively removing the first and second conductive layers to form a wiring portion, and printing an insulating layer for protecting the wiring portion of the conductive layer and the resistance layer to form an electrode portion. Then, a circuit component connected to the electrode portion is attached on the electrode portion.
作用 この構成は、構成及び作業工程の簡略化、高密度実装の
向上を計る。Function This structure simplifies the structure and work process, and improves high-density mounting.
実施例 次に本発明になる回路基板の実施例について説明する。
第1図、第2図は本発明に係る回路基板の第1実施例
で、第1図は要部断面図、第2図は製造工程図である。
第1図、11はスルーホール11aを設けたセラミック、ガ
ラス等の絶縁基板、13は酸化ルテニウム、カーボン等を
印刷後焼成して形成され、抵抗素子を構成する抵抗層、
には絶縁基板11の面上及びスルーホール11aの内壁に銅
等の導電材で形成された導電層、14は導電層12上を選択
に形成し、導電層12及び抵抗層13を保護する絶縁層、15
は導電層12の電極部12aに半田20によって加熱溶着され
たチップ状コンデンサ、トランジスタ等の回路部品であ
る。Examples Next, examples of the circuit board according to the present invention will be described.
1 and 2 show a first embodiment of a circuit board according to the present invention. FIG. 1 is a sectional view of an essential part and FIG. 2 is a manufacturing process drawing.
1 and 11 are insulating substrates such as ceramics and glass provided with through holes 11a, 13 is a resistance layer which is formed by printing ruthenium oxide, carbon, etc. after printing and constitutes a resistance element,
Is a conductive layer formed of a conductive material such as copper on the surface of the insulating substrate 11 and on the inner wall of the through hole 11a, and 14 is selectively formed on the conductive layer 12 to protect the conductive layer 12 and the resistance layer 13 from each other. Layer, 15
Is a circuit component such as a chip-shaped capacitor and a transistor, which is heat-welded to the electrode portion 12a of the conductive layer 12 with solder 20.
次に、第2図(A)〜(F)により、製法について説明
する。まず、同図(A)に示す如く予め上、下面を貫通
するスルーホール11aを加工したセラミック等の絶縁基
板11を用意する。次に、絶縁基板11の上、下面に酸化ル
テニウム混入の液状の抵抗材を印刷し、焼成して抵抗層
13を形成する。次に、同図(C)に示す如く約50℃の温
度雰囲気で銅メッキして、絶縁基板11の面上、スルーホ
ール11aの内壁及び抵抗層13の上面を導電層で被覆す
る。ここで、銅で形成される導電層12の厚さは20〜100
μmの範囲であるが、絶縁基板が電気メッキされないの
で、まず無電解メッキあるいはスパッタで数μmの導電
層を形成し、次に電気メッキして所定の膜厚をもった導
電層を形成すると効果的である。Next, the manufacturing method will be described with reference to FIGS. 2 (A) to (F). First, as shown in FIG. 3A, an insulating substrate 11 made of ceramic or the like having a through hole 11a penetrating the upper and lower surfaces is prepared in advance. Next, a liquid resistance material mixed with ruthenium oxide is printed on the upper and lower surfaces of the insulating substrate 11 and baked to form a resistance layer.
Form 13. Next, as shown in FIG. 6C, copper is plated in an atmosphere of a temperature of about 50 ° C. to cover the surface of the insulating substrate 11, the inner wall of the through hole 11a and the upper surface of the resistance layer 13 with a conductive layer. Here, the thickness of the conductive layer 12 formed of copper is 20 to 100.
Although it is in the range of μm, since the insulating substrate is not electroplated, it is effective to first form a conductive layer of several μm by electroless plating or sputtering, and then electroplate to form a conductive layer having a predetermined thickness. Target.
次に、導図(D)に示す如く、導電層12をエッチングし
て不要部分を除去し、電極部12a、配線部12b及び配線部
12bと導通するスルーホール電極部12cを形成する。次
に、同図(E)に示す如く、導電層12及び抵抗層139を
保護する絶縁層14を電極部12を除き印刷後乾燥して形成
する。最後に、同図(F)に示す如くチップ状コンデン
サあるいはトランジスタ素子等の回路部品を半田21の加
熱溶着により電極部12aと導通固着し、以上により回路
基板が完成する。第3図は本発明に係る回路基板の第2
実施例を示す要部断面図である。図中、第1図と同一部
分は同一符合を付し、その説明を省略する。第3図中、
11は絶縁基板、12は導電層、13は抵抗素子を形成する抵
抗層、16接着剤、17は接着剤16を介して絶縁基板11に固
着される耐熱性及び電気絶縁性にすぐれたポリィミド系
の合成樹脂からなる絶縁フィルム、18は絶縁フィルム17
に固着され銅またはアルミ等の導電材で配線部18b及び
電極部18aを形成する第2の導電層、14は導電層18の電
極部18aを除き、その上面を保護する絶縁層、15は半田2
1の加熱溶着によって導電層18の電極部18aに導通固着さ
れるチップ状コンデンサあるいはトランジスタ素子等の
回路部品、22は加熱溶着により導電層12の電極部と導電
層18の電極部とを電気的に導通する半田である。次に、
製法について簡単に説明する。Next, as shown in the diagram (D), the conductive layer 12 is etched to remove unnecessary portions, and the electrode portion 12a, the wiring portion 12b, and the wiring portion
A through hole electrode portion 12c is formed which is electrically connected to 12b. Next, as shown in FIG. 6E, an insulating layer 14 for protecting the conductive layer 12 and the resistance layer 139 except the electrode portion 12 is formed by printing and drying. Finally, as shown in FIG. 6F, a circuit component such as a chip-shaped capacitor or a transistor element is conductively fixed to the electrode portion 12a by heat welding the solder 21, and the circuit board is completed. FIG. 3 is a second circuit board according to the present invention.
It is an important section sectional view showing an example. In the figure, the same parts as those in FIG. 1 are designated by the same reference numerals, and the description thereof will be omitted. In Fig. 3,
11 is an insulating substrate, 12 is a conductive layer, 13 is a resistance layer that forms a resistance element, 16 is an adhesive, and 17 is a polyimide-based adhesive having excellent heat resistance and electrical insulation that is fixed to the insulating substrate 11 via the adhesive 16. Insulating film made of synthetic resin, 18 is insulating film 17
A second conductive layer that is fixed to and forms a wiring portion 18b and an electrode portion 18a with a conductive material such as copper or aluminum, 14 is an insulating layer that protects the upper surface of the conductive layer 18 except the electrode portion 18a, and 15 is a solder. 2
A circuit component such as a chip-shaped capacitor or a transistor element that is conductively fixed to the electrode portion 18a of the conductive layer 18 by heat welding of 1, and 22 electrically connects the electrode portion of the conductive layer 12 and the electrode portion of the conductive layer 18 by heat welding. It is a solder that conducts to. next,
The manufacturing method will be briefly described.
絶縁基板11に抵抗層13及び導電層12を形成するのは第1
実施例の場合と同様である。次に、接着剤16を塗布さた
導電層18を固着した絶縁フィルム16は絶縁基板11に貼着
する。次に、絶縁層14を印刷後乾燥して形成する。最後
に、半田22を熱溶着して、導電層12と18とを導通させ回
路部15を半田付して回路基板を完成する。本実施例の場
合は、多層の回路基板の実施例を示したものである。It is the first to form the resistance layer 13 and the conductive layer 12 on the insulating substrate 11.
This is similar to the case of the embodiment. Next, the insulating film 16 to which the conductive layer 18 coated with the adhesive 16 is fixed is attached to the insulating substrate 11. Next, the insulating layer 14 is formed by printing and then drying. Finally, the solder 22 is heat-welded to electrically connect the conductive layers 12 and 18, and the circuit portion 15 is soldered to complete the circuit board. In the case of this embodiment, an embodiment of a multilayer circuit board is shown.
第4図は本発明に係る回路基板の第3実施例を示す要部
断面図である。図中、第1図と同一部分は同一符合を付
し、その生命を省略する。第4図中、絶縁基板11のスル
ーホール11a、11bの内壁にそれぞれ配線部12b、12gと連
続するスルーホール電極部12c、12dが形成され、そのス
ルーホール電極部12c、12dはそれぞれ絶縁基板11の下面
の電極部12e、12fと連続して形成される。30はコイル等
のリード端子を有する回路部品で、そのリード端子の先
端部を電極部12e、12fに半田31によって加熱溶着され
る。FIG. 4 is a cross-sectional view of essential parts showing a third embodiment of the circuit board according to the present invention. In the figure, those parts which are the same as those corresponding parts in FIG. 1 are designated by the same reference numerals, and a life thereof will be omitted. In FIG. 4, through hole electrode portions 12c and 12d continuous with the wiring portions 12b and 12g are formed on the inner walls of the through holes 11a and 11b of the insulating substrate 11, and the through hole electrode portions 12c and 12d are formed on the insulating substrate 11 respectively. Is formed continuously with the electrode portions 12e and 12f on the lower surface of the. Reference numeral 30 is a circuit component having a lead terminal such as a coil, and the tip portion of the lead terminal is heat-welded to the electrode portions 12e and 12f by the solder 31.
次に、製法について簡単に説明する。絶縁基板11の上面
に抵抗層13,導電層12,絶縁層14,更にチップ状の回路素
子を導電層12の電極部12aに固着する過程は抵抗層13を
絶縁基板の上面にのみに形成すること除き第1実施例の
場合と同様である。次に、リード端子を有する回路部品
30をスルーホール11a、11bに挿通し、そのリード端子の
先端部を電極部12e、12fに半田引によって加熱溶着して
回路基板を完成する。Next, the manufacturing method will be briefly described. The process of fixing the resistive layer 13, the conductive layer 12, the insulating layer 14, and the chip-shaped circuit element to the electrode portion 12a of the conductive layer 12 on the upper surface of the insulating substrate 11 forms the resistive layer 13 only on the upper surface of the insulating substrate. Except for this, it is similar to the case of the first embodiment. Next, a circuit component having lead terminals
The circuit board is completed by inserting 30 into the through holes 11a and 11b, and heat-welding the tip portions of the lead terminals to the electrode portions 12e and 12f by soldering.
本実施例は絶縁基板11の上面のみに回路部品を配設する
場合に効果的である。This embodiment is effective when the circuit components are arranged only on the upper surface of the insulating substrate 11.
第5図は本発明に係る回路基板の第4実施例を示す要部
断面図である。図中、第4図と同一部分は同一符合を付
し、その説明を省略する。第5図中、32はコイル等のリ
ード端子を有する回路部品で、そのリード端子の先端部
が導電層12の配線部12b、12gに半田33によって加熱溶着
される。次に製法について簡単説明する。絶縁基板11の
上面に抵抗層13、導電層12、絶縁層14を、更にチップ状
の回路素子15を導電層12の電極部12aに過程は第3実施
例の場合と同様である。次に、回路部品32のリード端子
を絶縁基板11の下面からスルーホール11a,11bに接通
し、そのリード端子の先端部を半田ディップし、半田21
とともに半田33が形成される。以上で、本実施例の回路
基板を完成する。FIG. 5 is a cross-sectional view of essential parts showing a fourth embodiment of the circuit board according to the present invention. In the figure, those parts which are the same as those corresponding parts in FIG. 4 are designated by the same reference numerals, and a description thereof will be omitted. In FIG. 5, reference numeral 32 denotes a circuit component having a lead terminal such as a coil, and the tip portion of the lead terminal is heat-welded to the wiring portions 12b and 12g of the conductive layer 12 by the solder 33. Next, the manufacturing method will be briefly described. The process of the resistive layer 13, the conductive layer 12, the insulating layer 14 and the chip-shaped circuit element 15 on the upper surface of the insulating substrate 11 and the electrode portion 12a of the conductive layer 12 is the same as in the third embodiment. Next, the lead terminals of the circuit component 32 are passed from the lower surface of the insulating substrate 11 to the through holes 11a and 11b, and the tip portions of the lead terminals are solder-dipped and the solder 21
At the same time, solder 33 is formed. With the above, the circuit board of this embodiment is completed.
本実施例は絶縁基板11に取付けられるチップ状の回路部
品15及びリード端子を有する回路部32がディップにより
同時に導電層12の配線部12(12a、12b、12g)に半田付
されるので作業性の面で効果的である。In this embodiment, since the chip-shaped circuit component 15 mounted on the insulating substrate 11 and the circuit portion 32 having the lead terminal are simultaneously soldered to the wiring portion 12 (12a, 12b, 12g) of the conductive layer 12 by dipping, workability is improved. Is effective in terms of.
なお、上記説明中、絶縁基板板11上に形成される導電層
の材料は銅で説明したが、必ずしも銅に限定されること
なく他の導電材でよく、又導電材の形成法としてメッキ
について述べたが、スパッタリング蒸着の手段を用いて
もよく、銅等を混入した導電ペーストを印刷、乾燥して
形成してもよい。又、スルーホール11a、11bは、通常絶
縁基板11に複数設けられているが、他のスルーホールの
場合も同様である。In the above description, the material of the conductive layer formed on the insulating substrate plate 11 is described as copper, but the conductive material is not necessarily limited to copper and may be another conductive material. As described above, a means of sputtering vapor deposition may be used, or a conductive paste mixed with copper or the like may be printed and dried to form the conductive paste. In addition, a plurality of through holes 11a and 11b are usually provided in the insulating substrate 11, but the same applies to other through holes.
発明の効果 上述の如く、従来導電層を形成するのに印刷焼成手段を
用いたが、本発明になる回転基板は、メッキにより形成
できるので焼成なしの低温度で処理し得、又スルーホー
ル電極形成を導電層形成と同時工程で行えるので部品点
数及び作業工程数を減少し得、又高密度実装に適する等
の利点を生じる。EFFECTS OF THE INVENTION As described above, the printing and baking means has been used to form the conductive layer in the related art. However, since the rotating substrate according to the present invention can be formed by plating, it can be processed at a low temperature without baking, and the through-hole electrode can be used. Since the formation can be performed simultaneously with the formation of the conductive layer, the number of parts and the number of working steps can be reduced, and advantages such as suitability for high-density mounting are produced.
第1図、第2図は本発明に係る回路基板の第1実施例を
示す夫々、要部断面図、製造工程図、第3図は本発明に
係る回路基板の第2実施例を示す要部断面図、第4図は
本発明に係る回路基板の第3実施例を示す要部断面図、
第5図は本発明に係る回路基板の第4実施例を示す要部
断面図、第6図は従来の回路基板の要部断面図である。 1,11……絶縁基板,1a,11a,11b……スルーホール,2,12…
…導電層,3,13……抵抗層,4,14……絶縁層,5,15,30,32
……回路部品,6……ピン,16……接着剤,17……絶縁フィ
ルム,2a,12a,12e,12f……電極部,12c,12d……スルーホ
ール電極部、12b,12g……配線部1 and 2 show a first embodiment of a circuit board according to the present invention, respectively, and a sectional view of a main part, a manufacturing process drawing, and FIG. 3 show a second embodiment of the circuit board according to the present invention. 4 is a partial sectional view, FIG. 4 is a partial sectional view showing a third embodiment of the circuit board according to the present invention,
FIG. 5 is a cross-sectional view of an essential part showing a fourth embodiment of the circuit board according to the present invention, and FIG. 6 is a cross-sectional view of the essential part of a conventional circuit board. 1,11 …… Insulation board, 1a, 11a, 11b …… Through hole, 2,12…
… Conductive layer, 3,13 …… Resistive layer, 4, 14 …… Insulating layer, 5, 15, 30, 32
...... Circuit parts, 6 ...... pins, 16 …… adhesive, 17 …… insulating film, 2a, 12a, 12e, 12f …… electrode part, 12c, 12d …… through hole electrode part, 12b, 12g …… wiring Department
Claims (1)
層を形成し、 無電解メッキあるいはスパッタにて第1の導電層を形成
し、 電気メッキにて該第1の導電層上に第2の導電層を形成
し、 該第1及び第2の導電層を選択除去して配線部を形成
し、 該導電層の配線部及び該抵抗層を保護する絶縁層を印刷
して電極部を形成し、 該電極部上に該電極部と接続する回路部品を取り付けた
ことを特徴とする回路基板。1. A resistance material is printed on an insulating substrate and fired to form a resistance layer, a first conductive layer is formed by electroless plating or sputtering, and electroplating is performed on the first conductive layer. A second conductive layer is formed on the conductive layer, the first and second conductive layers are selectively removed to form a wiring portion, and an insulating layer for protecting the wiring portion of the conductive layer and the resistance layer is printed to form an electrode. A circuit board, wherein a portion is formed, and a circuit component connected to the electrode portion is attached on the electrode portion.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61171376A JPH0770799B2 (en) | 1986-07-21 | 1986-07-21 | Circuit board |
| KR8707918A KR910001786B1 (en) | 1986-07-21 | 1987-07-21 | Circuit board |
| US07/285,373 US5119272A (en) | 1986-07-21 | 1988-12-16 | Circuit board and method of producing circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61171376A JPH0770799B2 (en) | 1986-07-21 | 1986-07-21 | Circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6328094A JPS6328094A (en) | 1988-02-05 |
| JPH0770799B2 true JPH0770799B2 (en) | 1995-07-31 |
Family
ID=15922030
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61171376A Expired - Lifetime JPH0770799B2 (en) | 1986-07-21 | 1986-07-21 | Circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0770799B2 (en) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5548714A (en) * | 1978-10-03 | 1980-04-08 | Dainichi Nippon Cables Ltd | Connecting method of optical fiber |
| JPS5741114A (en) * | 1980-08-19 | 1982-03-08 | Hanazono Kogu Kk | Automatic cutter |
| JPS61185995A (en) * | 1985-02-13 | 1986-08-19 | 三菱電機株式会社 | Making of circuit board with resistor |
-
1986
- 1986-07-21 JP JP61171376A patent/JPH0770799B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6328094A (en) | 1988-02-05 |
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