JPH0771056B2 - Time division multiplexing demodulator - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention receives a digitally modulated wave by time division multiplexing in a mobile communication path where deterioration of the transmission path due to multipath fading is dominant. The present invention relates to a time division multiplexing demodulator for demodulation.

2. Description of the Related Art In recent years, in mobile communication performed between a mobile body such as a car and a fixedly installed base station, the conventional scpc analog FM modulation method has been aimed at diversifying information and improving service reliability. Since then, it is changing to a digital modulation method using time division multiplexing (hereinafter, abbreviated as TDMA).

In mobile communication, reflected radio waves from buildings, mountains, etc. propagate after being delayed with respect to direct waves, and are multiplex-received at a receiving point, resulting in deterioration due to multipath fading. When the amount of delay becomes more than half of the symbol rate of the data of the digitally modulated wave received, it is not possible to improve the deterioration due to the propagation path only by the receiving space diversity performed by disposing the receiving antenna spatially at another place. It will be difficult. For this reason, it is essential to use an automatic equalizer having a time diversity effect.

However, since the automatic equalizer basically estimates and equalizes the degraded impulse response of the propagation path based on the received information for each symbol rate of the digital modulated wave, the symbol rate of the received modulated wave is basically equalized. At medium speed, i.e. 20K-5
When it is about 0 Kbaud (when using QPSK modulation, the bit rate is 40 K to 100 Kbps.), And when the fading pitch of multi-path fading is as high as 40 Hz to 100 Hz (when the radio frequency is about 900 MHz, it moves. Body 40km / h ~ 10
This is equivalent to moving at a speed of 0 km / h. ), The fading pitch standardized by the symbol rate is 1 /
Since it is larger than 500, it is difficult to improve the bit error rate after equalization even if an equalizer using an equalization algorithm having a fast convergence characteristic is used.

An example of using the RLS algorithm as a high-speed equalization algorithm is described in Serizawa et al., "Evaluation of equalization characteristics of fast-moving multipath transmission line", B-310, 1990 National Conference of IEICE. There is.

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention As described above, when the symbol rate of the received modulated wave is medium speed and the fading pitch of the multi-path fading is high, the automatic equalizer has a Since the fading pitch standardized by the rate becomes large, it is difficult to improve the bit error rate after equalization even if an equalizer using an equalization algorithm with a fast convergence characteristic is used. There are challenges.

In view of the above-mentioned problems, the present invention provides fading pitch in comparison with symbol rate under multi-path fading.
The object is to improve the demodulation characteristics for a propagation path that changes at a high speed of 1/500 or more.

Means for Solving the Problems In order to achieve this object, a first invention is a demodulator for a time division multiplex digital modulation wave, which comprises a quadrature detector and a base band equalizer. Phase fluctuation estimation means for estimating the phase fluctuation of the desired time division frame by the received data in the training sequence set for the initial estimation of the base band equalizer provided in Is subjected to quadrature detection by a quadrature detector, and is then corrected by the phase fluctuation estimated value obtained by the phase fluctuation estimating means to be input to the baseband equalizer.

The second invention is to detect the level in front of the quadrature detector,
It is arranged to provide means for gain adjusting the desired time division frame according to the average reception level value over several symbols.

Effect of the Invention With the above-described structure, the amplitude of the desired time division frame input to the automatic equalizer can be favorably equalized by the level information detected by the level detector under the multipath fading. While adjusting the level up to
If the phase fluctuation in a short period that makes equalization difficult due to multi-path fading is large, correct the phase fluctuation only for the desired reception time division frame with the large phase fluctuation due to the estimated phase fluctuation. , The phase fluctuation is reduced within the followable range of the equalizer, and the demodulation characteristic is improved.

Embodiment An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a time division multiplexing demodulator according to the present invention.

In FIG. 1, 1 is a demodulator input terminal, 2 is a reception TD
MA frame synchronization gate signal input terminal, 3 is a symbol clock input terminal, and 4 is a received data output terminal. 5 is a level detection circuit, 6 is an AGC level setting circuit, 7 is an AGC circuit, 8 is a quadrature detector, 11 is a phase fluctuation estimation circuit, 12 is a phase fluctuation correction circuit, 13 is a base band complex equalizer, and 14 is It is a data determiner.

The operation of the above arrangement will be described below with reference to FIG.

2 (a) to (c) are diagrams for explaining the received TDMA frame, and FIG. 2 (a) shows, for example, 3ch TDMA as an example. 21, 22, 23, 24 are time-division data sequences assigned to each user, and 21, 24 are 3ch TDM
In the case of A, it is assigned to the same user and is shown as ch1. Each time-shared data sequence assigned to each user has a second
As shown in FIG. 2B, for example, it comprises a training unit 25 for initial estimation of the automatic equalizer shown in the front part and a user data unit 26.

The data length of the training unit 25 is determined by the equalization algorithm used for the automatic equalizer, but it is not preferable if it is too long. 20 to 40 bits (10 for QPSK modulation system)
~ 20 symbols) is used. In the training section 25, as shown in FIG. 2 (c), phase estimation symbols 27 and 28 are inserted. The symbol 28 is the same data sequence as the symbol 27, and since the symbols 27 and 28 have the same phase fluctuation due to the multiplex reception of the delayed wave due to the multi-path, at least three symbols including the data of one symbol before and after the symbol 27 are used. It is a data series.

2 (d) to (e) are reception TDMA frame synchronization gate signals synchronized with the received time division frame.

In FIG. 1, the TDMA reception digital modulated wave deteriorated by multi-bus fading is frequency-converted and band-pass filtered, and then demodulator input terminal 1
Entered in. The frame structure of the TDMA received digital modulated wave is as shown in FIGS. 2 (a) to 2 (c).

After inputting to the demodulator, the level detection circuit 5 sets the level of the desired time division frame to a level value that is easy to equalize.
AGC level setting circuit 6 to which the level is detected by and the received TDMA frame synchronization gate signal shown in FIG. 2 (e) is input.
And the level setting value of the desired time division frame is determined by the average value of the levels of several symbols in the latter half of the previous time division frame. AGC set by AGC level setting circuit 6
The set value is input to the AGC circuit 7 to adjust the gain of the entire desired time division frame. That is, the set gain of the AGC is constant within the desired time division frame. The reason why the gain is constant in the received frame is that it is not preferable to change the set gain of the AGC in the frame because of the equalization characteristic.

The TDMA received digital modulated wave whose gain has been adjusted by the AGC circuit 7 is input to the asynchronous quadrature detector 8 and, after quadrature detection, is low-passed by the internal low-pass filter.
-Converted into digital information by D converters 9 and 10. The symbol clock reproduced inside the receiver is input to the simplification and clock of 9 and 10 of the AD converter. The A / D converted symbol information is input to the phase fluctuation estimation circuit 11.

The phase fluctuation estimation circuit 11 includes a reception TDMA shown in FIG.
The synchronization signal is input, and the phase fluctuation in the training unit 25 is estimated by the phase estimation symbol sequences 27 and 28 shown in FIG. The phase fluctuation estimation is performed by estimating the difference between the phase in the phase estimation symbol sequence 27 and the phase in the phase estimation symbol sequence 28 corresponding to the same symbol.

When the short-term phase fluctuation in the training sequence due to multi-path fading is large, for example, when it is considered that the equalizer cannot follow the signal twice or more per symbol, the phase fluctuation Based on the phase fluctuation value estimated by the estimation circuit 11, the phase fluctuation correction circuit 12 corrects the phase fluctuation of the entire time division frame.

Gain is set to an appropriate level by AGC, after quadrature detection,
When the phase fluctuation is large, the symbol information of the time division frame whose phase fluctuation has been corrected only for that frame is input to the baseband complex equalizer 13 and, after good equalization is performed, then to the data determiner 14. It is input and becomes received data output.

In this way, in order to provide a demodulator with good demodulation characteristics for a multipath fading channel that fluctuates faster than the symbol rate, automatic equalization included in the TDMA / burst modulated wave is provided. In the training used for the initial estimation of the signal generator, the phase fluctuation estimation symbol for estimating the phase fluctuation due to fading is provided in the sequence, and the estimated phase fluctuation obtained by the phase fluctuation estimation symbol at the receiving side is If the convergence characteristics are exceeded, the relatively high-speed frequency fluctuation due to fading within a short time is corrected by means of frequency correction only for that burst based on the estimated movement fluctuation, and the reception TDMA The amplitude information of the current received burst is corrected by the average information of the amplitude information at the rear of the previous burst, and the symbol information corrected by these is automatically corrected. By entering the equalizer, so that to improve the characteristics after equalization.

In the present embodiment, the case where the level detection for AGC level setting is performed before the AGC is described, but the same is true if the level detection is performed after the AGC. Also, the case where the AGC level setting information is set to the level of the rear part of the frame before the desired time division frame is shown, but when there is no previous frame,
You may use the level information of the foremost part of a desired frame.

Further, in the present embodiment, an example in which the estimation of the phase fluctuation is estimated by the difference between the reception phases of the two phase estimation symbols arranged in the training sequence has been described, but there are only several types of training sequence sequences. In this case, the phase fluctuation can be estimated also by taking the correlation with this.

EFFECTS OF THE INVENTION As described above, the present invention is a demodulator for a time division multiplex digital modulated wave composed of a quadrature detector and a base band equalizer, and a base band equalizer provided in a time division frame. By the received data in the training sequence set for the initial estimation of, the phase fluctuation correction means for estimating the phase fluctuation of the desired time division frame, and the quadrature detector of the phase fluctuation of the desired time division frame after quadrature detection, Since the phase fluctuation correction means for correcting the phase fluctuation estimated value obtained by the phase fluctuation estimating means and inputting it to the baseband equalizer is provided, the fading pitch fluctuates at high speed under multi-path fading. It is possible to improve the demodulation characteristics for the propagation path that is used.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a time division multiplexing demodulator according to the present invention, and FIG. 2 is a waveform diagram of a received TDMA frame for explaining the operation of an embodiment of a time division multiplexing demodulator according to the present invention. Is. 1 ... Demodulation input terminal, 2 ... Reception TDMA frame synchronization gate signal input terminal, 3 ... Symbol / clock input terminal,
4 ... Received data output terminal, 5 ... Level detection circuit, 6
…… AGC level setting circuit, 7 …… AGC circuit, 8 …… Quadrature detector, 11 …… Phase fluctuation estimation circuit, 12 …… Phase fluctuation correction circuit, 13 …… Base-band complex equalizer, 14 …… Data determiner.

Claims (2)

[Claims] 1. A phase fluctuation estimating means for estimating a phase fluctuation of a desired time division frame based on received data in a training sequence set for initial estimation of a base band equalizer provided in the time division frame. A phase fluctuation correcting means for correcting the phase fluctuation of the desired time division frame by the quadrature detector and then correcting the phase fluctuation estimated value obtained by the phase fluctuation estimating means and inputting to the baseband equalizer. A demodulator for time division multiplexing, comprising: 2. A demodulator for time division multiplexing according to claim 1, further comprising means for detecting the level before the quadrature detector and adjusting the gain of the desired time division frame according to the average reception level value over several symbols. vessel.