JPH0771143B2 - Failure notification method in digital exchange - Google Patents

Description

DETAILED DESCRIPTION [Overview] A DSM (Digital Switching Module) and a terminal are provided.
A failure notification method in a digital switch that promptly notifies the DSMB of a failure in data transmission from the terminal to the terminal side. A bit insertion circuit that inserts information that should be a specific bit pattern of the occurrence is provided, and a failure detection circuit that detects information on the occurrence of data transmission failure inserted by the bit insertion circuit is provided on the DSM side. This is to promptly notify the DSM side of the occurrence of the data transmission failure of the transmission unit that has occurred.

[Industrial application field]

The present invention relates to a failure notification system in a digital exchange, particularly when a data transmission failure from the DSM to the terminal side occurs, the DS
The present invention relates to a fault notification system in a digital exchange that promptly notifies M of the occurrence of the fault.

[Conventional technology]

In the conventional digital exchange shown in FIG. 2, data transmission / reception between the DSM1 and the terminal 2 is performed by superimposing a clock component for synchronization or a control signal sentence on the data, such as a CMI code. Is being done in. More specifically, the digital exchanges of the stations A and B shown in FIG. 4 are connected to the # 0 interface section 3-0 corresponding to # 0DSM1-0 and the # 1DSM1-1 as shown in FIG. DSM1 and terminal 2 like the corresponding # 1 interface section 3-1
Has a double structure, and between the # 0DSM1-0 and the # 0 interface section 3-0, and between the # 1DSM1-1 and the # 1 interface section 3-1 the CMI code described above. Etc., data is being transmitted and received. And these # 0
Interface unit 3-0 and # interface unit 3-1
Each has a clock source inside, and is configured to generate a synchronized clock control signal from the clock source in synchronization with a clock component such as a transmitted CMI code. The DSM 1 and the terminal 2 shown in FIG. 2 form a part of the digital exchange existing in the A station or B station shown in FIG. Then, as shown in FIG.
Assuming that the combination of the DSM1 and the terminal 2 is the A station side shown in FIG. 4, the combination of the DSM1 and the terminal 2 shown in FIG. 2 is the B station via the line 5 shown in FIG. It is connected to the terminal 2 on the side. And, needless to say, the terminal 2 has a DS in the B station.
As shown in FIG. 2, M1 and one combined body constitute a part of the digital exchange in the B station. Therefore,
The terminal 2 referred to in the present application corresponds to an interface-compatible device for a line 5 such as a public line network.

[Problems to be solved by the invention]

In the conventional digital exchange, for example, when data is transmitted from the terminal 2 in the station A to the DSM1 side and a failure occurs on the transmission side of the terminal 2, the DSM1 side can promptly detect the failure occurrence. When data is transmitted from DSM1 to the terminal 2 side, when a failure occurs on the DSM1 transmission side, the terminal 2 side has a clock source, so that the opposite station B station apparently transmits data. It looks as if this DS
It took time to detect the failure of M1. As a result, the call was erroneously disconnected, an alarm was generated on the opposite station on the line, the failure notification to the DSM1 was delayed, and the duplication function that switched the system to operate stably did not work well.

Therefore, when a failure occurs on the transmission side of the DSM1, there is a need for a failure notification method in a digital exchange that can immediately notify the DSM1 of the failure and effectively operate the duplication function.

The present invention aims to promptly notify the occurrence of the above-mentioned failure.

[Means for solving problems]

FIG. 1 shows a principle configuration diagram of a failure notification system in a digital exchange according to the present invention. Reference numeral 6 is a code converter, 7
Is a fault detection circuit, 8 is a code converter, 9 is a fault detection circuit, 10
Is a bit insertion circuit, 11 is a selector, and symbols 1 and 2 are second
It corresponds to the one shown in FIGS.

The code converters 6, 8 are converters for converting the NRZ code into a code in which a clock component, a control signal component, etc. are superimposed on the data to be transmitted, for example, a CMI code.
Thus, data transmission is performed between the DSM 1 and the terminal 2 with the CMI code.

The fault detection circuit 7 detects the data sent from the terminal 2,
A predetermined position is constantly monitored, and when information on the occurrence of a data transmission failure is sent to this predetermined position, this is detected and the system is switched.

The fault detection circuit 9 monitors whether data that violates the CMI code rule is sent from the DSM1, and when data that violates the CMI code rule is sent, the bit described below immediately A signal indicating that a failure has occurred is output to the insertion circuit 10 and a switching signal of the selector 11 is output to prevent erroneous data from being transferred to the processing unit 4.

The bit insertion circuit 10 receives the failure detection signal from the failure detection circuit 9, and receives the data transmission failure bit at a predetermined predetermined position in the control portion of the transmission format of the data sent from the terminal 2 to the DSM1. -A circuit that generates pattern information. In the data transmission format shown in FIG. 5, for example, the time slot 1 (TS
The first bit B of 1) is always logic "0" or "1"
This is done by forcibly inserting the data of 1 from the bit inserting circuit 10. If the data transmission is normal, "0" is written in the first bit B of the time slot 1,
Bits where alternating data of "1" is set up and "0" or "1" is continuously held when the above data transmission failure occurs.
It is distinguished from the pattern information. Also, the bit insertion circuit
10 indicates the beginning of data, so time slot 0
A fixed pattern is always set in the first bit A of the.

[Action]

When transmitting data from DSM1 to terminal 2 side, ie
When a failure occurs in DSM1, the code converter 8 causes NRZ
The code data is output, but the NRZ code data is CMI.
Since the normality of the code is lost, the failure detection circuit 9 on the terminal 2 side detects that a data transmission failure has occurred. The fault detection circuit 9 outputs a selector switching signal to the selector 11 and also outputs a fault occurrence detection signal to the bit insertion circuit 10. The bit insertion circuit 10 inserts into the transmission data of DSM1 sent from the processing unit 4 information of a bit pattern indicating that a failure has occurred in data transmission from the DSM1 to the terminal 2 side. That is, at a predetermined position of the data code-converted from the NRZ code to the CMI code by the code converter 8, that is, at the first bit B in the time slot 1 shown in FIG. Set by the bit insertion circuit 10. The transmission data from the terminal 2 side including the bit pattern information indicating that a failure has occurred in this data transmission is DSM1
The code converter 6 performs code conversion from the CMI code to the NRZ code. The failure detection circuit 7 always sets a fixed pattern of information to notify the beginning of the data in a specific position of the transmission data sent from the terminal 2 side, that is, in the data transmission format shown in FIG. From the first A bit of slot 0, the first B bit of time slot 1 which is always in a predetermined position is monitored. When the alternation of "0" and "1" in the information of the bit pattern set in the B bit is broken and the above "0" is held, the fault detection circuit 7 transmits data to the transmission side of DSM1. Detect that there is a failure. As a result, the DSM1 immediately switches the system to another system that has been duplicated, and the system switching within the exchange is executed without erroneously disconnecting the call or generating an alarm on the line to the opposite station.

〔Example〕

 An embodiment of the present invention will be described below with reference to the drawings.

FIG. 6 shows the configuration of an embodiment of the failure notification system in the digital exchange of the present invention, and FIG. 7 shows the signal component of the CMI code.

In FIG. 6, reference numeral 12 is a freeze circuit, 13 is a timing generation circuit, 14 is a memory, and reference numerals 1 and 2 are shown in FIGS.
Corresponding to those in the figure, reference numerals 6 to 11 correspond to those in FIG.

The freeze circuit 12 keeps the DSM1 during normal data transmission.
Receives the FCK signal component representing the beginning of the CMI code data sent from the terminal 2 to the terminal 2 side, sends a reset signal to the timing generation circuit 13 and causes the timing generation circuit 13 to generate a control signal synchronized with the clock of DSM1. ing. When the freeze circuit 12 receives a detection signal of occurrence of a data transmission failure from the failure detection circuit 9, the freeze circuit 12 sends a reset signal to the timing generation circuit 13 at the timing of the immediately preceding normal data transmission. It is like this.

The timing generation circuit 13 is a freeze circuit as described above.
A reset signal from 12 is received and a control signal is generated at a timing based on the reset signal.

The memory 14 writes connection information, that is, signaling data and the like, and when a data transmission failure from the DSM 1 to the terminal 2 side occurs, that is, when the failure detection circuit 9 detects a data transmission failure occurrence, the data transmission is performed. The connection information before the failure occurs is read from the memory 14 and the selector
It is a memory that makes it possible to transmit connection information before occurrence of a data transmission failure to the opposite station via 11.

Data transmission / reception between the DSM1 and the terminal 2 is performed by the CMI code, and the code converters 6 and 8 of the DSM1 and the terminal 2 perform the CMI code and its inverse conversion from the NRZ code. Selector 11 when data transmission from DSM1 to terminal 2 is normal
Selects the data converted into the NRZ code by the code converter 8. The freeze circuit 12 extracts the FCK signal component shown in FIG. 7 superimposed on the CMI code, and sends it to the timing generation circuit 13 as a reset signal. As a result, a control signal synchronized with the clock on the DSM1 side is generated from the timing generation circuit 13, the control signal is sent to the terminal 2 and each circuit, and each circuit is synchronized. The memory 14 also writes connection information, that is, signaling data of the opposite station.

When a failure occurs in the transmission section from DSM1 to terminal 2, that is, when a data transmission failure occurs such as the transmission from DSM1 being cut off, the normality of data transmission from DSM1 to terminal 2 is detected and the CMI code is detected. The fault detection circuit 9 of the terminal 2, which determines whether the rule is normal, detects the violation of the CMI code rule and outputs the detection signal of the data transmission fault occurrence. When the failure detection circuit 9 outputs a detection signal indicating the occurrence of a data transmission failure, the selector 11 selects the data on the memory 14 side, and the memory 14 stops the write operation. In addition, the freeze circuit 12 uses the timing generation circuit 13 at the timing of the normal operation immediately before the occurrence of the data transmission failure.
A reset signal is output to the timing generating circuit 13 and a control signal having the same timing as in the normal operation is generated. Then, the bit insertion circuit 10 uses the time in the data transmission format shown in FIG. Information indicating the beginning of the data, for example, "1" is set in the first bit A of slot 0, and the time slot 1
A bit pattern of information "0" indicating the occurrence of a data transmission failure is continuously set in the first bit B of the. In addition, DSM
When the data transmission from 1 to the terminal 2 is normally transmitted, the first bit B of the time slot 1 is transmitted.
Is usually an alternation of logic "0" and "1", and its bit pattern can be set.

Therefore, when data transmission from the terminal 2 to the DSM1 side is performed,
Data is sent to the DSM1 via the bit insertion circuit 10 on the terminal 2 side in the data transmission format shown in FIG. DS
In M1, the fault detection circuit 7 detects the data converted from the CMI code to the NRZ code by the code converter 6 and the head, that is, the first bit A of the time slot 0 shown in FIG. From this, the bit pattern of the first bit B of the time slot 1 which is a predetermined position is monitored, whereby the occurrence of a data transmission failure from the DSM1 to the terminal 2 can be immediately detected. When the fault detection circuit 7 detects the occurrence of a data transmission fault, system switching from the # 0DSM1-0 system to the # IDSM1-1 system shown in FIG. 3 is immediately executed. At this time, connection information before switching the system, that is, signaling data is read from the memory 14 of FIG. 6 and is sent to the opposite station via the selector 11. Therefore, even if the above system is switched, the data is normally sent to the opposite station without erroneously disconnecting the call or generating an alarm to the opposite station. Even if the system is switched, it switches instantaneously, so it has no effect on the human ear.

In the case of a data transmission failure from the terminal 2 to the DSM1 side, data will not be sent from the terminal 2, so the DSM
It goes without saying that the fault detection circuit 7 on the first side detects this and the system is switched.

〔The invention's effect〕

As described above, according to the present invention, when a failure occurs on the transmitting side from the DSM to the terminal, the failure occurrence information can be promptly and surely detected, and the call is erroneously disconnected and the opposite station is notified. It is possible to eliminate the alarm occurrence on the line. Therefore, the function of the exchange is improved.

[Brief description of drawings]

FIG. 1 is a block diagram of the principle of a failure notification system in a digital exchange according to the present invention, and FIG. 2 is a block diagram of a digital exchange.
FIG. 3 is a block diagram of an embodiment of a digital exchange, FIG. 4 is an explanatory view of an opposite station, FIG. 5 is an explanatory view of a data transmission format, and FIG. 6 is an embodiment of a failure landing system in the digital exchange of the present invention. Structure, FIG. 7 shows an explanatory view of signal components of a CMI code. In the figure, 1 is DSM, 1-0 is # 0DSM, 1-1 is # 1DSM, 2 is terminal, 3
-0 is a # 0 interface unit, 3-1 is a # interface unit, 4 is a processing unit, 5 is a line, 6 is a code converter, 7 is a failure detection circuit, 8 is a code converter, 9 is a failure detection circuit, and 10 Is a bit insertion circuit, 11 is a selector, 12 is a freeze circuit, 13 is a timing generation circuit, and 14 is a memory.

Claims (1)

[Claims] 1. A DSM (1) and a terminal (2) constitute an exchange, and a plurality of exchanges are connected between the respective terminals (2) via a line (5). The first code converter (6) is provided in the DSM (1) in the exchange and the second code converter (8) is provided in the terminal (2), and the first code converter in the DSM (1) is provided. Bowl (6)
In the digital exchange having a structure in which data is transmitted and received between the DSM (1) and the second code converter (8) in the terminal (2), the terminal (2) includes the DSM (1) to the terminal (2). The second fault detection circuit (9) for detecting a fault in the data transmission based on the result of conversion by the second code converter (8) for the data transmitted to the side, and the terminal from the DSM (1). The data transmission failure to the (2) side
When the fault detection circuit (9) of is detected, the terminal (2)
To the DSM (1) side via the second code converter (8), the information bit of the occurrence of the data transmission failure is set to notify that the data transmission failure has occurred, and A bit insertion circuit (10) for inserting the information on occurrence of the fault in transmission data and notifying the second code converter (8) and the second fault detection circuit (9) detect the data transmission fault. In this case, a selector (11) for switching the transmission data from the DSM (1) to other data and supplying it to the processing unit (4) in the terminal (2) is provided, and the DSM (1) side is A first fault detection circuit for detecting information of the data transmission fault occurrence based on the result of conversion by the first code converter (6) for the data transmitted from the terminal (2) to the DSM (1). (7) is provided, and the terminal (2) side from DSM (1) Fault notification method of generation of a data transmission failure in the digital switching system, characterized in that the sought the DSM (1) is notified.