JPH077274B2 - Speech edit synthesizer - Google Patents

Description

The present invention relates to a voice editing / synthesizing apparatus, and more particularly to a voice editing / synthesizing apparatus for combining various types of clauses and words into a voice to synthesize a voice.

[Conventional technology]

The voice edit / synthesis method is a method in which voice data units such as clauses and words are combined to make a sentence and uttered.

This method uses various combinations of voice data such as a fixed number of clauses and words to create various sentences.
It is possible to reduce the capacity of the memory that stores audio data.

For example, since "5 o'clock" and "morning is" can be commonly used, the voice data units "5 o'clock", "morning" and "is" are stored, and "5" is stored. "5 o'clock" by combining the voice data units of "hour" and "is"
By combining the voice data units of “morning” and “is”, it is possible to say “morning is”.

Therefore, in this case, it is possible to reduce the storage capacity for one of the voice data units of "is".

FIG. 3 is a block diagram showing a conventional voice editing / synthesizing apparatus.

In FIG. 3, the central processing unit 1b is a voice editing / synthesizing device.
For the purpose of sequentially selecting and reading various voice data units stored in voice data units such as clauses and words in the voice data memory 2-1 of 2b and arranging them in time series to form a series of sentences. , And the head address transmission signal S1b, the head address of one audio data unit is transmitted.

In response to this, the pointer register 2b-3 of the voice editing / synthesizing device 2b holds the start address of the voice data unit.
This content is sent to the audio data memory 2-1 as the head address, and then the next address obtained by adding 1 to the content is sent again in the next memory cycle.

As a result, the voice data memory 2-1 successively reads out data from these consecutive addresses, forms voice data units in time series, and sends them to the voice synthesizing circuit 2b-4 of the voice editing / synthesizing device 2b.

The voice synthesizing circuit 2b-4 performs a waveform synthesizing process or a source synthesizing process on the voice data to generate an electric signal representing a synthesized voice, and sends the electric signal to the voice uttering device 3.

When the voice synthesizing circuit 2b-4 detects the end of one voice data unit, it generates the voice data unit end signal S3b, so that the pointer register 2b-3 stops the repeated operation and the central processing unit 1b Then, the operation for reading the next audio data unit is started.

The voice utterance device 3 converts the electric signal from the voice synthesizing circuit 2b-4 into a voice that can be heard by a human through a speaker and outputs the voice.

Next, as an example, a case of uttering "It is 5 o'clock" will be described.

In this case, it is assumed that the voice data units "5 o'clock" and "is" are stored in advance in the voice data memory 2-1.

The central processing unit 1b selects the head address of the area storing the "5 o'clock" audio data unit in the audio data memory 2-1 in order to select the "5 o'clock" audio data unit. Send to 3.

The pointer register 2b-3 sends consecutive addresses from the first address to the voice data memory 2-1. Therefore, the voice data memory 2-1 outputs the voice data unit of "5 o'clock" to the voice synthesizing circuit.
Send to 2b-4.

The voice synthesizing circuit 2b-4 utters an electric signal representing a voice in the unit of voice data at "5 o'clock", and the voice uttering device 3 converts the electric signal into a voice audible to humans and utters it.

When the voice data unit at "5 o'clock" ends, the voice synthesizing circuit 2b-4 outputs the voice data unit end signal S3b, so that the pointer register 2b-3 stops the repeating operation and the central processing unit 1b sends the next signal. Move on to the operation regarding the voice data unit of "is".

The same operation is performed for the voice data unit of "is", and when the voice data unit of "is" ends, the voice synthesis circuit 2b-4 generates the voice data unit end signal S3b, so the pointer register 2b-3 Stops repeating operation,
The central processing unit 1b stops because there is no data to be read next.

As a result, the voice voicing device 4 has uttered "5 o'clock" with a voice that can be heard by humans.

[Problems to be solved by the invention]

However, the above-mentioned conventional voice editing / synthesizing apparatus notifies the central processing unit of the end of the preceding voice data unit "5 o'clock", and then the central processing unit searches for the subsequent voice data unit and outputs the voice data of "is". Since the start address of the unit is sent, an irregular silent time occurs between the preceding voice data unit "5 o'clock" and the following voice data unit "is".

Therefore, if you say "5 o'clock" as one word,
The problem is that it sounds unnatural as a word.

An object of the present invention is to provide a voice editing / synthesizing device capable of producing a natural voice by appropriately setting a silent period between voice data units such as a phrase and a word.

[Means for solving problems]

The voice editing / synthesizing device of the present invention includes (A) a voice data memory in which voice data is stored in advance in units of voice data such as phrases and words, and (B) voice data is read from the voice data memory for editing, A code that directly or indirectly indicates the start address of the voice data unit is input and held, and an address obtained by gradually increasing (or gradually decreasing) the range of the storage area of the voice data unit from the start address indicated by the code is used as the voice A voice editing / synthesizing apparatus having: a pointer register for reading the voice data unit by giving it to a data memory; (C) a voice synthesizing circuit for synthesizing the voice data unit read from the voice data memory into a voice signal. (D) N number of codes relating directly or indirectly to the head address of the audio data unit to be read out successively one after another. When waiting one of the voice data units being held by reading and holding the queue, and terminating one of the voice data units being synthesized, a code indicating directly or indirectly the head address held at the beginning of the queue is moved to the pointer register. The matrix register is provided.

〔Example〕

 Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing a first embodiment of the voice editing / synthesizing apparatus of the present invention.

In FIG. 1, the central processing unit 1 sequentially selects and reads various voice data units stored in the voice data memory 2-1 of the voice editing / synthesizing unit 2 as voice data units such as clauses and words. For the purpose of combining these in time series into a series of sentences, together with the head address transmission signal S1,
Up to N head addresses of audio data units are transmitted.

Receiving these, the queue register 2-2 of the voice editing / synthesizing device 2 holds the head address of each of N voice data units as a queue.

When the speech synthesis operation is started, the speech synthesis start signal S2
Is sent to the voice synthesis circuit 2-4.

In response to this, the voice synthesizing circuit 2-4 generates the voice data unit end signal S3.
The first address of the first voice data unit is the voice editing / synthesizing device 2
To the pointer register 2-3, and holds the head addresses of the remaining N-1 audio data units as a queue.

The pointer register 2-3 holds the head address of the audio data unit received from the queue register 2-2, first sends this content as the head address to the audio data memory 2-1, and then the contents of 1 Then, the operation of sending again the next address to which is added in the next memory cycle is repeated.

As a result, the voice data memory 2-1 successively reads data from these consecutive addresses, forms voice data units in time series, and sends them to the voice synthesizing circuit 2-4 of the voice editing / synthesizing device 2.

The voice synthesizing circuit 2-4 performs a waveform synthesizing process or a source synthesizing process on the voice data to generate an electrical signal representing a synthesized voice, and sends the electrical signal to the voice uttering device 3.

The voice utterance device 3 converts the electric signal from the voice synthesizing circuit 2-4 into a voice that can be heard by a human through a speaker and outputs the voice.

When the voice synthesizing circuit 2-4 detects the end of one voice data unit, it generates the voice data unit end signal S3, so that the pointer register 2-3 stops the repeating operation and the queue register 2- 2 sends the next voice data unit to the pointer register 2-3.

These operations are performed for all the head addresses of up to N audio data units sent from the central processing unit 1.

Next, as an example, a case of uttering "It is 5 o'clock" will be described.

In this case, it is assumed that the voice data units "5 o'clock" and "is" are stored in advance in the voice data memory 2-1.

The central processing unit 1 stores the voice data units of "5 o'clock" and "is" in the voice data memory 2-1 in order to select the voice data units of "5 o'clock" and "is". The head addresses of the two areas are successively sent to the queue register 2-2 together with the respective head address sending signals S1.

If N ≧ 2, the queue register 2-2 receives them and holds the two head addresses as a queue.

When the speech synthesis operation is started, the speech synthesis start signal S2
At this time, since the voice data unit end signal S3 is generated from the voice synthesizing circuit 2-4, the queue register 2-2 stores the first signal "5.
The start address of "hour" is sent to the pointer register 2-3, and the start address of "is" is held.

The pointer register 2-3 sends consecutive addresses from the start address of "5 o'clock" to the audio data memory 2-1, so that the audio data memory 2-1 outputs the audio data unit of "5 o'clock" to the audio synthesis circuit 2-. Send to 4.

The voice synthesizing circuit 2-4 generates an electric signal representing a voice in units of voice data at "5 o'clock", and the voice utterance device 3 converts the electric signal into a voice audible to humans and utters it.

When the voice data unit at "5 o'clock" ends, the voice synthesizing circuit 2-4 detects the end and generates a voice data unit end signal S3, so that the pointer register 2-3 stops its operation. The queue register 2-2 immediately sends the start address of the next "is" to the pointer register 2-3.

The same operation is performed for the voice data unit of "is", and when the voice data unit of "is" ends, the voice synthesis circuit 2-4 generates the voice data unit end signal S3, so that the pointer register 2-3 The operation is stopped, and the queue register 2-2 does not have the next head address, so that the operation is stopped.

As a result of the above, there is no uncertain time from the end of "5 o'clock" to the utterance of "da", and it is possible to set an appropriate constant interval. You can utter “5 o'clock” with no unnatural time in the voice that human beings can hear.

FIG. 2 is a block diagram showing a second embodiment of the voice editing / synthesizing apparatus of the present invention.

In FIG. 2, the central processing unit 1a firstly outputs the voice data memory 2-1 of the voice editing / synthesizing device 2a each time the head address request signal S4 is sent from the queue register 2a-2 of the voice editing / synthesizing device 2a. In order to read various voice data units stored as voice data units such as phrases and words, the head address of the voice data unit is transmitted together with the head address transmission signal S1.

At first, since the matrix register 2a-2 is in an empty state, the head address request signal S4 is generated until the head address of N audio data units is received and becomes full.

Therefore, the central processing unit 1a sends the head address of N audio data units and is held in the queue register 2a-2 as a queue.

When the speech synthesis operation is started, the speech synthesis start signal S2
Is sent to the voice synthesis circuit 2-4.

In response to this, the voice synthesizing circuit 2-4 generates the voice data unit end signal S3, so that the queue register 2a-2
The first address of the first voice data unit is the voice editing / synthesizing device 2a.
To the pointer register 2-3.

As a result, there is one vacancy in the matrix register 2a-2, so the head address request signal S4 is sent and the central processing unit 1a
Sends the start address of the next voice data unit.

The pointer register 2-3 holds the head address of the audio data unit received from the queue register 2-2, sends the content to the audio data memory 2-1 as the head address, and then adds 1 to the content. Then, the operation of sending the next address again in the next memory cycle is repeatedly performed.

As a result, the voice data memory 2-1 successively reads data from these consecutive addresses, forms voice data units in time series, and sends them to the voice synthesizing circuit 2-4 of the voice editing / synthesizing device 2a.

The voice synthesizing circuit 2-4 performs a waveform synthesizing process or a source synthesizing process in units of this voice data to generate an electric signal representing a synthesized voice, and sends it to the voice utterance device 3.

The voice utterance device 3 converts the electric signal from the voice synthesizing circuit 2-4 into a voice that can be heard by a human through a speaker and outputs the voice.

When the voice synthesizing circuit 2-4 detects the end of one voice data unit, it generates the voice data unit end signal S3, so that the pointer register 2-3 stops the repeating operation and the queue register 2a- 2 sends the next voice data unit to the pointer register 2-3.

In this way, the voice utterance device 3 is controlled by the start address of the voice data unit continuously sent from the central processing unit 1a.
Can output continuous voice.

Next, as an example, a case where "I am just 5 o'clock" is uttered and the above N is 1 will be described.

In this case, it is assumed that the voice data units "just now", "5 o'clock" and "is" are stored in advance in the voice data memory 2-1.

First, the central processing unit 1a sends the head address of "just now" together with the head address sending signal S1 by the head address request signal S4 from the queue register 2a-2.

When the speech synthesis operation is started, the speech synthesis start signal S2
Since the voice data unit end signal S3 is generated from the voice synthesizing circuit 2-4, the queue register 2a-2 is "just now".
Send the start address of the pointer to the pointer register 2-3.

As a result, since the matrix register 2a-2 becomes empty, the head address request signal S4 is sent, and the central processing unit 1a sends the head address of the next "5 o'clock".

The pointer register 2-3 sends consecutive addresses from the head address of "just now" to the voice data memory 2-1, so that the voice data memory 2-1 uses the voice data unit of "just now" as the voice synthesis circuit 2-4. Send to.

The voice synthesizing circuit 2-4 generates an electrical signal representing a voice in "current" voice data units, and the voice utterance device 3 converts this into a voice audible to humans and utters it.

When the "currently" voice data unit ends, the voice synthesizing circuit 2-4 detects the end and generates a voice data unit end signal S3. Therefore, the pointer register 2-3
Stops its operation, and the queue register 2a-2 immediately sends the next "5 o'clock" to the pointer register 2-3.

As a result, since the matrix register 2a-2 becomes empty, the head address request signal S4 is sent and the central processing unit 1a
Send the first address of the next "is".

In this way, since each part continues to operate, the start address of the voice data unit "just now", "5 o'clock" and "is" sent from the central processing unit 1a The last voice utterance device 3 outputs the continuous voice "5
It is time. "

In this case as well, since there is no uncontrollable uncertain time in the utterance intervals of "just now", "5 o'clock" and "is", it is possible to utter "just now 5 o'clock" with a natural voice. .

In each of the above embodiments, the voice editing / synthesizing apparatus has described the case of directly inputting the start address of the area storing the voice data in the voice data memory, but the code indirectly indicating the start address is used. , For example, enter the index code of the start address table that is stored in a part of the audio data memory together with the start address of the audio data, and refer to the start address table to set the index code to the start address in the pointer register. It is also possible to perform the read operation of the audio data after the conversion.

〔The invention's effect〕

As described above, the voice editing / synthesizing device of the present invention includes the queue register that holds the start address of the succeeding voice data unit, so that the silent time between the voice data units such as clauses and words is appropriately adjusted. Thus, it has an effect that a natural voice can be produced.

[Brief description of drawings]

FIG. 1 is a block diagram showing a first embodiment of a voice editing / synthesizing apparatus of the present invention, FIG. 2 is a block diagram showing a second embodiment of a voice editing / synthesizing apparatus of the present invention, and FIG. FIG. 3 is a block diagram showing a voice editing / synthesizing device. 1,1a, 1b ... Central processing unit, 2,2a, 2b ... Voice editing / synthesizing device, 2-1 ... Voice data memory, 2-2,2a-2 ... Queue register, 2-3,2b -3 ... pointer register,
2-4, 2b-4 ... voice synthesis circuit, 3 ... voice utterance device,
S1, S1b …… Start address transmission signal, S2 …… Voice synthesis start signal, S3, S3b …… Voice data unit end signal, S4 …… Start address request signal.

Claims (1)

[Claims] 1. A voice data memory in which (A) voice data is stored in advance in voice data units such as phrases and words, and (B) voice data units for reading and editing voice data from the voice data memory. A code that directly or indirectly indicates the start address of the is input and held, and an address obtained by gradually increasing (or gradually decreasing) the range of the storage area of the audio data unit from the start address indicated by the code is given to the audio data memory. A pointer register for reading the voice data unit, and (C) a voice synthesizing circuit for synthesizing the voice data unit read from the voice data memory into a voice signal. And holding N queues relating to codes that directly or indirectly indicate the start address of the audio data unit to be read one after another, A queue register which, when ending one of the voice data units being read and synthesized, moves to the pointer register a code which directly or indirectly indicates the starting address held at the beginning of the queue. A voice editing / synthesizing device.