JPH0773186B2 - Digital-to-analog converter - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to digital-analog (DA) conversion.

[0002]

2. Description of the Related Art A digital signal for reproducing a compact disc (CD) is AD-converted with 16 bits.
In this way, when the audio signal is digitized because it is always represented by digital data of a finite length bit, it is rounded to the minimum number of bits and digitized. Therefore, in the minute signal, the element represented by the least significant bit (LSB) is strengthened and the distortion is increased. In 16-bit system in Figure 10-
An input waveform diagram (a) and an output waveform diagram (b) of a minute signal sine wave obtained by AD / DA converting a 90 dB sine wave are shown. As described above, the minute signal near the LSB is reproduced by DA conversion of the original sine wave into a rectangular wave.

[0003]

Such a pulsive reproduction signal contains high-order harmonics even at a low frequency, so that even the same distortion rate is more harmful to the listener.

[0004]

Means for Solving the Problems The present invention is based on a means for digital-analog converting input digital data, and a time length of LSB change that detects a data change for each sample data of the digital data and does not change. A digital-to-analog conversion device comprising means for selecting a plurality of low-pass filters having different cut-off frequency characteristics, and selecting at least one of the digital-analog converted data from a low-pass filter to obtain an analog signal output. The present invention further comprises means for digital-analog converting input digital data, means for determining the rate of change in level from the time interval of LSB change of digital data, and LSB for smoothing the waveform change during the determined period. It is a digital-analog conversion device comprising means for generating a lower-order data string, and adding a filter for adding the analog signal generated from the lower-order data to the digital-analog converted analog signal.

The present invention further comprises means for digital-to-analog converting digital data input at a predetermined sample clock, means for determining the rate of change of the data from the time interval of LSB change of the digital data, and the determined period. And a means for generating a data sequence lower than the LSB for smoothing waveform changes, and a digital filter means for outputting the input data with a sample clock that is an integer multiple of the clock. The data is latched at, and the time when the data string continues below the predetermined level is detected, and the waveform change according to time is changed by changing the level before and after the LSB level for several samples of the predetermined sample clock at the level lower than the LSB. Generates data that changes smoothly and digitally converts it into analog signals. A digital-to-analog converter to obtain by adding the analog signal output produced from the lower data. Further, the present invention has a detection output in which the difference between samples is 0 from the sample data string of the digital data and a change detection output means in which the difference is a positive and negative 1 LSB change, and detects 0 between the different polar change outputs. 1LS depending on output length
It is a digital-analog converter having means for generating data of LSB or less over the samples before and after the B change point and expanding the bits.

[0006]

The present invention will be described with reference to the drawings. FIG. 1 shows a block diagram of an embodiment of the present invention. For the purpose of detecting the shape of the data from the digital data (data IN1) obtained by reproducing a CD or the like, the change detector 3 first sets the LSB at which the data has a predetermined level for each sample.
It is detected whether the step changes, does not change, or changes more than that. This change detector-3
A block diagram of this embodiment is shown in FIG. The input digital data 1 compares the data one sample before and the current data with the comparator 9 through the register 8 which delays by one sample clock, and the same data is obtained. -Or a difference of LSB which is a predetermined level is output. Predetermined level is LSB, + 1LSB step output and -LS
Both outputs are 0 when the B step output is provided or does not change. Further, the output in the case of data other than the above which is a large level change output is taken out.

The state of this waveform timing is shown in FIG. When data is input in the range of + or -1 LSB, + LSB or -1 LSB is output at the change point, respectively. +1 LSB detection and -1 LSB detection, that is, t
If it is a detection pulse of different polarity such as 1 and t3, and if the data output during that period is 0 output, square wave data is obtained in this section as shown in the figure, while half of this cycle It is good to choose a filter that produces a sine wave of the frequency. To detect this data, the OR circuit 10 takes out the change output 11 as shown in FIG. If the data changes more than 1LSB, N
OT OUT12 outputs, the filter function is lost, and the normal condition is restored.

If the signal is not a very low level signal, this N
The output of OT OUT12 appears, and when the target minute level is approached, a change in signal level of 1 LSB or more becomes L.
Since the level changes close to SB, by adding the output of NOTOUT 12 to the output 11 by the OR circuit shown by the broken line, the same effect can be obtained without directly deactivating the filter by NOT OUT output. That is, since the output of NOT OUT 12 is always present at the normal level, the low pass filter is always used and the level in the high frequency band is lowered to remove noise. The level change of the input data that is gentle is a change of 1 LSB or less. Further, even if the change is 1 LSB or more, it is a minute level, and there is no problem even if it is handled in the same manner and the predetermined level is set to 1 LSB, and even if the data change of 1 LSB or more of the predetermined level is made smooth.

The length (t1 to tn) of this data interval is detected by this data 11 and NOT OUT12 of the signals ≠ 1, -1, 0. This is LS
This is because it does not act on the data of a large signal of B change or more. This output is input to the shift register-4. Here, the register amount of the register-4 needs to be 1/2 of the longest data inversion detection period (1 / f). For example, in order to detect 441 Hz at a sample period of 44.1 KHz, it takes 50 samples or more. ((441/441
00) x 1/2)

The output from each stage of the register 4 has a long period, that is, low frequency data unless two inversions are included in a predetermined time zone. Therefore, the data length detector 5 can be configured by a detector that detects one or less one data. If it is classified into three frequency bands, a high frequency, an intermediate frequency, and a low frequency, the number of 1's in a predetermined range on both sides of the register-center is measured by the detector 13 in the intermediate frequency band or less as shown in FIG. . This may be a simple adder, or a counter may count values of 1 in between. If the number of 1's is 1 or less, the output appears in the detector 13, and if it is 2 or more, it does not output,
For this reason, the output of the digital filter of SF0 is not required (only the analog filter for removing the normal sample clock) through the inverter 16, and the detection of the detection of 1 of the output of the register of the entire band is similarly measured. The detector 14 detects low frequencies. In the case of this detection, the gate 15 prohibits the mid-range detection output SF1. By these, the data length is detected and the reproduction frequency is classified into high, medium and low frequencies.

On the other hand, in the digital data, a digital low-pass filter 6 is used to make a transversal filter correspond to the detector outputs F0, F1 and F2, and a filter characteristic example is shown in FIG. Two low pass filters-21 and 22 are formed. This low-pass filter-2
Since the cut characteristics of 1 and 22 simply smooth the waveform, a simple filter such as 12 dB / oct is sufficient. Here, the output timing of the filter and the output timing of the selector 23 must be the same. This allows filter-21,
The output of 22 outputs the operation result of less than LSB, expands the bit, and uses the DA converter 7 corresponding to it to achieve the purpose.

FIG. 6 shows an example when the bit expansion is increased by 2 bits, that is, 4 steps. The thin line is the conventional analog output, and the solid line is the output of the present application. FIG. 6 (a) shows the conventional high frequency data only for the LSB, which is the same as the conventional one, in which the filter is output through the filter when the F0 filter is detected. Since this is a high frequency such as 10 KHz, it is rounded by a conventional analog low-pass filter, and even at a slightly lower frequency, generally, high-frequency harmonics cannot be heard by the ear and there is no distortion and there is no problem. Generally, frequencies of several KHz and above cannot be distinguished from sign waves.

On the other hand, the data in the middle range is shown in FIG. 6B because F1 is selected in FIG. 6B and F2 is selected in FIG. 6C to provide a filter with a lower cutoff frequency. As described above, F1 eliminates higher-order distortion of a signal of about 1 KHz, and even a low frequency such as 100 Hz becomes smooth data as shown in FIG. To further enhance the effect,
It can be improved by increasing the number of bits and increasing the filter.

Here, the digital filter is 16 bi
The t data is handled, and the output also requires the bit expansion.
Another embodiment in which these are improved is shown in FIG. 7 and a waveform diagram is shown in FIG. Here, the outputs of the comparator 9 in FIG. 2 are +1 and -1.
An additional lower bit is created only from three data of 0 and 0, and D / is used by the DA converter 24 together with the conventional upper bit.
A is to be converted. Here, the smooth data corresponding to the integration of the LSB change is taken out from the shift register of the ± 1LSB step signal and the weighted constant corresponding to the +1 or -1 point is taken out and added to the data of the lower bit. − Is obtained.

The digital data IN1 shown in FIG. 7 is delayed by a sample corresponding to the lower bit output timing via the register 17. On the other hand, similarly to the above, as shown in FIG. 1, the filter is selected by detecting the LSB step change of the data. Instead of the data input of the digital filter, + 1,0,-of the output of the comparator-9 is used.
This data is input to the register 18 which uses only 1 data (2 bit expression is also possible) and shifts for each sample. If there is 1 or -1 from each register stage, F1
In this case, the adder 2 is operated by passing the data coefficient calculator 19b such as a weighted ROM of K1 to Km or -K1 to -Km.
At 0, all data is added and output. Here, as shown in FIG. 9, the output of the central data multiplier 19a is set to -0.5, and in the multiplier 19c, K'1 is close to 0.5 and K'z is close to 0. -Enter the value corresponding to the pass filter. Of course, sine approximation or linear interpolation data may be used. After the center, the polarity is reversed and the same as K1 to Km.

According to this, the level of data-1 increases as the value of K increases as it approaches the center, becomes approximately +0.5, becomes -0.5 at the center, and approaches 0 as it moves away from the center. As shown in FIG. 8, the integrated data output 20 (complementing the square wave output Data (upper) which is successively added with the input data and the lower data is DA-converted by the upper data ( A signal corresponding to the waveform of (Σ, lower) is obtained by the lower data in which bits are expanded, and the analog output obtained by combining the upper and lower can be a smooth output like the data OUT in FIG. .

Here, the lower bit can use an independent D / A converter and can be combined with the LSB level of the upper converter for analog synthesis and output. Also, by selecting the filter, the value of the change rate K of the waveform is set to K'1 to K'1.
By preparing K'Z and a plurality of constants, it is possible to select a suitable waveform change rate according to the pattern length of the data and output the lower bit data as a smooth output waveform as shown in FIG.

Here, the filter unit for generating the lower bits and the pattern detection of the data are detected by the digital processor.
It can also be implemented by programming. Although the number of filters has been described as two, of course, one is also effective, and conversely the number of filters can be increased to widen the effective frequency band. Also, the data pattern has been described focusing only on the LSB step change.
In an s-transform, so-called over-sample system, bits are expanded to prevent requantization noise from occurring.
In these outputs, the LSB step before bit expansion is the target, so it is necessary to detect more than the expanded LSB step.

To realize this, the converted data of fs and the output of nfs which is n times fs are latched with the original fs, and this latched data output corresponds to the LSB of the input data. This can be realized by detecting a predetermined level change, which is a level, and smoothing the predetermined level, that is, before and after the level change corresponding to the LSB of the change before the fs conversion, over several samples of the sample clock as described above.

[0020]

As described above, by detecting the intervals of minute level changes in the data train, adding a smooth analog signal, and allowing the fundamental wave to pass through a plurality of filters, the distortion component can be reliably removed to reduce noise and noise. Distortion can be significantly improved.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2A is a block diagram of a data change detection unit,
(B) is a diagram showing waveforms of each part

FIG. 3 is a block diagram of a data cycle detection unit.

FIG. 4 is a block diagram of a digital filter unit.

FIG. 5 is a diagram showing frequency characteristics of a filter.

6 (a), (b), and (c) are diagrams showing reproduction outputs, respectively.

FIG. 7 is a block diagram showing another embodiment of creating a lower bit waveform.

FIG. 8 is a diagram for explaining the waveform.

FIG. 9 is a diagram for explaining a coefficient.

FIG. 10 is a diagram for comparing the conventional input (a) and output (b) waveforms.

[Explanation of symbols]

 1 data IN 2 data OUT 3 change detector-4,8,17,18 register-5 data length detector 6,21,22 low pass filter-7,24 DA converter 9 comparator 10 OR circuit 11 data 12 NOT OUT 13,14 detector 15 gate 16 inverter 19a, b, c coefficient multiplier 20 integral data output 23 selector

Claims (4)

[Claims] 1. A means for converting input digital data to digital-analog, and a plurality of different cutoff frequency characteristics from the time length of the LSB change, which detects a data change for each sample data of the digital data and which does not change. A digital-to-analog conversion device comprising means for selecting a low-pass filter and having at least one of the low-pass filters selected from the digital-analog converted data to obtain an analog signal output. 2. A means for converting the inputted digital data into a digital analog signal, a means for judging a level change rate from a time interval of the LSB change of the digital data, and an L for smoothing a waveform change in the judged period.
A digital-analog conversion device comprising means for generating a data sequence lower than SB and adding a filter for adding the analog signal generated from the low-order data to the analog signal subjected to the digital-analog conversion. 3. A means for digital-analog converting digital data input by a predetermined sample clock, a means for judging a rate of change of data from a time interval of LSB change of the digital data, and a period for the above-mentioned judged period. Means for generating a data string lower than the LSB for smoothing the waveform change and digital filter means for outputting the input data with a sample clock obtained by multiplying the input data are provided. The data is latched by the clock, the time when the data string continues below the predetermined level is detected, and the waveform change according to the time is changed to the waveform before and after the LSB level change for a few samples of the predetermined sample clock below the LSB. Generates data that changes smoothly with changes in level,
A digital-analog conversion device, wherein an analog signal generated from the lower data is added to the digital-analog converted analog signal to obtain an output. 4. A detection output in which the difference between samples is 0 and a change detection output means in which the difference is a positive and negative 1 LSB change from a sample data string of digital data, and 0 detection between change outputs of different polarities is provided. A digital-to-analog conversion device comprising means for generating data of LSB or less over the samples before and after the change point of 1 LSB according to the output length, and performing bit expansion.