JPH0773414B2 - Charge / discharge circuit - Google Patents
Charge / discharge circuitInfo
- Publication number
- JPH0773414B2 JPH0773414B2 JP5027064A JP2706493A JPH0773414B2 JP H0773414 B2 JPH0773414 B2 JP H0773414B2 JP 5027064 A JP5027064 A JP 5027064A JP 2706493 A JP2706493 A JP 2706493A JP H0773414 B2 JPH0773414 B2 JP H0773414B2
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- secondary battery
- circuit
- voltage
- comparator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M10/00—Secondary cells; Manufacture thereof
- H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
- H01M10/44—Methods for charging or discharging
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or discharging batteries or for supplying loads from batteries
- H02J7/02—Circuit arrangements for charging or discharging batteries or for supplying loads from batteries for charging batteries from AC mains by converters
- H02J7/04—Regulation of charging current or voltage
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or discharging batteries or for supplying loads from batteries
- H02J7/34—Parallel operation in networks using both storage and other DC sources, e.g. providing buffering
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or discharging batteries or for supplying loads from batteries
- H02J7/90—Regulation of charging or discharging current or voltage
- H02J7/96—Regulation of charging or discharging current or voltage in response to battery voltage
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
- Secondary Cells (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は充放電回路に関し、特
に、電子機器の電源回路に用いられる二次電池の充放電
回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a charging / discharging circuit, and more particularly to a charging / discharging circuit for a secondary battery used in a power supply circuit of electronic equipment.
【０００２】[0002]
【従来の技術】電子機器の電源回路としては、一例とし
て図３に示すような、交流を直流に変換する直流電源と
二次電池とを組合せた回路が用いられることが多い。図
３に示す回路は、実開平１−１５９５５０号公報（実願
昭６３−５３３７４号公報）に開示されたものであっ
て、ＡＣ１００Ｖを直流電源により変換して得られる直
流出力と、二次電池からの直流出力とで負荷を駆動する
ように構成されている。2. Description of the Related Art As a power supply circuit for electronic equipment, a circuit in which a direct current power supply for converting alternating current into direct current and a secondary battery are combined is often used as shown in FIG. The circuit shown in FIG. 3 is disclosed in Japanese Utility Model Application Laid-Open No. 1-159550 (Japanese Utility Model Application No. 63-53374), in which a DC output obtained by converting AC 100 V by a DC power supply and a secondary battery. Is configured to drive the load with the DC output from.
【０００３】図３を参照するとこの電源回路では、直流
電源１１のプラス側端子が出力端子１２ａに接続され、
マイナス側端子が出力端子１２ｂに接続されている。一
方、二次電池は、プラス電極が、抵抗ＲとダイオードＤ
との並列回路を介して出力端子１２ａに接続され、マイ
ナス電極が出力端子１２ｂに接続されている。ダイオー
ドＤは、アノードが二次電池のプラス電極に接続されカ
ソードが出力端子１２ａに接続されている。Referring to FIG. 3, in this power supply circuit, the positive terminal of the DC power supply 11 is connected to the output terminal 12a,
The minus side terminal is connected to the output terminal 12b. On the other hand, in the secondary battery, the positive electrode has a resistance R and a diode D.
Is connected to the output terminal 12a via a parallel circuit of and the negative electrode is connected to the output terminal 12b. The diode D has an anode connected to the positive electrode of the secondary battery and a cathode connected to the output terminal 12a.
【０００４】図３において、いま直流電源１１がＡＣア
ダプタである場合、これが接続されているときは、抵抗
Ｒを介して二次電池２が充電されると共に負荷６に電力
が供給される。二次電池２の電圧がＡＣアダプタ（直流
電源１１）の出力電圧に等しくなるとＡＣアダプタの電
力は負荷６にのみ供給されるようになる。次に、ＡＣア
ダプタが接続されていない場合、ダイオードＤを介して
二次電池２から負荷６に電力が供給される。In FIG. 3, when the DC power supply 11 is an AC adapter, when it is connected, the secondary battery 2 is charged through the resistor R and power is supplied to the load 6. When the voltage of the secondary battery 2 becomes equal to the output voltage of the AC adapter (DC power supply 11), the power of the AC adapter is supplied only to the load 6. Next, when the AC adapter is not connected, power is supplied from the secondary battery 2 to the load 6 via the diode D.
【０００５】[0005]
【発明が解決しようとする課題】この従来の充放電回路
では直流電源１１の出力電圧が二次電池２の電圧より高
い場合のみ充電が可能であるが、その充電は抵抗Ｒの値
とＡＣアダプタ（直流電源１１）の出力電圧のみで制御
されるので、二次電池が過充電状態となった場合の保護
回路が別に必要になる。また、ＡＣアダプタ（直流電源
１１）の接続が無い場合は二次電池２より負荷６に電力
を供給するが、二次電池２の放電経路はダイオードＤの
みであるため、二次電池が過放電状態になっても電力を
供給しつづけることがある。このため、過放電を防止す
る回路が別に必要になる。特にリチウム二次電池は、過
充電、過放電に対して性能の劣化が著しいので、これら
の保護回路は必須となる。In this conventional charging / discharging circuit, charging is possible only when the output voltage of the DC power supply 11 is higher than the voltage of the secondary battery 2, but the charging is performed by the value of the resistor R and the AC adapter. Since it is controlled only by the output voltage of the (DC power supply 11), a separate protection circuit is required when the secondary battery is overcharged. Further, when the AC adapter (DC power supply 11) is not connected, the secondary battery 2 supplies power to the load 6, but the secondary battery 2 discharges only the diode D. Therefore, the secondary battery is over-discharged. Even if it becomes a state, it may continue to supply electric power. Therefore, a separate circuit for preventing overdischarge is required. In particular, since the lithium secondary battery is significantly deteriorated in performance due to overcharge and overdischarge, these protection circuits are indispensable.
【０００６】[0006]
【課題を解決するための手段】本発明の充放電回路は、
外部の直流電圧源および負荷が接続される第１の端子対
の一方の端子から外部の二次電池が接続される第２の端
子対の一方の端子への電流経路内に設けられた双方向性
のアナグロスイッチと、前記第２の端子対に接続された
前記二次電池の過充電状態を検出する手段と、前記接続
された二次電池の過放電状態を検出する手段と、前記直
流電圧源からの前記第１の端子対への電力の供給の有無
を検出する手段とを含み、前記アナログスイッチの開閉
状態を制御する制御回路とを備え、前記第２の端子対に
接続された二次電池が過放電状態で前記直流電圧源から
の電力供給が無いときおよび前記接続された二次電池が
過充電状態にあるとき、前記アナログスイッチが開状態
となり前記接続された二次電池の充放電が禁止されるよ
うに構成されている。The charging / discharging circuit of the present invention comprises:
Bidirectional provided in the current path from one terminal of the first terminal pair to which the external DC voltage source and load are connected to one terminal of the second terminal pair to which the external secondary battery is connected Analog switch, means for detecting an overcharged state of the secondary battery connected to the second terminal pair, means for detecting an overdischarged state of the connected secondary battery, and the DC voltage A control circuit for controlling the open / closed state of the analog switch, the control circuit controlling the open / closed state of the analog switch, and a circuit connected to the second terminal pair. When the secondary battery is in the over-discharged state and there is no power supply from the DC voltage source and when the connected secondary battery is in the over-charged state, the analog switch is opened and the connected secondary battery is charged. Configured to inhibit discharge .
【０００７】[0007]
【作用】本発明の充放電回路は、二次電池の端子電圧を
監視し、過充電状態での電圧と過放電状態での電圧に対
するしきい値を有している。それぞれのしきい値に対し
てスイッチとなるＭＯＳトランジスタのオン・オフを制
御するシーケンスを備えている。通常は、二次電池に対
して、充電側と放電側にそれぞれ個別にスイッチが必要
になるが、ＭＯＳトランジスタを双方向性のアナログス
イッチとして使用することで、ただひとつのスイッチで
済ますことができる。The charging / discharging circuit of the present invention monitors the terminal voltage of the secondary battery and has threshold values for the voltage in the overcharged state and the voltage in the overdischarged state. A sequence for controlling ON / OFF of a MOS transistor which serves as a switch for each threshold value is provided. Normally, it is necessary to have separate switches for the charge side and discharge side of the secondary battery, but by using a MOS transistor as a bidirectional analog switch, only one switch is required. .
【０００８】[0008]
【実施例】次に、本発明の好適な実施例について、図面
を参照して説明する。図１（ａ）は、本発明の第１の実
施例のブロック図である。ｎチャンネル型ＭＯＳトラン
ジスタＱn のドレイン端子に二次電池２が接続され、ソ
ース端子に負荷６が接続される。ＡＣアダプタ１１の出
力はＭＯＳトランジスタＱn のソース端子に接続され
る。第１コンパレータ８１は過放電検出用コンパレータ
である。この第１コンパレータ８１の非反転入力端子は
二次電池２のプラス電極に接続され、反転入力端子に定
電圧Ｖ1 が入力される。第２コンパレータ８２は過充電
検出用コンパレータである。この第２コンパレータ８２
の反転入力端子は二次電池のプラス電極に接続され、非
反転入力端子に定電圧Ｖ2 が入力される。第３コンパレ
ータ８３はＡＣアダプタ１１の入力検出用のコンパレー
タである。この第３コンパレータ８３の非反転入力端子
はＭＯＳトランジスタＱn のソース端子に接続され、反
転入力端子に定電圧Ｖ3 が入力される。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, preferred embodiments of the present invention will be described with reference to the drawings. FIG. 1A is a block diagram of the first embodiment of the present invention. The secondary battery 2 is connected to the drain terminal of the n-channel MOS transistor Q n , and the load 6 is connected to the source terminal. The output of the AC adapter 11 is connected to the source terminal of the MOS transistor Q n . The first comparator 81 is an overdischarge detection comparator. The non-inverting input terminal of the first comparator 81 is connected to the positive electrode of the secondary battery 2, and the constant voltage V 1 is input to the inverting input terminal. The second comparator 82 is an overcharge detection comparator. This second comparator 82
The inverting input terminal of is connected to the positive electrode of the secondary battery, and the constant voltage V 2 is input to the non-inverting input terminal. The third comparator 83 is a comparator for detecting the input of the AC adapter 11. The non-inverting input terminal of the third comparator 83 is connected to the source terminal of the MOS transistor Q n , and the constant voltage V 3 is input to the inverting input terminal.
【０００９】それぞれの定電圧の間には次のような関係
がある。There is the following relationship between the respective constant voltages.
【００１０】Ｖ1 〈Ｖ2 〈Ｖ3 図１（ｂ）は本実施例のタイミングチャートである。時
刻ｔo からｔ1 までの期間は、二次電池２は過放電状態
にあり、かつＡＣアダプタ１１により電力が供給されて
いる。したがって、第１コンパレータ８１の出力はロ
ウ、第２コンパレータ８２の出力はハイ、第３コンパレ
ータ８３の出力はハイとなるので、ＭＯＳトランジスタ
Ｑn はオンとなって、二次電池２を充電しながら負荷６
に電力を供給する。時刻ｔ2 までの期間についても同様
にＭＯＳトランジスタＱn はオンとなる。次に時刻ｔ4
までの期間はＡＣアダプタ１１の入力がない状態であ
る。時刻ｔ3 までは、二次電池２が動作電圧範囲内にあ
るのでＭＯＳトランジスタＱnはオンして、負荷６に二
次電池２から電力を供給する。時刻ｔ3 からｔ4 の期間
は二次電池が過放電状態となったため、ＭＯＳトランジ
スタＱn はオフとなり、負荷６への電力供給を禁止す
る。時刻ｔ4 以降、再びＡＣアダプタ１１が接続され
る。このため、時刻ｔ4 からｔ6 までの期間はＭＯＳト
ランジスタＱn をオフして充電を禁止する。V 1 <V 2 <V 3 FIG. 1B is a timing chart of this embodiment. During the period from time t o to t 1 , the secondary battery 2 is in the over-discharged state and the AC adapter 11 is supplying power. Therefore, the output of the first comparator 81 is low, the output of the second comparator 82 is high, and the output of the third comparator 83 is high, so that the MOS transistor Q n is turned on and the secondary battery 2 is charged. Load 6
Supply power to. Similarly, the MOS transistor Q n is turned on during the period until time t 2 . Then at time t 4
Until then, there is no input from the AC adapter 11. Until time t 3 , the secondary battery 2 is within the operating voltage range, and therefore the MOS transistor Q n is turned on to supply the load 6 with power from the secondary battery 2. During the period from the time t 3 to the time t 4, the secondary battery is in the over-discharged state, so the MOS transistor Q n is turned off and the power supply to the load 6 is prohibited. After time t 4 , the AC adapter 11 is connected again. Therefore, during the period from time t 4 to t 6 , the MOS transistor Q n is turned off to prohibit charging.
【００１１】図２は本発明の第２の実施例のブロック図
である。図２を参照すると、本実施例では第１の実施例
と異なって、第２コンパレータ８２の出力が２入力のＡ
ＮＤ回路１０を通してＡＮＤ回路４に入力される。ＡＮ
Ｄ回路１０の２つの入力には第２コンパレータ８２の出
力と外部のＣＯＮＴが入力されているので、外部信号に
より強制的に負荷６への電力の供給を停止できる。FIG. 2 is a block diagram of the second embodiment of the present invention. Referring to FIG. 2, unlike the first embodiment, in this embodiment, the output of the second comparator 82 is a 2-input A
It is input to the AND circuit 4 through the ND circuit 10. AN
Since the output of the second comparator 82 and the external CONT are input to the two inputs of the D circuit 10, the power supply to the load 6 can be forcibly stopped by an external signal.
【００１２】[0012]
【発明の効果】以上説明したような本発明は、直流電源
からの電力供給の有無を判別する回路と二次電池の過充
電・過放電を監視する回路とアナログスイッチとで、二
次電池の充電と放電とを制御することによって二次電池
の寿命を延ばすことが可能となる。また、アナログスイ
ッチとして双方向性のＭＯＳトランジスタを使用するこ
とで、充放電経路に共通の一つのスイッチとしているの
で、ＩＣ化した時、チップサイズを削減することができ
る効果がある。According to the present invention as described above, the circuit for determining the presence or absence of power supply from the DC power supply, the circuit for monitoring overcharge / overdischarge of the secondary battery, and the analog switch are By controlling charging and discharging, the life of the secondary battery can be extended. In addition, since a bidirectional MOS transistor is used as the analog switch to form one switch common to the charging / discharging paths, there is an effect that the chip size can be reduced when integrated into an IC.
【図１】分図（ａ）は、本発明の第１の実施例のブロッ
ク図である。分図（ｂ）は、分図（ａ）に示す回路のタ
イミングチャート図である。FIG. 1A is a block diagram of a first embodiment of the present invention. Diagram (b) is a timing chart of the circuit shown in diagram (a).
【図２】本発明の第２の実施例のブロック図である。FIG. 2 is a block diagram of a second embodiment of the present invention.
【図３】従来の充放電回路を説明するための、電源回路
の一例の回路図である。FIG. 3 is a circuit diagram of an example of a power supply circuit for explaining a conventional charge / discharge circuit.
２ 二次電池 ４ ＡＮＤ回路 ５ ＯＲ回路 ６ 負荷 １０ ＡＮＤ回路 １１ 直流電源 １２ａ，１２ｂ 出力端子 ８１，８２，８３ コンパレータ 2 secondary battery 4 AND circuit 5 OR circuit 6 load 10 AND circuit 11 DC power supply 12a, 12b output terminal 81, 82, 83 comparator
Claims (4)
る第１の端子対の一方の端子から外部の二次電池が接続
される第２の端子対の一方の端子への電流経路内に設け
られた双方向性のアナグロスイッチと、 前記第２の端子対に接続された前記二次電池の過充電状
態を検出する手段と、前記接続された二次電池の過放電
状態を検出する手段と、前記直流電圧源からの前記第１
の端子対への電力の供給の有無を検出する手段とを含
み、前記アナログスイッチの開閉状態を制御する制御回
路とを備え、 前記第２の端子対に接続された二次電池が過放電状態で
前記直流電圧源からの電力供給が無いときおよび前記接
続された二次電池が過充電状態にあるとき、前記アナロ
グスイッチが開状態となり前記接続された二次電池の充
放電が禁止されるように構成された充放電回路。1. In a current path from one terminal of a first terminal pair to which an external DC voltage source and a load are connected to one terminal of a second terminal pair to which an external secondary battery is connected. A provided bidirectional analog switch, a means for detecting an overcharged state of the secondary battery connected to the second terminal pair, and a means for detecting an overdischarged state of the connected secondary battery. And the first from the DC voltage source
And a control circuit for controlling the open / closed state of the analog switch, wherein the secondary battery connected to the second terminal pair is in an overdischarged state. When there is no power supply from the DC voltage source and when the connected secondary battery is in an overcharged state, the analog switch is opened so that charging and discharging of the connected secondary battery is prohibited. Charge / discharge circuit configured in.
池の電圧が第１の所定電圧以下であることを検出する第
１の検出手段と、前記接続された二次電池の電圧が前記
第１の所定電圧より大なる第２の所定電圧以上であるこ
とを検出する第２の検出手段と、前記直流電圧源からの
電力供給の有無を検出する第３の検出手段とを有し、前
記接続された二次電池の電圧が前記第２の所定電圧以上
であるとき、および、前記直流電圧源からの供給電力が
ないときの前記接続された二次電池の電圧が前記第１の
所定電圧以下であるとき、前記アナログスイッチを遮断
するように構成されていることを特徴とする充放電回
路。2. The charging / discharging circuit according to claim 1, wherein the control circuit detects that the voltage of the secondary battery connected to the second terminal pair is equal to or lower than a first predetermined voltage. Detecting means, second detecting means for detecting that the voltage of the connected secondary battery is not less than a second predetermined voltage higher than the first predetermined voltage, and power from the DC voltage source. Third detection means for detecting the presence or absence of supply, when the voltage of the connected secondary battery is equal to or higher than the second predetermined voltage, and when there is no power supplied from the DC voltage source. The charging / discharging circuit is configured to cut off the analog switch when the voltage of the connected secondary battery is less than or equal to the first predetermined voltage.
スタであり、 前記制御回路が、非反転入力端が前記第２の端子対の前
記一方の端子に接続され反転入力端に前記第１の所定電
圧に相当する定電圧が入力される第１のコンパレータ
と、反転入力端が前記第２の端子対の前記一方の端子に
接続され非反転入力端に前記第２の所定電圧に相当する
定電圧が入力される第２のコンパレータと、反転入力端
が前記第１の端子対の前記一方の端子に接続され、非反
転入力端に前記第２の所定電圧より大なる定電圧が入力
される第３のコンパレータと、前記第１のコンパレータ
の出力と前記第３のコンパレータの出力とを入力とする
２入力のＯＲ回路と、前記第２のコンパレータの出力と
前記ＯＲ回路の出力とを入力とし出力端が前記ｎチャン
ネル型ＭＯＳトランジスタのゲート電極に接続された２
入力のＡＮＤ回路とからなることを特徴とする充放電回
路。3. The charge / discharge circuit according to claim 2, wherein the analog switch is an n-channel MOS transistor, and the control circuit has a non-inverting input terminal connected to the one terminal of the second terminal pair. And a first comparator to which a constant voltage corresponding to the first predetermined voltage is input to an inverting input terminal, and an inverting input terminal connected to the one terminal of the second terminal pair and a non-inverting input terminal connected to the one terminal. A second comparator to which a constant voltage corresponding to a second predetermined voltage is input, an inverting input terminal connected to the one terminal of the first terminal pair, and a non-inverting input terminal connected to the second predetermined voltage. A third comparator to which a larger constant voltage is input; a two-input OR circuit that receives the output of the first comparator and the output of the third comparator; and the output of the second comparator OR 2 the output terminal as input and output of the road is connected to the gate electrode of the n-channel type MOS transistor
A charging / discharging circuit comprising an input AND circuit.
ＡＮＤ回路に直接入力されるのに替えて、前記第２のコ
ンパレータの出力を一方の入力とし外部からの制御信号
を他方の入力とする２入力のＡＮＤ回路を介して前記Ａ
ＮＤ回路に入力されるように構成されていることを特徴
とする充放電回路。4. The charging / discharging circuit according to claim 3, wherein the control circuit directly outputs the output of the second comparator to the AND circuit instead of inputting the output of the second comparator. A through a 2-input AND circuit in which a control signal from the outside is used as the other input
A charging / discharging circuit, which is configured to be input to an ND circuit.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5027064A JPH0773414B2 (en) | 1993-02-17 | 1993-02-17 | Charge / discharge circuit |
| US08/197,688 US5554919A (en) | 1993-02-17 | 1994-02-17 | Charge/discharge circuit having a simple circuit for protecting a secondary cell from overcharging and overdischarging |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5027064A JPH0773414B2 (en) | 1993-02-17 | 1993-02-17 | Charge / discharge circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH06245406A JPH06245406A (en) | 1994-09-02 |
| JPH0773414B2 true JPH0773414B2 (en) | 1995-08-02 |
Family
ID=12210648
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5027064A Expired - Fee Related JPH0773414B2 (en) | 1993-02-17 | 1993-02-17 | Charge / discharge circuit |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US5554919A (en) |
| JP (1) | JPH0773414B2 (en) |
Families Citing this family (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5742148A (en) * | 1992-11-24 | 1998-04-21 | Seiko Instruments Inc. | Charge/discharge control circuit and chargeable electric power source apparatus |
| JP3567512B2 (en) * | 1994-10-11 | 2004-09-22 | ソニー株式会社 | Battery protection circuit |
| US5635821A (en) * | 1995-06-30 | 1997-06-03 | National Semiconductor Corporation | Low cell charge enable circuit |
| US5637413A (en) * | 1995-10-16 | 1997-06-10 | Motorola, Inc. | Overvoltage disconnect circuit for lithium ion batteries |
| US5789902A (en) * | 1996-02-22 | 1998-08-04 | Hitachi Metals, Ltd. | Bi-direction current control circuit for monitoring charge/discharge of a battery |
| US5695886A (en) * | 1996-03-07 | 1997-12-09 | Motorola, Inc. | Overvoltage disconnect circuit and battery using same |
| US6014030A (en) * | 1996-05-03 | 2000-01-11 | National Semiconductor Corp. | Current-level monitor with hierarchical precision |
| US6051956A (en) * | 1997-05-30 | 2000-04-18 | Seiko Instruments Inc. | Rechargeable battery pack with pre-end signal output terminal and electronic device containing rechargeable battery pack |
| JPH10112939A (en) * | 1996-10-07 | 1998-04-28 | Nec Corp | Power switching circuit |
| JP3157121B2 (en) * | 1997-02-04 | 2001-04-16 | セイコーインスツルメンツ株式会社 | Rechargeable power supply |
| US6160381A (en) * | 1998-05-21 | 2000-12-12 | Qualcomm Inc. | Battery pack protection circuit and battery pack including a protection circuit |
| JP3431867B2 (en) | 1999-09-21 | 2003-07-28 | 松下電器産業株式会社 | Battery power supply device and electric equipment using the same |
| DE10137875C1 (en) * | 2001-08-02 | 2003-04-30 | Dialog Semiconductor Gmbh | Charge / discharge protection circuit |
| US7151378B2 (en) * | 2001-09-25 | 2006-12-19 | Wilson Greatbatch Technologies, Inc. | Implantable energy management system and method |
| DE10158494C1 (en) * | 2001-11-29 | 2003-08-07 | Dialog Semiconductor Gmbh | Charge / discharge protection circuit |
| US20060277555A1 (en) * | 2005-06-03 | 2006-12-07 | Damian Howard | Portable device interfacing |
| US20080215240A1 (en) * | 2006-12-18 | 2008-09-04 | Damian Howard | Integrating User Interfaces |
| US7931505B2 (en) * | 2007-11-15 | 2011-04-26 | Bose Corporation | Portable device interfacing |
| US7847519B2 (en) * | 2008-05-09 | 2010-12-07 | Neotec Semiconductor Ltd. | Smart battery protector with impedance compensation |
| CN101677182B (en) * | 2008-09-18 | 2011-12-07 | 新德科技股份有限公司 | Battery protector with battery internal resistance compensation |
| TWI445272B (en) * | 2009-04-02 | 2014-07-11 | 日隆電子股份有限公司 | Switch embedded integrated circuit and method for protecting battery |
| CN101872962A (en) * | 2009-04-23 | 2010-10-27 | 上海立隆微电子有限公司 | Switch embedded integrated circuit and method for protecting battery |
| CN102122813B (en) * | 2010-01-11 | 2015-11-25 | 日隆电子股份有限公司 | The switch embedded integrated circuit of protection battery and method |
| CN101949982B (en) * | 2010-07-30 | 2013-02-13 | 深圳市今朝时代新能源技术有限公司 | Super capacitor detection and control circuit system |
| JP6322957B2 (en) * | 2013-10-30 | 2018-05-16 | 株式会社オートネットワーク技術研究所 | Overcurrent protection circuit |
| JP7056005B2 (en) * | 2017-03-31 | 2022-04-19 | 株式会社豊田中央研究所 | Power supply |
| US11695283B2 (en) * | 2018-05-11 | 2023-07-04 | Texas Instruments Incorporated | Shoot-through current limiting circuit |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01159550A (en) * | 1987-12-17 | 1989-06-22 | Matsushita Electric Ind Co Ltd | Integrated air conditioner |
| US5073837A (en) * | 1989-08-10 | 1991-12-17 | Samsung Electronics Co., Ltd. | Low voltage protection circuit |
| KR930001812B1 (en) * | 1990-07-19 | 1993-03-13 | 삼성전자주식회사 | Circuit for protecting over-discharge and over-voltage |
| JPH04331425A (en) * | 1991-04-26 | 1992-11-19 | Sony Corp | Overcharge preventing device and overdischarge preventing device |
| US5287053A (en) * | 1992-07-06 | 1994-02-15 | Motorola, Inc. | Power supply with a battery disconnect |
-
1993
- 1993-02-17 JP JP5027064A patent/JPH0773414B2/en not_active Expired - Fee Related
-
1994
- 1994-02-17 US US08/197,688 patent/US5554919A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US5554919A (en) | 1996-09-10 |
| JPH06245406A (en) | 1994-09-02 |
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