JPH077424B2 - Automatic wiring method - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a wiring method for an electronic circuit printed wiring board, and in particular,
The present invention relates to an automatic wiring method in which two signal lines forming a balanced transmission line of an electronic circuit are simultaneously searched for in parallel patterns.

(Prior Art) Conventionally, a line segment search method and a maze method have been widely used as an automatic wiring method for an electronic circuit printed wiring board by an electronic computer.

FIG. 4 is an electronic circuit diagram which is a target of conventional automatic wiring, and FIG.
FIG. 6 is a conceptual diagram of the line segment search method, and FIG. 6 is a conceptual diagram of the maze method.

First, a line segment search method will be described.

As shown in FIG. 4, when a start point 13 and an end point 14 to be connected to a signal line 12 are given to a certain signal line 12, for example, S shown in FIG. Start point 13
, E corresponds to the end point 14, and the virtual line segments 20 to 26 in the horizontal direction and the virtual line segment 27 in the vertical direction from the respective points S and E until they come into contact with the obstacle (or the existing wiring area) 30. 2
When 8 are alternately generated and the virtual line segments intersect, for example, when the line segment 20 and the line segment 28 intersect, it is determined that the connection is successful, and the virtual point from the intersection point 29 to the point S and the point E is assumed. A line segment is used as a wiring pattern (wiring path). In addition, 10 is an output gate and 11 is an input gate.

Next, the maze method will be described.

Also in FIG. 6, the point S corresponds to the starting point 13 in FIG.
Shall correspond to end point 14. In the path method, a predetermined grid 31 is provided, and the adjacent grids 32, 33, 34, and 35 are numbered by the same number from the grid 36 to which the point S belongs, and this numbering is applied to the point E.
When a certain number reaches point E, for example, the grid is searched.
38 is a wiring pattern (wiring route) in the reverse order of this number, assuming that the wiring is successful. In other words, a wave is generated from the point S in the X and Y directions and gradually expanded, and the wave is moved to the point E.
At this point, while checking the numerical value indicating the distance entered in the lattice from the point E, and tracing backward to the point S, it becomes one wiring route.

(Problems to be solved by the invention) However, in any of the methods described above, the signal lines are handled one by one, and the route search is performed only between two points. The patterns of two signal lines that are desired to form a transmission line cannot be wired in parallel at the same time.

The present invention eliminates the above problems and uses an electronic computer to
It is an object of the present invention to provide an automatic wiring method capable of simultaneously forming printed patterns of two signal lines forming a balanced transmission line and parallel patterns.

(Means for Solving Problems) According to the present invention, in order to solve the above problems, in an automatic wiring method for an electronic circuit printed wiring board, two print patterns of arbitrary signal lines can be accommodated in the same grid. A minimum lattice is provided in advance, two signal lines forming a balanced transmission line of an electronic circuit are treated as a pair line, and a rough route at a lattice level is searched for each pair line to perform a rough wiring, The detailed wiring is performed by allocating through-holes to the bent cells of the general route so that the signal lines of the pair line do not intersect in the general route.

(Operation) According to the present invention, in an automatic wiring method for an electronic circuit printed wiring board, a minimum grid that can accommodate two print patterns of arbitrary signal lines in the same grid is provided in advance to form a balanced transmission line. Two signal lines (hereinafter referred to as pair lines)
Are extracted from all the signal lines, and the route to be routed for each pair line is roughly determined at the lattice level, and then the signal lines of the pair line do not intersect with each other within the range of the rough route. As shown in the figure, assign a grid through hole where the rough path is bent. Therefore, the paths of the two signal lines in the pair line automatically become parallel patterns, so that the printed pattern of the electronic circuit printed wiring board can be created extremely efficiently without human intervention.

(Example) Hereinafter, the Example of this invention is described in detail, referring drawings.

FIG. 1 is an explanatory diagram of an automatic wiring method for an electronic circuit according to the present invention. FIG. 1 (a) is an explanatory diagram of its schematic wiring, and FIG. 1 (b) is an explanatory diagram of its route shape type. FIG. 1 (c) is an explanatory diagram of the detailed wiring, and FIG. 2 is an electronic circuit diagram which is the target of the automatic wiring.

Here, as shown in FIG. 2, the output terminal 42 of one signal line 40 is connected to the input terminal 44, the output terminal 43 of the other signal line 41 is connected to the input terminal 45, and the pair line 40, The route of the wiring pattern of 41 shall be parallel.

[1] General Wiring First, general wiring will be described with reference to FIG.

Let S be the lattice 50 to which the output terminals 42 and 43 of the paired wires 40 and 41 shown in FIG. 2 belong, and let E be the lattice 51 to which the input terminals 44 and 45 belong, and the route shape type T01 shown in FIG. The route shape type to be searched is selected from the basic shape of T02 and T02 and the shape obtained by combining these route shape types T01 and T02, based on the positional relationship between S and E. For example, the route shape type T03 shown in FIG. 1 (b) is selected.

Route candidates 1, 2, ..., M are determined based on the route shape type determined in the step.

K = 0, and if K = K + 1, K ≦ m, proceed to the next step, K>
In the case of m, the next pair line is extracted as the final connection and the process returns to the step.

For the K-th path 52, it is checked whether or not two or more through holes can be taken in all the grids T ₁ , ... Tn (hereinafter referred to as bending cells) that require bending. As a result, when two or more through holes cannot be taken in all the bent cells T ₁ , ... Tn, the process returns to the step.

For each lattice 50, 53, ..., T ₁ , ... Tn, ... 54, 51 of the K-th path 52, the presence or absence of obstacles is sequentially checked. as a result,
If there is an obstacle in the middle of the route, return to the step. When there is no obstacle in the middle of the route, this route is set as a rough route of the pair lines 40 and 41 to be routed.

[2] Detailed Wiring Next, detailed wiring will be described with reference to FIG.

Let T ₁ , T ₂ , ..., Tn be the bent cells on the K-th route 52 obtained in the step of the above-mentioned general wiring, and the section S−T _1
1 -T ₂ interval, ..., divided into Tn-E section.

Set J = 1 and select two through-hole installable points and assign through-holes so that the wiring patterns of pair wires 40 and 41 do not intersect in bending cell T ₁ in section S-T _1. .

When j = j + 1 and j ≧ n + 1, go to step.

Through-holes are allocated so that the wiring patterns of the pair lines 40 and 41 do not intersect in the bending cell Tj in the section Tj ₋₁ −Tj. Return to the step again.

In the Tn-E section, the through hole determined by the bent cell Tn and E are wired, and it is checked whether or not the wiring patterns intersect. As a result, if they do not intersect, go to the step.

When j = j−1, j = 0, the process returns to the step of the general wiring section.

Backtrack and bend cell Tj at Tj ₋₁ −Tj
Reallocate through holes to. As a result, if it can be obtained, the process returns to the step.

If not, return to step.

This route is the wiring pattern of the pair lines 40 and 41 (wiring route)
And

FIG. 3 is a diagram showing an embodiment of a print pattern in which automatic wiring is performed by using the above-mentioned automatic wiring method.

In the figure, 60 is an output terminal of a pair wire which is a starting point A and B to be wired, 61 is an input terminal of a pair wire which is an end point A'and B'to be wired, 62 is a through hole prohibition point, and 63 is an obstacle. , 64 is the first wiring pattern (front pattern), 65 is the first bent cell, 66
Is a first through hole, 67 is a second wiring pattern (back pattern), 68 is a second bent cell, 69 is a second through hole, and 70 is a third wiring pattern (front pattern).

According to the above-described automatic wiring method, as shown in the figure, one of the paired wires to be wired starts from the starting point A, the first wiring pattern (front pattern) 64-the first through hole 66 in the bending cell 65- Second wiring pattern (back pattern) 67-second through hole in second bent cell 68
69-Third wiring pattern (front pattern) 70-A wiring route to the end point A'is obtained.

On the other hand, the other of the paired wires to be wired also starts from the point B, and the first wiring pattern (front pattern) 64-bent cell 65 is formed.
First through hole 66-second wiring pattern (back pattern) 67-second through hole 69 in second bent cell 68-third wiring pattern (front pattern) 70-
A wiring route to the end point B'is obtained.

By configuring in this way, even if there are many through-hole prohibition points 62 and obstacles (existing wiring parts) 63 on the printed wiring board, it is necessary to consider them and effectively avoid them. Wiring can be performed, and moreover, the paired wires can be wired in parallel without intersecting at the bent portion.

The present invention is not limited to the above embodiment,
Various modifications are possible based on the spirit of the present invention, and these are not excluded from the scope of the present invention.

(Effects of the Invention) As described in detail above, according to the present invention, in the automatic wiring method of the printed pattern of the electronic circuit printed wiring board, (a) two printed patterns of arbitrary signal lines are formed on the same grid. Set the minimum lattice that can be accommodated in (b)
Two signal lines forming a balanced transmission line of an electronic circuit are treated as a pair line, a rough route at the lattice level is searched for each pair line, and rough wiring is performed. (C) Next, in the rough route Since detailed wiring is performed by allocating through holes to the bent cells of the rough path so that the signal lines of the pair lines do not cross each other (1) There are many through hole prohibition points and obstacles (existing Even if there is a wiring portion), efficient automatic wiring can be performed while skillfully avoiding them, the yield of the printed wiring board can be improved, and the printed wiring board can be effectively used.

(2) Since the paths of the two signal lines in the pair line automatically become parallel patterns, the printed pattern of the electronic circuit printed wiring board can be formed extremely efficiently without human intervention.

(3) Moreover, by changing the size of the grid for accommodating the print pattern, it can be easily applied to the same route search of more than two signal lines.

[Brief description of drawings]

FIG. 1 is an explanatory view of an automatic wiring method of an electronic circuit of the present invention, FIG. 2 is an electronic circuit diagram which is a target of the automatic wiring of the present invention, and FIG.
FIG. 4 is a plan view showing an embodiment of a print pattern to which the automatic wiring of the present invention is applied, FIG. 4 is an electronic circuit diagram which is a target of conventional automatic wiring, and FIG. 5 is a conceptual diagram of a conventional line segment search method. ,
FIG. 6 is a conceptual diagram of the conventional route method. 40,41 …… Pair wire, 42,43,60 …… Output terminal, 44,45,61…
… Input terminals, 50 to 54 …… Lattice, T01, T02, T03 …… Path shape type, 62 …… Through hole prohibited points, 63 …… Obstacles,
64 …… first wiring pattern (front pattern), 65 …… first
Bending cell, 66 ... first through hole, 67 ... second wiring pattern (back pattern), 68 ... second bending cell,
69 …… Second through hole, 70 …… Third wiring pattern (front pattern).

Claims (2)

[Claims] 1. An automatic wiring method for a printed pattern of an electronic circuit printed wiring board, (a) setting a minimum grid capable of accommodating two printed patterns of arbitrary signal lines in the same grid, and (b) Two signal lines forming a balanced transmission line of an electronic circuit are treated as a pair line, a rough route at a lattice level is searched for each pair line, and rough wiring is performed. (C) Next, in the rough route In the automatic wiring method, detailed wiring is performed so that through-holes are allotted to the bent cells of the rough path so that the signal lines of the pair line do not intersect. 2. The automatic wiring method according to claim 1, wherein a predetermined route shape type is used when searching the rough route.