JPH0777508B2 - Electronic choke circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial field of application) The present invention relates to an electronic choke used in a power supply circuit having a constant voltage drop with respect to a DC load change and a high impedance with respect to an AC signal. Regarding the circuit.

(Prior Art) A power supply circuit using a conventional electronic choke circuit
Shown in the figure. This electronic choke circuit arranged between the power source and the load has a constant resistance in terms of direct current and a high impedance in terms of alternating current. When an attempt is made to increase the load current due to a change in the state of the load, the conventional electronic choke circuit functions as a constant resistance circuit in terms of direct current, and the voltage drop in the electronic choke circuit changes greatly. As a result, when the IC is used in the load circuit, this voltage drop may prevent the IC from operating satisfactorily.

(Problems to be Solved by the Invention) Therefore, in the conventional electronic choke circuit, when an attempt is made to supply power to a load whose operating current changes, the voltage change in the electronic choke circuit becomes large, and proper power supply cannot be performed. It was In addition, it is necessary to make the circuit insensitive to vertical noise (common mode noise).

An object of the present invention is that a power supply circuit using the electronic choke circuit according to the present invention has a high impedance with respect to an AC signal and is capable of supplying a constant voltage that keeps an output voltage constant with respect to a load current fluctuation. Another object of the present invention is to provide an electronic choke circuit that is not affected by vertical noise.

(Means and Actions for Solving Problems) The present invention has the following configuration in order to solve the above drawbacks.

The cathode of the first constant voltage diode at the first input terminal,
The anode of the second constant voltage diode is connected to the second input terminal, and the first resistor is connected between the anode of the first constant voltage diode and the cathode of the second constant voltage diode. The emitter of the first PNP transistor is connected to the end through the second resistor, the collector of the first PNP transistor is connected to the first output end, and the collector of the first NPN transistor is connected to the first PNP transistor. , The emitter of the first NPN transistor to the first output terminal via the third resistor, and the base of the first NPN transistor to the anode of the first constant voltage diode via the eighth resistor. Connected to detect the voltage change between the first input end and the first output end by the change in the base current of the first NPN transistor, and control the first PNP transistor to connect the first input end to the first input end. The voltage between the first output and Connecting a first capacitor for bypassing the AC signal so that the AC signal is not applied between the base and the emitter of the first NPN transistor to the base and the first output terminal of the first NPN transistor; The emitter of the second NPN transistor is connected to the input end of the second NPN transistor via the fourth resistor, the collector of the second NPN transistor is connected to the second output end, and the collector of the second PNP transistor is connected to the second At the base of NPN transistor,
The emitter of the second PNP transistor is connected to the second output terminal via the fifth resistor, and the base of the second PNP transistor is connected to the cathode of the second voltage regulator diode via the ninth resistor. Of the voltage between the input terminal and the second output terminal of the second PNP transistor is detected by the change of the base current of the second PNP transistor to control the second NPN transistor to connect the second input terminal and the second output terminal. And a second capacitor for bypassing the AC signal so that the AC signal is not applied between the base and the emitter of the second PNP transistor. And connecting a sixth resistor and a seventh resistor of the same value in series between the first output end and the second output end,
And a seventh resistor are connected to the non-inverting input terminal of the comparison amplifier, and the output terminal of the comparison amplifier is connected via the third capacitor to the base of the first PNP transistor and the fourth capacitor. An electronic choke circuit characterized in that it is connected to the base of a second NPN transistor through the output terminal of the comparison amplifier and the inverting input terminal thereof.

(Embodiment) FIG. 1 is a circuit diagram in which an electronic choke circuit related to the present invention is used as a power supply circuit. Reference numeral 1 is an electronic choke circuit, 2 is a power source, and 3 is a load side circuit. The electronic choke circuit 1 is connected to the power supply 2 at terminals A and B, and is connected to the load side circuit 3 at terminals C and D.

TR ₁ and TR ₄ are PNP transistors (hereafter referred to as transistors), TR ₂ and TR ₃ are NPN transistors (hereafter referred to as transistors), ZD ₁ and ZD ₂ are constant-current diodes, and R ₁ , R ₂ and ... R ₁₁ are resistors. , C ₁ , C ₂ , C ₄ , C ₅ , C ₇ are capacitors. The resistor R ₁₁ is for biasing the constant voltage diodes ZD ₁ and ZD ₂ . Positive terminal bias current of the power supply _{2 A-ZD 1 -R 11 -ZD} 2 - by flowing at the root of the negative terminal of the power source 2, a constant voltage of the constant voltage diode ZD _1, ZD ₂ is maintained.

Constant voltage diodes ZD _1, resistors R _2, R _3, transistor TR ₂ and the resistor R ₄ constitute a detection circuit terminals A, detects a change in voltage between the C, by the collector current of the transistor TR ₂ of the transistor TR ₁ It controls the collector-emitter voltage.

First, the operation when the current flow into the load side circuit 3 is increased will be shown. When a current flows through the resistor R ₁ and the transistor TR ₁ , the voltage drop across the resistor R ₁ increases, and the voltage between the terminals A and C increases, the above-mentioned detection circuit (ZD ₁ , resistors R ₂ and R ₃ , transistor TR ₂ The current flowing through the base-emitter of the resistor R ₄ ) increases.

Wherein the resistance R _2, R ₃ current through ...... R ₄ is small, R _2,
Since the change of the drop voltage due to R ₃ and R ₄ can be ignored, the detection voltage of the detection circuit is dominated by the voltage between the base-emitter of the constant voltage diode ZD ₁ and the transistor TR ₂ . Increasing the current flowing through the detection circuit becomes the increase in the base current of the transistor TR ₂ increases the collector current of the transistor TR _2.
Thus this increase an increase of the base current of the transistor TR _1, and a small collector-emitter voltage of the transistor TR _1.

That is, the resistance R terminals A to offset ₁ to flowing current the voltage drop increased resistance R ₁ caused by the increased by the voltage drop decrease of the transistor TR _1, the voltage drop across C is constant. The voltage drop decreases the transistor TR ₁ of the resistor R _1, which occurs by a current flowing through the resistor R ₁ is reduced
Since this is offset by an increase in the collector-emitter voltage drop, the voltage drop between terminals A and C is constant in this case as well.

On the other hand, resistor R ₆ , transistor TR ₃ and constant voltage diode Z
A detection circuit composed of D ₂ , resistors R ₇ and R ₈ , a transistor TR ₄ , and a resistor R ₉ also detects an increase / decrease in the DC current flowing from the terminal D. As described above, when the current flow into the load circuit 3 increases, the base current of the transistor TR ₄ increases and the collector current of the transistor TR ₄ increases. Therefore, this increase will increase the base current of the transistor TR ₃ .
The collector-emitter voltage of transistor TR ₃ is low.

That is, the terminal B to offset the voltage drop increased resistance R ₆ caused by the current flowing through the resistor R ₆ is increased by the voltage drop decrease of the transistor TR _3, the voltage drop across D is kept constant.

If the current flowing into the load circuit 3 decreases, the resistance R ₆
Since the voltage drop across resistance decrease R ₆ due to the current is reduced which flows in the to cancel by the collector-emitter voltage drop increase of the transistor TR _3, terminal B also in this case,
The voltage drop across D is kept constant.

As described above, even if the outflow current from the terminal C and the inflow current from the terminal D are changed, the voltage drop between the terminals A and C and between the terminals B and D in the electronic choke circuit 1 becomes constant. ing.

Secondly, even if the data signal shown in FIG. 2 is generated on the load side, the electronic choke circuit 1 does not affect the detection circuit of this signal.

In the electronic choke circuit 1 of the present invention, an AC signal bypass circuit is provided so that the AC signal does not flow to the detection circuit. In the embodiment, capacitors C ₁ and C ₂ and a resistor R ₅ are provided so that an AC signal does not flow in the transistor TR ₂ . Further, capacitors C ₄ , C ₅ and R ₁₀ are provided so that an AC signal does not flow in the transistor TR ₄ .

The point E represents an intermediate voltage between the terminals C and D.

First, FIG. 3 shows a part of a circuit diagram in which an electronic choke circuit is applied to a home telephone or the like. This home telephone superimposes a data signal on a power supply line (transmission line 4) connecting the master unit 5 and the telephone set 6, and power supply and data transmission will be described below.

Power is supplied from the power supply 52 provided in the base unit 5 to the load 63 of the telephone by the following route.

(Master device 5) Power supply 52-Electronic choke circuit 51-Transmission line 4-
(Telephone 6) Electronic choke circuit 61-Load 63.

On the other hand, data transmission is performed between the base unit 5 and the telephone 6 by the following route.

(Master device 5) Data transmission / reception circuit 54-Capacitors 55 and 56-Transmission line 4- (Telephone 6) -Capacitors 65 and 66-Data transmission / reception circuit 64.

The role of the electronic choke circuit is to prevent the AC component from the transmission line 4 from flowing into the power supply 52 and the load 63.

The signals shown in FIG. 2 are data signals used for the home bus superimposed on DC, and most of them flow to the electronic choke circuit in the following route in FIG.

Further, the data signal is bypassed by C ₂ , C ₁ and C ₄ , C ₅ , and is not amplified by the transistors TR ₂ and TR ₄ . Furthermore, the resistance values of the resistors R ₂ and R ₇ are large. Therefore, the high impedance of the electronic choke circuit due to the transistor TR ₁ and the resistor R ₁ and the transistor TR ₃ and the resistor R ₆ does not decrease, and the impedance seen from the terminals C and D to the electronic choke side is between the terminals A and C. Impedance is transistor TR ₁
(R ₁ × h _FE ) + 1 / h _oe, which is doubled, resulting in 2 × [(R ₁ × h _FE ) + 1 / h _oe ].

However, the impedance between terminals B and D is the same as between terminals A and C.

Therefore, the AC circuit maintains a high impedance and only the DC change is detected by the detection circuit, and the voltage drop between the terminals A and C and between the terminals B and D of the electronic choke circuit becomes constant as described in the first section.

Thirdly, when vertical noise is generated on the load side, the operation of the electronic choke circuit having a low impedance with respect to this vertical noise and attenuating the vertical noise will be described.

FIG. 4 is a circuit diagram of a power supply circuit using an electronic choke circuit 11 in which a circuit for attenuating vertical noise is added. Fifth
The figure shows the vertical noise superimposed on the DC voltage. In addition, terminal C
The vertical noise appearing at the terminal D and the terminal D has the same phase as that of the data signal. U ₁ is an operational amplifier as an example of a comparison amplifier, R ₁₂ ,
R ₁₃ and R ₁₄ are resistors, and C ₃ and C ₆ are capacitors. The capacitors C ₃ and C ₆ have the same capacitance.

The connection point of resistors R ₁₂ and R ₁₃ (hereinafter referred to as point E) is resistor R
₁₂ and resistor R ₁₃ have the same resistance value, so terminal C and terminal D
It is an intermediate voltage.

When the data signal shown in FIG. 2 is applied between the terminals C and D, the voltage at the point E does not change and the input of the operational amplifier U ₁ is constant. Therefore, the output of the operational amplifier U ₁ is the same as the input, so that it does not affect the transistors TR ₁ and TR ₃ . Therefore, the vertical noise attenuating circuit becomes unresponsive to the data signal.

Next, as shown in FIG. 6A, the operation of the vertical noise attenuating circuit to suppress the increase of the voltage of the vertical noise will be described.

Since the voltages at the terminals C and D are rising, the midpoint between the resistors R ₁₂ and R ₁₃ and the point E are also in a rising state. Therefore the input voltage to the output terminal of the non-inverting input terminal of the operational amplifier U _1, i.e. to become larger than the inverting input terminal, an output voltage of the operational amplifier U ₁ is increased. As a result, the base voltage of the transistor TR ₁ is increased to lower the base-emitter voltage, and finally the collector-emitter voltage of the transistor TR ₁ is increased.

Therefore, the voltage at the terminal C is lowered.

On the other hand, similarly to the above-mentioned contents, the base voltage of the transistor TR ₃ becomes high, the base-emitter voltage becomes high, and finally the collector-emitter voltage of the transistor TR ₃ becomes low.

Therefore, the voltage at the terminal D is lowered. This is shown in FIG. 6A.

Further, as shown in FIG. 6B, the operation of the vertical noise attenuating circuit to suppress the voltage drop when the voltage of the vertical noise drops will be described.

Since the voltages at the terminals C and D are decreasing, the point E is also in a decreasing state. Therefore the input voltage of the non-inverting input terminal of the operational amplifier U ₁ is the output terminal or smaller than the inverting input terminal, an output voltage of the operational amplifier U ₁ is lower.

This lowers the base voltage of transistor TR ₁ ,
Lower the base-emitter voltage and finally the transistor
Lower the collector-emitter voltage of TR ₁ . Therefore, the voltage at the terminal C is increased. On the other hand transistor TR ₃
Lowers the base voltage, lowers the base-emitter voltage, and finally increases the collector-emitter voltage of the transistor TR ₃ . Therefore, the voltage at the terminal D is increased. This is shown in FIG. 6B.

In the above-described embodiment, the electronic choke circuit 11 has a high impedance for the data signal and a low impedance for the vertical noise, resulting in the attenuation of the vertical noise.

(Effects of the Invention) As described above, when the electronic choke circuit of the present invention is used in a power supply circuit, the voltage drop is kept constant even when the supply current changes, and high impedance is maintained for AC signals. Is. Therefore, the IC or the like can be used at the power supply destination, and when the data is superimposed on the supply current and sent, the data signal is not attenuated. It also has the effect of reducing vertical noise. Further, since it is made of a semiconductor, it can be made compact.

[Brief description of drawings]

1 is a circuit diagram in which an electronic choke circuit, which is a part of an embodiment of the present invention, is used as a power supply circuit, FIG. 2 is a data signal waveform diagram superimposed on DC, and FIG. 3 is an electronic choke circuit in a home telephone. FIG. 4 is a circuit diagram in which an electronic choke circuit according to an embodiment of the present invention is used as a power supply circuit, FIG.
FIG. 6 is a waveform diagram showing the effect of the embodiment circuit of the present invention to cancel noise, and FIG. 7 is a conventional power supply circuit diagram. 1,11 …… Electronic choke circuit, 2 …… Power supply, 3 …… Load side circuit, TR _1,2,3,4 …… Transistor, ZD _1,2 …… Constant voltage diode, R _{1 to} R ₁₄ …… Resistors, C _{1 to} C ₇ ... Capacitors.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kunihiko Oe 1-1-6 Uchisaiwaicho, Chiyoda-ku, Tokyo Nihon Telegraph and Telephone Corporation Examiner Ichiro Horikawa (56) References Japanese Patent Laid-Open No. 61-1160 A)

Claims (1)

[Claims] 1. A cathode of a first constant voltage diode is connected to a first input terminal and an anode of a second constant voltage diode is connected to a second input terminal, and an anode of the first constant voltage diode and a second constant voltage diode are connected to each other. The first resistor is connected between the cathodes of the constant voltage diodes of and the first PNP is connected to the first input terminal via the second resistor.
The emitter of the transistor is connected, and the collector of this first PNP transistor is connected to the first output end.
The collector of the N transistor is connected to the base of the first PNP transistor, the emitter of the first NPN transistor is connected to the first output terminal via the third resistor, and the base of the first NPN transistor is connected to the eighth resistor. The first PNP transistor, which is connected to the anodes of the first constant voltage diodes, detects the voltage change between the first input end and the first output end by the change in the bay current of the first NPN transistor. Control the first
A first capacitor for bypassing the AC signal so that the AC signal is not applied between the base and the emitter of the first NPN transistor, and the voltage between the input terminal and the first output terminal of the first NPN transistor is constant. NPN transistor base and first
Connected to the output end of the second NPN transistor via the fourth resistor to the second input end, the collector of the second NPN transistor is connected to the second output end, The collector of the PNP transistor of is the base of the second NPN transistor,
The emitter of the second PNP transistor is connected to the second output terminal via the fifth resistor, and the base of the second PNP transistor is connected to the cathode of the second voltage regulator diode via the ninth resistor. Of the voltage between the input terminal and the second output terminal of the second PNP transistor is detected by the change of the base current of the second PNP transistor to control the second NPN transistor to connect the second input terminal and the second output terminal. And a second capacitor for bypassing the AC signal so that the AC signal is not applied between the base and the emitter of the second PNP transistor. And connecting a sixth resistor and a seventh resistor of the same value in series between the first output end and the second output end,
And a seventh resistor are connected to the non-inverting input terminal of the comparison amplifier, and the output terminal of the comparison amplifier is connected via the third capacitor to the base of the first PNP transistor and the fourth capacitor. An electronic choke circuit characterized in that it is connected to the base of a second NPN transistor through the output terminal of the comparison amplifier and the inverting input terminal thereof.