JPH077941B2 - Secret story method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention will be described in the following order.

A. Industrial fields of use B. Outline of invention C. Prior art D. Problems to be solved by the invention E. Means for solving the problems F. Action G. Example G-1. Prerequisite Technology G-2. First Example G-3. Second Example H. Effect of Invention A. Industrial Field of Application The present invention is suitable for use in so-called cordless telephones, car telephones, and the like. It is about the secret method.

B. Summary of the Invention The present invention is a confidential communication method in which scramble is performed on the transmitting side and descramble is performed on the receiving side, wherein one of the scramble and the descramble is: However, n is the number of cascade connections, ki is a coefficient, and Di is the delay amount. It is provided with n cascade-connected circuit blocks, and the i-th stage circuit block receives the supplied signal and a predetermined signal. Is added, the added signal is delayed by the delay amount Di, the delayed signal is multiplied by the coefficient ki, and the multiplied signal is fed back as the predetermined signal to be added, and The added signal is output, and the other of the scramble and descramble is However, n is the number of cascade connections, ki is a coefficient, and Di is the delay amount. It is provided with n cascade-connected circuit blocks, and the i-th stage circuit block receives the supplied signal and a predetermined signal. And add the supplied signal to the delay amount Di
Delay, and multiply the delayed signal by the coefficient ki
The multiplied signal is used as the predetermined signal to be added, and the added signal is output, so that the quality of the descrambled signal does not deteriorate, and the number of secret keys can be reduced with a simple circuit configuration. It is designed so that a lot of things can be done and a high confidential story effect can be obtained.

C. Conventional technology In cordless telephones, car telephones, etc., signals are transmitted wirelessly and can be received by anyone. Therefore, a secret communication device is required to prevent leakage of confidential information due to interception by others.

There are various known signal processing methods or secret talking methods in such a secret talking device, which can be roughly classified into a scramble processing method on the frequency axis and a scramble processing method on the time axis. .

D. Problems to be solved by the invention As methods of scrambling on the frequency axis, there are a method of inverting the frequency spectrum, dividing into slots of a plurality of frequency bands on the frequency axis, and replacing these slots or slots. Although a method of inverting the frequency is known in the above, the above method is easy to decipher and the degree of confidentiality is low, and the method described above is a bandpass filter with high characteristics when the degree of confidentiality is increased. However, there is a drawback in that a large number of circuits are required and the circuit scale increases. In addition to this, there is also a secret communication method using a so-called FFT (Fast Fourier Transform) or the like, such as the technology disclosed in JP-A-56-153862, but high-speed digital signal processing involving multiplication is required, The circuit also becomes complicated.

Further, in the case of the method of scrambling each sample value on the time axis, there is generally a problem of spectrum expansion, and the quality of the descrambled demodulated voice deteriorates due to the influence of the transmission characteristics of the transmission path. There are drawbacks.

In view of the conventional situation as described above, the present invention has a large number of secret keys and a high secret effect, does not spread the spectrum, does not deteriorate the quality of demodulated voice after descramble processing, and has a relatively simple circuit configuration. The purpose is to provide such a secret method.

E. Means for Solving the Problems In order to solve the above-mentioned problems, the confidential talking method according to the present invention is a secret talking method in which the transmitting side scrambles and the receiving side descrambles. And one of the descramble is the transfer function , Where n is the number of cascade connections, ki is a coefficient, and Di is the delay amount, and is provided with n cascade-connected circuit blocks, and the i-th circuit block has a predetermined signal and a predetermined signal. Signal, delay the added signal by the delay amount Di, multiply the delayed signal by the coefficient ki, and feed the multiplied signal back as the predetermined signal to be added. , The added signal is output, and the other of the scramble and the descramble is a transfer function. , Where n is the number of cascade connections, ki is a coefficient, and Di is the delay amount, and is provided with n cascade-connected circuit blocks, and the i-th circuit block has a predetermined signal and a predetermined signal. A signal, delaying the supplied signal by the delay amount Di, multiplying the delayed signal by the coefficient ki, and the multiplied signal is the predetermined signal to be added, It is characterized in that the added signal is output.

F. Function Since the cascade connection circuit of each circuit block has digital filter characteristics, there is no spectrum expansion of the input signal. Further, by changing the number of cascade connection stages of each circuit block, the delay amount of the delay means and the coefficient value of the coefficient multiplier, it is possible to secure a large number of keys for the secret code.

G. Example G-1. Technology that is the premise of the present invention First, prior to the description of the embodiments of the present invention, the technology that is the premise of the present invention will be described with reference to the drawings.

As a scrambling process on a time axis for a data (sample value) sequence obtained by sequentially sampling an analog audio signal at a constant cycle, the inventors of the present invention divide the data sequence into blocks for every constant number of samples, and The data (sample value) is exchanged according to a certain rule in the above, and the above block is shifted by one sample with the lapse of time, and the sum of the data arranged at each sample point on the time axis is taken and output. Considered such a treatment.

FIG. 8 shows a specific example of such a scrambling process. In FIG. 8, the number of samples in one block is 4 samples, and the i-th data (sample Value) is xi (see FIG. 8A), four samples xi, xi ₊₁ , xi ₊₂ , x in any one block
By performing a replacement process on i _{+3 according} to a certain rule, a data string in the order of xi, xi ₊₃ , xi ₊₂ , xi ₊₁ can be obtained. Therefore, the input data string x ₁ , x ₂ ,
For x ₃ , ..., As shown in FIG. 8, the data x ₁ to x ₃ in one predetermined block are rearranged in the order of x ₁ , x ₄ , x ₂ , x ₃ ,
Data x ₂ in the next 1 block shifted by 1 sample
~ X ₄ becomes x ₂ , x ₅ , x ₃ , x _{4 and so} on. Similarly, the blocks are sequentially shifted by one sample, and the data in each block is subjected to the replacement process according to the above-mentioned fixed rule. It Then, the data arranged in each sample time point on the time axis, by summing at each sample point, as shown in FIG. 8, for example, _{2x 3 + x 4 + x 6} , 2x 4 + x
₅ + x outputs data such as _7, i.e. generally xi + xi _-2 + 2xi _-3
Output data is obtained.

In order to obtain such output data, generally, an FIR (finite impulse response) filter 100 having a configuration as shown in FIG. 9 may be used. This FIR filter 100 has an adder 1
01, a delay circuit 102, and coefficient multipliers 103a to 103n. The delay amounts at the signal extraction points from the delay circuit 102 to the coefficient multipliers 103a to 103n are D ₁ , D ₂ , ... When the coefficients of the multipliers 103a to 103n are k ₁ , k ₂ , ..., K n, the transfer function T _F (D) of the FIR filter 100 is Becomes When such a FIR filter 100 is used as a scramble circuit on the transmission side of the confidential device, it can be confirmed that the greater the coefficient ki and the larger the delay amount Di, the higher the confidential effect.

On the other hand, as a descramble circuit on the receiving side,
Using an IIR (Infinite Impulse Response) filter 110 as shown in FIG. 10 for performing the reverse processing having the reverse characteristic with respect to the FIR filter 100 can reduce S / N due to interference between adjacent samples. It is desirable from the viewpoint of preventing deterioration. This I
The IR filter 110 has a symmetrical circuit configuration corresponding to that of the FIR filter 100 of FIG. 9, and parts corresponding to those of FIG. 9 are designated by the same reference numerals. II like this
The transfer function T _I (D) of the R filter 110 is Becomes

By the way, in order for the circuit system having the feedback loop such as the IIR filter 110 to operate stably without causing oscillation or the like, the coefficient ki is restricted, and in the general configuration as shown in FIG. , It is necessary to set each coefficient ki to be small, so that a sufficient confidential story effect cannot be expected.

Therefore, the inventors of the present invention further improve the above-mentioned technology,
(EN) Provided is a secret-speaking method capable of performing stable decoding (descramble) processing operation without deterioration of sound quality of an output signal after complex processing, that is, descramble processing, and realizing a sufficient confidential-speech effect.

G-2. First Embodiment FIG. 1 shows a circuit configuration for performing a scrambling process on the transmitting side of a secret talking device to which the secret talking method according to the first embodiment of the present invention is applied, and FIG. 6 shows a circuit configuration for performing descramble processing on the receiving side of the device.

In FIG. 1, the analog audio signal to be transmitted is supplied to the input terminal 11. This analog audio input signal is sent to an A / D (analog / digital) converter 13 via an LPF (low pass filter) 12 and converted into a digital signal. Here, when the transmission frequency band of the analog audio signal is set to, for example, 300 Hz to 3.4 kHz, the cutoff frequency of the LPF 12 is set to about 3.4 kHz to 4 kHz, and the sampling frequency _S in the A / D converter 13 is set to about 8 kHz or more. do it.

The digital audio signal from the A / D converter 13 is sent to a cascade connection circuit of a plurality of circuit blocks 21, 22, ... Which is a main part of the scramble circuit. Here, each circuit block, for example, 21 is an adder 21A to which an input signal (output signal from the A / D converter 13) is supplied, and a delay circuit 21D that delays the output signal from this adder 21A, The output signal from the delay circuit 21D includes a coefficient multiplier 21C that multiplies the coefficient k ₁ by a coefficient multiplier. The output signal from the coefficient multiplier 21C is fed back to the adder 21A and added to the input signal. It is adapted to be taken out as an output signal of the circuit block 21. Other circuit blocks 22 and the like have the same configuration, and are cascaded or cascaded so that the output signal from the preceding circuit block, for example 21, is sent to the next circuit block, for example, the adder 22A of 22. There is.

In each of these circuit blocks 21, 22, ...
21D, 22D, ... Can be configured by using a memory such as a RAM (random access memory) or a shift register, and the number of delay steps or the number of stages is the sampling frequency _S
Is set to 8 kHz, the maximum is 1000 to 2000, and the delay amount can be variably set according to the secret code data from the scramble control circuit 20 within the range of the number of stages or less. Further, each coefficient k ₁ , k ₂ ,, of each coefficient multiplier 21C, 22C, ...
Is larger than -1 and smaller than 1 (-1 <k ₁ , k ₂ ,
... <1) Within the range, it is variably set according to the secret code data from the scramble control circuit 20.

Final output signal from the cascade connection circuit of these circuit blocks 21, 22, ... (Output signal from the final stage circuit block)
Is sent to the D / A converter 15 for digital / analog conversion, and becomes an analog signal through the LPF 16,
It is taken out from the output terminal 17. The cutoff frequency of the LPF 16 may be set to a value that is equal to or higher than the transmission frequency band of the analog audio signal and that can remove the sampling clock signal component, for example, about 4 kHz.

The analog signal obtained from the output terminal 17 is transmitted after being subjected to, for example, AM modulation or FM modulation for wireless transmission,
By receiving at the receiver, for example, AM demodulation or
FM demodulation or the like is performed to form an analog signal similar to the output from the output terminal 17, and the analog signal is supplied to the input terminal 61 in FIG.

Next, in the circuit configuration for performing descramble processing on the receiving side shown in FIG. 2, the analog signal supplied to the input terminal 61 is sent to the A / D converter 63 via the LPF 62 and converted into a digital signal. It

The output signal from the A / D converter 63 is sent to a cascade connection circuit of a plurality of circuit blocks 71, 72, ... Which is a main part of the descramble circuit. Each of these circuit blocks 71, 7
2, ... are circuit blocks 2 on the transmitting side (Fig. 1)
It has a configuration that reverses the characteristics for 1,22, ... That is, for example, the circuit block 71 includes an adder 71A to which an input signal is supplied, a delay circuit 71D that delays the input signal, and a coefficient multiplier 71C that multiplies the output signal from the delay circuit 71D by a coefficient k _1. The output signal from the coefficient multiplier 71C is sent to the adder 71A to be added to the input signal.
The other circuit blocks 72 and the like have the same circuit configuration.
Here, each adder 71 of each circuit block 71, 72, ...
In A, 72A, ..., it is necessary to perform an arithmetic operation opposite to that of each adder 21A, 21A, ... Of each corresponding circuit block 21, 22 ,. When signals are added, the corresponding adder 71A needs to subtract the signals. This is the coefficient multiplier 71C,
The polarities of the output signals from the 72C, ..., May be inverted and added, and the polarities of the coefficients k ₁ , k ₂ ,,, etc. may be inverted between the transmitting side and the receiving side (however, the insulation values are the same). ) May be done.

Each delay circuit 71D, 72D, of each of these circuit blocks 71, 72, ...
The secret code data from the descramble control circuit 70 is sent to each of the coefficient multipliers 71C, 72C ,.
By matching this secret code data with the secret code data from the scramble circuit 20 on the transmitting side, the delay circuits 21D, 22D on the transmitting side correspond to the delay amounts of the delay circuits 71D, 72D ,. Is set to be equal to each delay amount of each coefficient multiplier, and each coefficient value of each coefficient multiplier 71C, 71C, ... Is equal to each coefficient value of each corresponding coefficient multiplier 21C, 22C ,. Equally opposite in polarity)
Is set. At this time, each circuit block 71, 72, on the receiving side
... have the opposite characteristics to the respective circuit blocks 21, 22, ... on the transmitting side and the reverse processing is performed, and the entire cascade connection circuit of these respective circuit blocks 71, 72, ... is also transmitted. Inverse characteristics corresponding to the characteristics of the entire cascade connection circuit of the circuit blocks 21, 22, ...

That is, in the transfer function T _S (D) of the cascade connection circuit of each circuit block 21, 22, ... On the transmission side, generally, n blocks are connected in cascade, and the delay amount of each delay circuit is D ₁ , D ₂ , ..., D
n, when the coefficients of each coefficient multiplier are k ₁ , k ₂ , ..., kn, Becomes Also, similarly, each circuit block 71, 72,
The transfer function T _D (D) in which n are cascaded is Becomes

Furthermore, the final output signal from the cascade connection circuit of the circuit blocks 71, 72, ... (The output signal from the circuit block at the final stage)
Is converted into an analog signal via the D / A converter 65 and the LPF 66, so that the original analog audio signal supplied to the transmission-side input terminal 11 is restored and taken out from the output terminal 67.

Therefore, the above equation as the scramble processing characteristic of the transmitting side and the above equation as the descramble processing characteristic of the receiving side have mutually inverse characteristics, and the descramble processing as a complete inverse processing to the scramble processing is realized. Therefore, as the demodulation output signal from the output terminal 67, a high-quality audio signal without adverse effects such as mutual interference (crosstalk) between adjacent samples can be obtained. Further, the signal scrambled on the transmitting side and taken out from the output terminal 17 has not only the secret characteristic that it is inaudible by itself, but also as the number of keys of the secret code corresponding to the number of patterns of the scramble process, The number of intermittent stages of the circuit blocks 21, 22, ..., the delay amount of the delay circuits 21D, 22D ,.
22C, ..., Each coefficient value k ₁ , k ₂ , ... And a sufficient number of keys for practical use, and a high confidential story effect can be obtained. Further, in terms of the circuit configuration, it is only necessary to cascade-connect a plurality of circuit blocks each including a delay circuit such as an adder, a coefficient multiplier, and a memory. Even if the number of connection stages is about two or three, a sufficient confidential story effect can be realized.
The configuration is extremely simple compared to high-speed digital signal processing circuits such as T. Here, for the coefficient multiplier,
By selecting a value such as 1-2 ^-N as the coefficient, the configuration can be relatively simple as will be described later, and the overall circuit scale can be further suppressed. Further, since the above equations and equations show predetermined digital filter characteristics, the spectrum shape of the input signal is changed but there is no spectrum expanding action, and the adverse effect of the spectrum expansion of the transmitted signal can be prevented.

By the way, as the coefficient multipliers 21C, 22C, ... Or 71C, 72C, ..., general multipliers may be used, but by selecting a value such as 1-2 ^−N as the coefficient value, the third multiplier It can be realized by an extremely simple circuit as shown in the figure.

In FIG. 3, an example in which 4-bit data is multiplied is shown to simplify the description.
The same applies when processing data of more bits. The memory 51 in FIG. 3 corresponds to the delay circuit 21D and the like, and the 4-bit data from the memory 51 is sent to the bit shift circuit 53 via inverters 52a to 52d, respectively. The bit shift circuit 53 shifts the input data to the LSB (least significant bit) side by N bits (so-called arithmetic right shift) and outputs it. The output data from the bit shift circuit 53 is sent to an adder (full adder) 54, added with the data from the memory 51, and sent to output terminals 55a to 55e. Therefore, output terminals 55a-55e
From, data obtained by multiplying the data from the memory 51 by the coefficient 1-2 ^-N is extracted.

The above-mentioned transmitting side circuit and receiving side circuit may be replaced with each other, that is, the circuit of FIG. 2 is used for the scrambling process on the transmitting side, and the circuit of FIG. 1 is used for the scrambling process on the receiving side. May be used. However, since the circuit of FIG. 1 includes a feedback loop, and the response to the input generally lasts for a long time, when it is used on the receiving side, it can be The response component has a long tail, and when it is used on the transmitting side, it is equivalent to rearranging the samples over a long section, and the secret story effect is improved. Therefore, the circuit of FIG. 1 is more preferably applied to the scramble processing on the transmission side than when it is used on the reception side.

G-3. Second Embodiment Next, FIG. 4 is a circuit configuration example of the transmitting side of the confidential communication device according to the second embodiment of the present invention, and FIG. 5 is a circuit configuration example of the receiving side. The same reference numerals are given to parts corresponding to those shown in FIGS. 1 and 2, and description thereof will be omitted.

First, in FIG. 4, between the A / D converter 13 and the first-stage circuit block 21, a circuit unit 30 for inverting the polarity of data (sample value) every other sample is inserted and connected. That is, the output signal from the A / D converter 13 is supplied to one selected terminal a of the changeover switch 31 serving as a gate circuit, and the other selected terminal of the changeover switch 31 via the polarity inverting circuit 32. b. Here, two kinds of switching operation modes are preset for the switching operation control circuit 33, and one of the above two kinds of switching operation modes is selected in accordance with the secret code data from the scramble control circuit (scramble controller) 20. One of them is selected, and the changeover operation of the changeover switch 31 is controlled in this selected mode. As the above-mentioned two kinds of changeover operation modes, a mode in which the terminal a of the changeover switch 31 is always selected and the output signal from the A / D converter 13 is directly sent to the circuit block 21 of the next stage (hereinafter referred to as non-inversion mode or direct mode). And)
The terminals a and b of the changeover switch 31 are alternately selected for each sample, the polarity of the data (sample value) of the output signal from the A / D converter 13 is inverted every other sample, and the circuit block 21 in the next stage is selected. It is assumed that the mode is to be sent to (to be referred to as the reverse mode hereinafter).

Here, in the inversion mode, that is, in the mode in which the polarity of the data is inverted every other sample, the input data sequence as shown in FIG. 6A is converted into the data sequence as shown in FIG. Will be sent to the stage circuit block 21. The data string shown in FIG. 6B is equivalent to an input signal multiplied by a signal having a frequency _S / 2 that is 1/2 the sampling frequency _S , and the multiplied output signal is sampled and A / D converted. There is no spread of the spectrum. In addition, the polarity reversing circuit 32 inverts all bits from the MSB (most significant bit) to the LSB (least significant bit) when the input digital data is represented by 2's complement and inverts the same. The operation is such that "1" is added to the data.

A so-called peak limit circuit 40 for limiting the peak value of the input signal is provided between the D / A converter 15 and the final stage of the cascade connection circuit of the circuit blocks 21, 22 ,. Inserted and connected. Such a peak limit circuit 40
Although various configurations are conceivable, for example, FIG. 4 shows an example of a circuit configuration for limiting the peak of so-called 2's complement display data.

That is, this peak limit circuit 40 is
And a maximum value comparison circuit 42 that compares the input data with the maximum value Ma
And a minimum value comparison circuit 43 for comparing the input data with the minimum value (maximum value on the negative side) Mi, a maximum value generation circuit 44, and a minimum value generation circuit 45. Circuit 42,43
Depending on the comparison output from, the input signal data xi, the maximum value Ma from the maximum value generation circuit 44 or the minimum value Mi from the minimum value generation circuit 45 is selected and output. In this case, when the data xi of the input signal (final output signal of the cascade connection circuit of the circuit blocks 21, 22, ...) Is Mi ≦ xi ≦ Ma, the input data xi is output as it is, and when Ma <xi, the maximum value Ma is output. Is output, and when Mi> xi, the minimum value Mi is output.

Therefore, the peak and limit circuit 40 is, for example, shown in FIG.
When the data string as shown in is input, the minimum value Mi
From the maximum value to the maximum value Ma
Due to being limited to Ma, the output data string is shown in FIG. 7B.
As shown in.

Next, in the receiving side circuit configuration of FIG. 5, the transmitting side circuit section 30 described above is provided between the final stage of the cascade connection circuit of the circuit blocks 71, 72, ... And the D / A converter 65. Corresponding circuit section 80
Is inserted and connected. This circuit section 80 is a changeover switch
It has a configuration similar to that of FIG. 4 having 81, a polarity reversing circuit 82 and a switching operation control circuit 83, and performs the same operation. That is, when the non-inversion mode is selected in the transmission side circuit unit 30, the non-inversion mode is also selected in the reception side circuit unit 80 by the confidential code / data from the descramble control circuit 70. Controlled, the changeover switch 81 is always connected to the terminal a side, and the circuit blocks 71, 72, ...
The output signal from the cascade connection circuit of is directly sent to the D / A converter 65 of the next stage. Further, when the inversion mode is selected in the transmission side circuit unit 30, the reception side circuit unit 80
However, the reverse mode is selected and the selector switch 81 is
, The data of the output signal from the cascade connection circuit is inverted in polarity every other sample and sent to the D / A converter 65 in the next stage. In this case, the original data string (or the data string in which the polarities of all the data are reversed) is obtained by reversing the polarity of the data on the transmitting side every other sample every other sample. be able to.

According to the second embodiment, not only the number of steps and sampling frequency of the delay circuit, the coefficient value of the coefficient multiplier, and the number of connection stages of the circuit block described above can be used as the key of the secret code, Whether or not the polarity reversal operation is performed every other sample in the circuit unit 30 or the like, that is, which of the above two switching control operation modes is selected can be used as the key of the secret code, so the number of keys is further increased. However, the secret story effect is enhanced.

Furthermore, according to this second embodiment, the circuit blocks 21,2
Since the large instantaneous peak generated at 2, ... is limited within the range from the minimum value Mi to the maximum value Ma in the peak limit circuit 40, the average modulation degree of the transmission output signal can be increased. Also, it can contribute to the prevention of adverse effects due to overflow.

This is circuit block 2 in the scramble circuit.
There is a feedback loop inside 1,22, ..., and when scrambling, the sample values are equivalently rearranged while overlapping, and the added output is output. Since the data (sample value) is added, there is a possibility that a scrambled output having a large peak is instantaneously generated although the probability is low.
In this way, when the dynamic range of the transmission output signal becomes large, when transmitting with AM modulation or especially FM modulation,
In order to transmit the above-mentioned large peak value normally, the average degree of modulation must be lowered, which causes a problem such as S / N deterioration of the received signal. On the other hand, by limiting the peak value by the predetermined values Mi and Ma as in the above-described embodiment of the present invention, it is possible to increase the average modulation degree and improve the reception S / N. On the other hand, the D / A converter 15
In the case of considering the limitation due to the number of effective bits in the above, if the scrambled output signal is overflowed, for example, the adverse effect such as the sign inversion in the case of the 2's complement display data will occur. Even so, the peak limit circuit 40 is effective.

H. Effects of the Invention As is apparent from the above description, since the scrambling process on the transmitting side and the descramble process on the receiving side are opposite processes having mutually opposite characteristics, the receiving side As the final output signal (demodulation output signal) of, a high-quality audio signal without mutual interference between adjacent samples can be obtained. As the number of keys of so-called secret code corresponding to the number of scramble processing patterns, the number of connection stages of the circuit block, the number of delay steps in the delay circuit, the sampling frequency and the coefficient of the coefficient multiplier, and the polarity inversion every other sample. Whether or not the mode is selected and a sufficient number of keys for practical use can be secured, and a high secret story effect can be obtained.
Moreover, the circuit configuration is relatively simple. In addition, the peak
Since the limit circuit limits the large instantaneous peak generated during scrambling with a predetermined value, the average degree of modulation during transmission can be increased and S / N can be improved. Can also contribute to the prevention of

[Brief description of drawings]

FIG. 1 is a block circuit diagram showing a schematic configuration of a transmission side circuit of a confidential communication device to which a confidential communication method according to a first embodiment of the present invention is applied, and FIG. 2 is a reception side circuit of the first embodiment. FIG. 3 is a block circuit diagram showing a schematic configuration, FIG. 3 is a block circuit diagram showing a specific example of a coefficient multiplier, and FIG. 4 is a transmission side of a secret talking device to which a secret talking method according to a second embodiment of the present invention is applied. FIG. 5 is a block circuit diagram showing a schematic configuration of a circuit, FIG. 5 is a block circuit diagram showing a schematic configuration of a receiving side circuit of the second embodiment, and FIG. 6 is a time for explaining a polarity reversal operation every other sample.・ Chart, FIG. 7 is a time chart for explaining the peak limit operation, FIG. 8 is a view for explaining the scramble processing operation of the technique which is the premise of the present invention, and FIG. 9 is a scramble for the technique. Block diagram showing the processing circuit, Figure 10 is the same technology It is a block diagram showing a descrambling circuit. 12,16,62,66 …… LPF (low pass filter) 13,63 …… A / D converter 15,65 …… D / A converter 20 …… Scramble control circuit 21,22 …… Circuit block 21A, 22A …… Adder 21D, 22D …… Delay circuit 21C, 22C …… Coefficient multiplier 31,81 …… Changeover switch 32, 82 …… Polarity inverting circuit 33, 83 …… Switching operation control circuit 40 …… Peak limit Circuit 70 …… Scramble control circuit 71,72 …… Circuit block 71A, 72A …… Adder 71D, 72D …… Delay circuit 71C, 72C …… Coefficient multiplier

Claims (1)

[Claims] 1. A secret communication method in which a transmitting side scrambles and a receiving side descrambles, wherein one of the scramble and the descramble is a transfer function. However, n is the number of cascade connections, ki is a coefficient, and Di is the delay amount. It is provided with n cascade-connected circuit blocks, and the i-th stage circuit block receives the supplied signal and a predetermined signal. Is added, the added signal is delayed by the delay amount Di, the delayed signal is multiplied by the coefficient ki, and the multiplied signal is fed back as the predetermined signal to be added, and The added signal is output, and the other of the scramble and descramble is the transfer function. However, n is the number of cascade connections, ki is a coefficient, and Di is the delay amount. It is provided with n cascade-connected circuit blocks, and the i-th stage circuit block receives the supplied signal and a predetermined signal. And add the supplied signal to the delay amount Di
Delay, and multiply the delayed signal by the coefficient ki
The secret signal method, wherein the multiplied signal is set as the predetermined signal to be added, and the added signal is output.