JPH078147B2 - Inverter circuit - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an inverter circuit used in a discharge lamp lighting device or the like.

(Prior Art) FIG. 2 shows a discharge lamp lighting device using a conventional inverter circuit. A series circuit of switching elements Q ₁ and Q ₂ is connected to the DC power source E, and diodes D ₁ and D ₂ are connected in antiparallel to the switching elements Q ₁ and Q ₂ , respectively. The DC power source E includes an AC rectified and smoothed. A series circuit of an oscillation driving transformer T, a current limiting inductance L, a load lamp R, and a capacitor C ₁ is connected to both ends of the switching element Q ₂ , and a preheating current is supplied to a non-power source side of the lamp R to a bipolar filament. , And a capacitor C ₂ which forms an LC series resonance circuit together with the inductance L is connected. The switching element Q ₁ is driven by the output of the transformer T through the resistor R _3, and the switching element Q ₁ is triggered by a voltage level obtained by dividing the output voltage thereof by the resistors R ₁ and R ₂ of the detection circuit S. It is driven by an oscillator circuit 1 such as a stable multi circuit.

FIG. 3 is a waveform diagram showing operation waveforms of the respective elements of FIG. 2, and the operation of the discharge lamp lighting device of FIG. 2 will be described with reference to this. Assuming that the monostable multi-oscillation circuit 1 is triggered at point A, the switching element Q ₁ is driven by the output of the oscillation circuit 1. Then, when the switching element Q ₁ is turned on, a current flows through the path of the capacitor C ₁ , the lamp R, the capacitor C ₂ , the inductance L, the transformer T, and the switching element Q ₁ , and the time T determined by the time constant of the oscillation circuit 1 After only _one period has passed, the switching element Q ₁ turns off. When the switching element Q ₁ is turned off, a voltage is induced in the secondary winding of the transformer T connected to the conduction side of the switching element Q ₂ by LC resonance due to the inductance L and the capacitor C, and the switching element Q ₂ is turned on, Lamp R, capacitor C ₂ , inductance L,
A current flows in the path of the transformer T, the diode D ₁ , the switching element Q ₂ , the transformer T, the inductance L, and the lamp R. At this time, the switching element Q ₂ is turned on only for the time T ₂ determined by the natural vibration of the capacitor C ₂ and the inductance L. On the other hand, since the current has a delayed phase with respect to the switching element voltage, even after the switching element Q ₂ is turned off, the current flows through the path of the diode D ₂ , the transformer T, the inductance L, the capacitor C ₂ , and the lamp R. to continue. Therefore, the voltage across the switching element Q ₁ becomes the ON voltage of the diode D ₂ , that is, substantially zero voltage, and this is detected by the resistor R ₂ to trigger the oscillation circuit 1. After that, the oscillation is continued by this repetition.

As is clear here, in this kind of inverter circuit,
The oscillation is not started by simply applying the DC power source E,
Some kind of starting means is required.

Therefore, conventionally, as shown in FIG. 4, a DC power source E charges a capacitor C ₃ through a resistor R _4, and the voltage driving switch VS such as SBS is operated by the charging voltage, and a resistor R ₄ is used. Triggered the switching element Q ₁ .

(Problems to be Solved by the Invention) However, as shown in the waveform diagram of FIG. 3, the condition Δt set by this trigger circuit is equal to or longer than the time when the switching element Q ₁ is sufficiently triggered, and the oscillation circuit. The output width of ₁ must be less than T ₁ . If the output width becomes T ₁ or more, the switching elements Q ₁ and Q ₂ will be turned on at the same time. Further, since the determinants of Δt are the internal impedance of the capacitor C ₃ , the operating resistance of the switch VS such as SBS, and the operating impedance of the switching element Q ₁ ,
There are large fluctuation factors due to external factors such as temperature.
As shown in and in the figure, the drive current of the switching element Q ₁ greatly changes. Therefore, considering these, Δ
It was difficult to set t within the required setting range outside the range in which the switching element Q ₁ cannot operate. Furthermore, when a voltage drive type element such as MOSFET is used for the switching element Q ₁ , the input operating impedance becomes very high, and the discharge time of the capacitor C ₃ becomes long, making it more difficult to set Δt. It was

The present invention is provided for the purpose of solving such a conventional problem.

(Means for Solving the Problem) As a first means therefor, the present invention provides a pair of switching elements Q ₁ and Q ₂ that are alternately turned on and off, and the switching element current has a delayed phase with respect to the switching element voltage. And a oscillating circuit 1 which is triggered by a detection output of the detection circuit S and oscillates a drive signal for _one of the switching elements Q1. In the inverter circuit, the self-excited oscillation circuit 2 having a cycle different from that of the oscillation circuit 1
And a logical sum circuit 3 for triggering the oscillating circuit 1 by the logical sum of the oscillation output of the self-excited oscillating circuit 2 and the detection output of the detecting circuit S, and as a second means, 1
In addition to the means, the oscillation start determination circuit 4 for determining the oscillation start of the oscillation circuit 1 is provided, and the output of the oscillation start determination circuit 4 stops the output of the self-excited oscillation circuit 2.

(Operation) At the time of starting, the self-excited oscillation circuit 2 is oscillated, and the level change of the oscillation output and the switching element voltage is detected by the detection circuit S.
The logical sum with the detection output detected in step 3 is obtained by the OR circuit 3,
The OR circuit triggers the oscillation circuit 1.

When the oscillating circuit 1 starts oscillating, the oscillating start judging circuit 4 makes a judgment, and the output thereof stops the oscillation output of the self-excited oscillating circuit 2.

(Embodiment) Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. In FIG. 1, 2 is a self-oscillation circuit such as an astable multi-oscillation circuit,
It has an oscillation cycle different from that of the oscillation circuit 1. 3 is an OR circuit, which detects the voltage level of the switching element Q ₁ by a detection circuit S
The oscillation circuit 1 is triggered by the logical sum of the detection output detected in 1 and the oscillation output of the self-excited oscillation circuit 2. Reference numeral 4 denotes an oscillation discriminating circuit for discriminating the oscillation start of the oscillation circuit 1. When the oscillation start is discriminated, the oscillation of the self-excited oscillation circuit 2 is stopped through the inverter 5 and the diode D ₃ to cut off the oscillation output. It is a thing.

In the above configuration, when the operation starts, the self-excited oscillation circuit 2 is oscillated, and the oscillation circuit 1 is triggered by the logical sum of the oscillation output and the detection output of the detection circuit S via the OR circuit 3.
The oscillating circuit 1 drives the switching element Q ₁ . That is, the oscillation output of the oscillation circuit 1 that drives the switching element Q ₁ in the normal oscillation operation is used as it is.
Is triggered by the self-oscillation circuit 2 via the OR circuit 3. The operation at this time is the same as that in FIG. 3, and since the oscillation circuit 1 is triggered by the rising edge of the oscillation output of the self-excited oscillation circuit 2, there is no need to consider Δt as in the conventional case. Can be started without.

Then, once the oscillation is started, the inverter circuit continues to oscillate by self-oscillation, so that the oscillation output of the self-excited oscillation circuit 2 becomes unnecessary. Therefore, in the oscillation start determination circuit 4, the oscillation circuit 1
The oscillation of the self-excited oscillation circuit 2 is stopped by the discrimination output of the discrimination circuit 4, and the trigger of the oscillation circuit 1 is stopped.

When the control units such as the oscillation circuits 1 and 2 and the discrimination circuit 4 are configured by CMOS or the like, the operation threshold voltage varies, so that the power supply becomes higher than the operation voltage of all the elements, If you do not make it work, it may cause malfunction. Therefore, at this time, if the rise of the power supply is determined, and the self-excited oscillation circuit 2 is operated after setting the constant voltage equal to or higher than the operating voltage of all the elements, a reliable operation can be performed.

Then, the same applies to the switching element Q _1, necessary to from a power supply voltage of the control unit to be operable voltage or more control output signal voltage of the switching element Q _1, to the control unit signals are output There is also. For example, when the switching element Q ₁ is a transistor, the controllable voltage is 0.6 V or higher, but when the FET is a FET, the controllable voltage is about 5 V, so the necessity is great.

(Effect of the Invention) According to the present invention, a self-excited oscillation circuit 2 having a cycle separately from the oscillation circuit 1, and a logical sum of the oscillation output of the self-excited oscillation circuit 2 and the detection output of the detection circuit S are used. Since the OR circuit 3 for triggering the oscillation circuit 1 is provided, there is no need for consideration as in the conventional case, and the start-up can be performed without any problem.

Further, in the present invention, the oscillation start determination circuit 4 for determining the oscillation start of the oscillation circuit 1 is provided, and the output of the oscillation start determination circuit 4 is used to stop the output of the self-excited oscillation circuit 2. Waste can be prevented.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing a conventional example, FIG. 3 is an operation waveform diagram, and FIG. 4 is a circuit diagram of a trigger portion of an oscillation circuit. 1 ...... oscillator circuit, 2 ...... self-excited oscillation circuit, 3 ...... OR circuit, 4 ...... oscillation start discriminating circuit, Q _1, Q ₂ ...... switching element, S ...... detection circuit.

Claims (2)

[Claims] 1. A pair of switching elements (Q ₁ ) (Q ₂ ) which are alternately turned on and off are provided, and the switching element current is in a delay phase with respect to the switching element voltage.
A detection circuit (S) that detects a change in the level of the switching element voltage, and an oscillation circuit (1) that is triggered by the detection output of this detection circuit (S) and oscillates a drive signal for _one switching element (Q ₁ ). In an inverter circuit equipped with
The self-excited oscillation circuit (2) having a cycle different from that of the oscillation circuit (1), and the oscillation circuit by the logical sum of the oscillation output of the self-excited oscillation circuit (2) and the detection output of the detection circuit (S). An inverter circuit comprising an OR circuit (3) for triggering (1). 2. An oscillation start discrimination circuit (4) for discriminating the oscillation start of the oscillation circuit (1) is provided, and the output of the oscillation start discrimination circuit (4) stops the output of the self-excited oscillation circuit (2). The inverter circuit according to claim 1, wherein: