JPH0785277B2 - Coin tester operating method - Google Patents

Abstract

A self-tuning coin testing apparatus having a coin sensor circuit which produces an output signal indicative of a parameter characteristic of the coins which are tested by the coin sensor and a programmed microprocessor which stores an initial acceptance limit, determines whether the output signal from the coin sensor is indicative of a valid coin, stores a signal based on the output signal for each valid coin, calculates a statistical function based on the stored signal, and finally computes and stores a new acceptance limit based on the stored signals for a predetermined number of previously accepted coins. The statistical function, is preferably weighted so that it is based upon values for only a predetermined number of the most recently accepted coins so that a recent average is maintained.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD This invention relates to coin authenticity and unit inspection, and more particularly to an unadjusted self-test device for coin testing.

[0002]

BACKGROUND ART In coin inspection technology, the interaction between an object and a low-frequency electromagnetic field is the material composition of the object, and therefore whether or not the object is an acceptable coin, and if acceptable,
It has long been recognized that it can be used to indicate at least part of that unit. See, for example, U.S. Pat. No. 3,059,749. It has also been recognized that this low frequency test may be conveniently combined with one or more high frequency tests. See, for example, US Pat. No. 3,870,137 assigned to the assignee of the present application. Most known electronic coin testing devices have components with somewhat different values within tolerance and to compensate for changes in component positioning that occur during fabrication of the coin testing device. At least one tuning element and at least one tuning adjustment are required for each coin test performed at. For example, in low frequency coin testing equipment that uses a bridge circuit, the bridge circuit is usually tuned at the factory by placing a known acceptable coin in the test position to balance the bridge.

Another problem that has long been recognized in coin testing technology is the aging of components, changes in the environment of coin testing equipment such as changes in temperature and humidity, and in electronic coin testing equipment. The question is how to compensate for similar non-constructive changes that result in undesirable changes in the operating characteristics of electronic circuits.

Re-adjustment of an electronic coin testing device by a service technician is one known answer to the problem of component aging, but this re-adjustment is expensive and only a temporary solution to that problem. Do not give. Meanwhile, another compensating circuit has been developed to solve this environmental compensation problem. For example, 1981 10
See U.S. Pat. App. No. 308,548, filed February 2, assigned to the assignee of the present invention. In addition, improved transmission / reception methods and devices have been developed that eliminate the need for tuning adjustments or separate compensation circuits. See U.S. Patent Application No. 428,467 assigned to the assignee of the present application.

[0005]

SUMMARY OF THE INVENTION The present invention is directed to a simple and cost effective method and apparatus for setting coin acceptance limits to eliminate compensation problems. INDUSTRIAL APPLICABILITY The present invention can be used in a wide range of electronic coin tests for measuring a parameter indicating the acceptability of coins. According to the invention, the coin acceptance limits for the coin test are set and readjusted by the device itself on the basis of a statistical function calculated over the parameters measured from the coin test on a given number of previously accepted coins.

The object of the present invention is directed to the automatic updating of a more appropriate test acceptance criterion, and a coin testing device according to the invention provides a test means for producing a test value characteristic of a test coin, and a test acceptance criterion. The processing unit has a storage unit for storing the test value and compares the test value with the stored test acceptance criterion to determine whether or not the test coin is acceptable.
And the processing means counts the number of test times for each acceptance judgment,
An average value based on the currently accepted test value (F) and the stored test acceptance standard ((C-1) F old average) weighted by the number of tests (C) for the allowed coins up to that point. (F new average) is calculated, and for each acceptance judgment of each test, the test acceptance criterion stored in the storage unit is used as the acceptance criterion because it is used for coins to be tested subsequently. Each time the test count value is updated and the test count value reaches a predetermined upper limit value (for example, 32), the test count value is set to a preset value that is a predetermined positive integer smaller than the upper limit value (for example, 1).
It has been reset to 6). According to the configuration of the present invention, past test results are appropriately reflected when the acceptance criteria are updated, the current test results are not underestimated due to a large number of tests, and the current test results are not reset when the test count is reset. It is possible to obtain the action and effect that the test result of is not overestimated.

The self-tuning feature of the coin testing device according to the present invention has the advantage that it significantly reduces the time and skill required to initially tune the device at the factory, thereby reducing the labor costs used in the manufacturing process. is doing. Further, the device continuously retunes itself during normal operation, thereby compensating for parameter variations and environmental changes.

The coin inspection method and apparatus of the present invention provides a wide range of electronic coin tests for measuring parameters indicative of coin acceptability, and any number of coins obtained from coin sets of many countries. Although applicable to the identification and acceptance of coins, the present invention is fully explained by the description of the application of the invention to identifying US 5 cent coins. In particular, the following discussion concentrates on details for setting acceptance limits for high frequency diameter tests for US 5 cent coins, but for other US 5 cent coins such as high frequency thickness tests. Coin testing and application of the invention to other coins will be apparent to those skilled in the art.

Although the drawings are intended to be concrete, they are not necessarily drawn to scale.
Throughout this specification, the term "coin" is used to identify genuine coins, tokens, counterfeit coins, small metal chunks, washers, and any coins that may be used by a person in an attempt to use a coin-operated device. It is intended to include other items. In addition, the movement of coins is sometimes referred to herein as rotational movement for simplicity. However, linear and other types of movement are also included, unless indicated otherwise. Similarly, although a specific type of logic circuit is disclosed with respect to the embodiments detailed below, other logic circuits may be used without departing from the invention to achieve equivalent results.

[0010]

BEST MODE FOR CARRYING OUT THE INVENTION FIG. 1 is a schematic block diagram of an electronic coin testing device 10 according to the present invention. The mechanical part of the electronic coin testing device 10 is shown in FIG. The electronic coin testing device 10 has two main parts. That is, the coin inspection detection circuit 20 including the individual sensor circuits 21, 22 and 23, and the processing control circuit 30.
Is. The coin detection circuit 20 is a test means for generating a test value indicating the characteristics of the test coin in the present invention. The processing control circuit 30, which is the processing means in the present invention, is a programmed microprocessor 35, an analog-digital (A / D) converter 40, a signal shaping circuit 45, a comparator circuit 50, a counter 55, and a NOR gate 61. , 6
It has 2, 63, 64 and 65. Processor 3
As will be described later in detail, the reference numeral 5 has a storage unit that stores a test acceptance criterion, and compares the test value with the stored acceptance criterion to determine the admissibility of the test coin. At the same time, the processor 35 updates the acceptance criterion stored for each acceptance determination with the present test value weighted in relation to the past test circuits.

Each of the sensor circuits 21 and 22 has a two-face induction type sensor 24, 25, and these sensors 24, 25 have coils connected in series near the opposite side walls of the coin passage. As shown in FIG. 3, the sensor 24 preferably has a larger diameter for testing coins over a wide range of diameters. The sensor circuit 23 comprises an inductive sensor 26 which should preferably be arranged as shown in FIG.

The sensor circuit 21 is a high frequency constant power oscillator used to "wake up" the microprocessor 35 by testing coin parameters such as diameter and material. As the coin passes through the inductive sensor 24, the frequency and amplitude of the output of the sensor circuit 21 changes as a result of the interaction of the sensor 24 with the coin. The output of the sensor circuit 21 is shaped by the shaping circuit 45 and sent to the comparator circuit 50. When the amplitude change of the signal from the shaping circuit 45 exceeds a predetermined amount, the comparator circuit 50 causes the microprocessor 35 to operate.
Produces an output on line 36 connected to the interrupt pin of the. The signal on this line 36 commands the microprocessor 35 to "wake up", or in other words, move from a low power idle or dormant state to a full power coin valuation state. In the preferred embodiment, the electronic coin testing device 10 can operate in a coin operated telephone or other environment where low power operation is very important. The "awakening" feature described above is particularly useful in this environment. "Awakening" as described above is the only possible way to increase the power supply when a coin arrival is detected. For example, separate arrival detectors could be used to detect the arrival of coins and wake up the microprocessor 35.

The output from the shaping circuit 45 is also an A / D conversion circuit 40 for converting the analog signal at the input point into a digital output.
Is supplied to the input of. This digital output is provided on line 42 to the microprocessor 35 in series. This digital output is monitored by the microprocessor 35 to detect the effect of passing coins on the amplitude of the output of the sensor circuit 21. The amplitude information along with the frequency shift information provide the microprocessor 35 with sufficient data for a particularly reliable test of coins of a wide range of diameters using a single sensor circuit 21.

The output of the sensor circuit 21 is also the NOR gate 61.
Of the NOR gate 61 and the output of the NOR gate 61 is connected to the input point of the NOR gate 62. NOR gate 62 is connected as one input to NOR gate 65,
NOR gate 65 connects its output to counter 55. No information about the frequency for the sensor circuit 21
Sensor circuit 21 via R gates 61, 62 and 65
Generated by selectively connecting the output of the counter to the counter 55. Frequency information regarding the sensor circuits 22 and 23 is provided by the respective NOR gate 63 or 64 and NO.
Similarly generated by selectively connecting the output of either sensor circuit 22 or 23 to counter 55 via R gate 65. The sensor circuit 22 is also a high frequency low power oscillator and is used for coin thickness testing. Sensor circuit 23 is a strobe sensor commonly found in vending machines. As shown in FIG. 3, the sensor 26 has a receiving gate 7
It is located after 1. The output of the sensor circuit 23 is used to control functions such as credit authorization, detect clogging of coins, and prevent customer fraud by methods such as using strings to lower acceptable coins into the device. .

Microprocessor 35 controls the selective connection of the output from sensor circuit 23 to counter 55, as described below. Sensor circuits 21, 22 and 23
The oscillating frequency of the output is sampled by counting the number of times the threshold level of the output signal crosses within a predetermined sampling time. The counting is performed by the counter 55, and the predetermined sampling time length is the microprocessor 35.
Controlled by. NOR gates 62, 63 and 64
One input of each of its associated sensor circuits 21,
It is connected to the outputs of 22 and 23. Sensor circuit 2
The output of 1 is a NOR gate 6 connected as an inverting amplifier
1 is connected. The other input of each of NOR gates 62, 63 and 64 is connected from microprocessor 35 to respective control lines 37, 38 and 39. The signals on the control lines 37, 38 and 39 are the sensor circuit 2
Each of 1, 22, and 23 is interrogated, ie,
When it is sampled, in other words, the sensor circuit 2
It controls when the outputs of 1, 22 and 23 are supplied to the counter 55. For example, when the microprocessor 35 produces a high (logic "1") signal on lines 38 and 39 and a low (logic "0") signal on line 37, the sensor circuit 21 is interrogated and NOR'd. NOR gate 62 produces a high signal whenever the output of gate 61 goes low. This high signal is sent to the counting input point of the counter 55 through the NOR gate 65 and is counted by the counter 55. Counter 55 produces an output count signal, the output of which is connected to microprocessor 35 by line 57. Microprocessor 35
Is an output count signal from the counter 55 by determining whether the output of the counter 55 and the A / D conversion circuit 40 or the value (s) calculated therefrom are within the stored acceptance limits. It is determined whether the digital amplitude information from the A / D conversion circuit 40 indicates a coin having an acceptable diameter. When the sensor circuit 22 is interrogated, the microprocessor 35 determines whether the counter output indicates a coin of acceptable thickness. Finally, when the sensor circuit is interrogated, the microprocessor 35 determines whether the counter output indicates the presence or absence of coins. When both the diameter and thickness tests are satisfied, the accuracy of discriminating between genuine coins and counterfeit coins is high.

FIG. 2 is a schematic detailed view of a circuit suitable for the embodiment of FIG. 1 including the following components.

Resistance R ₁ 820 k R ₂ 330 k R ₃ 43 k R ₄ , R ₉ , R ₁₂ 3.9 k R ₅ , R _13, R _28, R ₃₆ 1 k R ₆ , R _14, R _{18 ,} R _21, R _27, R _29, R _30, R _31, R _34, R ₃₈ 100 k R ₇ 510 k R ₈ 680 k R ₁₀ 470 k R ₁₁ 620 k R _15, R ₂₆ 47 k R ₁₆ 180 k R ₁₇ 10 k R ₂₀ 390 k R _22, R ₂₃ 150 k R _24, R ₃₇ 6.8 k R _25, R _39, R ₄₀ 1 MR ₃₅ 1.5 k

Inductive sensor 24 3.5 mH 25 400 μH 26 240 μH

The capacitor _{C 1, C 2, C 3} , C 4, C 15, C 16, C 17, C 22, C 23, C 34 .1 μf C 5 250 pf C 6, C 33 510 pf C 7, _{C 8 180 pf C 9, C} 10 100 pf C 11, C 12, C 13, C 18 .01 μf C 14, C 21 10 μf C 19, C 20 30 pf

The diodes _{D 1, D 2, D 3} , D 4, D 5, D 6, D 7, D 8, D 9, D 11, D 12, D 13, D 14, D 17, D 18, D ₂₀ , D _21, D ₂₂ , D ₂₃ 1N41448 D ₁₅ , D ₁₆ HSCH 1001

Zener diode Z 4.7 v

Transistors T ₁ , T ₂ , T ₃ 2N5089 T ₄ 2N3392 T ₅ , T ₆ 2N4356

Battery LB Saft LB2425 3V Lithium

Oscillator O Murata 2 MHz ceramic resonator

Comparator Comp 1, Comp 2 LM2903

NOR gates 61, 62, 63, 64 National Semiconductor 4001 65 National Semiconductor 4025

Counter 55 National Semiconductor CD 4520B

Internal storage device 58 74C244 59 27C16 60 74C373

Microprocessor 35 Intel 80C39

Corresponding to the circuit blocks and elements of FIG.
The circuit blocks and elements of FIG. 2 are similarly numbered.
It The electronic coin testing device 10 shown in detail in FIG.
15 and 16 and 17 are connected to the sensor circuits 21 and 22.
And transistor T of 23₁ , T₂And T₃To that
Each provides an appropriate level of base current. Sensor circuit
21 are placed on opposite side walls 36 and 38 shown in FIG.
Type inductive sensor having two coils connected in series
It is a low power oscillator circuit provided with a circuit 24. Of the sensor 24
The two coils have a combined inductance of about 3.5 mH,
The sensor circuit 21 has an idling frequency of about 170 kHz.
Oscillate. Is the oscillation output signal from the sensor circuit 21 at point A?
And is compared with the A / D converter 41 via the shaping circuit 45.
It is connected to the comparator circuit 50. The signal at point B is the sensor circuit 2
2 is an envelope of the oscillation output signal of No. 1; The sensor circuit 21 is hard
The amplitude of the signal at point B is about 3.5v when not affected by coins.
Is. A coin approaches the sensor 24 and passes through it
After that, the voltage at the point B is applied to the coil (s) of the sensor 24.
Decrease until a coin is placed in the center of the space, then coins
Increases again as it rolls away from sensor 24
It If the voltage level at point B changes by about 0.2V, compare
The circuit 50 produces an output on line 36. This output is NO
Microprocessor via R gate and diode
35 to the interrupt terminal of the microprocessor 35
Awaken. And the amplitude and frequency for diameter inspection
Information is generated and evaluated as described above.

The sensor circuit 22 shown in detail in FIG. 2 is also an oscillator circuit and generates frequency test information relating to the width of the coin passing through the sensor 25. The oscillator shown in FIG.
An inductive sensor 25 having two coils arranged in opposite side walls 36 and 38 shown in FIG. 3 and connected in series.
Is equipped with. The two coils of the sensor 25 are about 400μ
Has a combined inductance of H 2 and the oscillator circuit is about 75
It has an idling frequency of 0 kHz.

The sensor circuit 23, the strobe sensor, is shown in FIG.
The inductive sensor 26 is disposed after the. The single coil of the inductive sensor 26 has an inductance of about 240 μH and the sensor circuit 23 has an idling frequency of about 850 Hz. The strobe sensor is used for coin currency detection, coin blocking, and customer fraud prevention.

Microprocessor 35 is a CM with a RAM power supply 80 backed by a 3v lithium battery LB.
It is an OS device. A persistent storage device is provided by the power device. Other devices, including EEPROM and NOVRAM devices, can be used to achieve the same result. As shown in FIG. 2, the three chips, labeled 58, 59 and 60, form an external program storage device.
Chips 58, 59 and 60 may be omitted if a microprocessor 35 with sufficient internal storage is used, such as the Intel 80C49.

In the preferred embodiment, an electronic coin testing device 10
Is built into a coin operated telephone. In this embodiment, the device 10 is only powered up when the phone is removed from the hook. When the phone is lifted from the hook, each sensor circuit begins to oscillate. The microprocessor 35 samples and stores the values of the amplitude (A ₀ ) and the frequency (f ₀ ) of the sensor circuit 21 when idling, that is, when there is no coin, and the frequency values of the sensor circuits 22 and 23. The microprocessor 35 then enters a "sleep", sleep, or standby mode. In this mode, the microprocessor 35 draws little power until it wakes up the microprocessor 35, indicating that an interrupt signal has been generated on line 36 and a coin has been inserted. When awakened, the microprocessor 35 is fully powered to evaluate the information from the sensor circuits 21 and 22 and determine if the detected coin is an acceptable coin.

The method of the present invention will now be stored when the coin acceptance limit is set based on frequency information from the sensor circuit 21. As the coin approaches and passes the inductive sensor 24, the frequency of its associated oscillator changes from the idling frequency f ₀ without the coin, and thus the output of the sensor circuit 21 changes. The amplitude of the envelope of this output signal also changes. The amplitude of the envelope of this output signal also changes. When this latter change exceeds a predetermined limit, the microprocessor 35 recognizes that a coin has been inserted and awakens. Then, the microprocessor 35 calculates the maximum frequency change Δf. Here, Δf is equal to the maximum absolute difference between the frequency measured during passage of the coin and the idling frequency. That is, it is the maximum value of Δf = (f measured −f ₀ ). Then, the original quantity F = Δf / f ₀ is calculated in order to know whether this F value for the coins tested falls within the acceptable range of authentic coins, and the stored acceptance It is compared with the limit value. For background on the above measurements and calculations, see US Pat. No. 3,918,564 assigned to the assignee of the present application. As described in this patent, this type of measurement technique also applies to parameters of the sensor output signal other than frequency, such as amplitude. Similarly, the invention has particular application to the setting of coin acceptance limits for specific sensors that provide amplitude and frequency outputs,
It also generally applies to the setting of coin acceptance limits obtained from a statistical function for a large number of previously accepted coins of the parameter (s) measured by any sensor.

When the coin is determined to be acceptable, the value of F is stored and added to the information store used by the microprocessor 35 for the calculation of the new acceptance limit.
For example, a moving average of stored F values is calculated for a given number of previously received coins, and an acceptance limit is established as a moving average plus or minus a stored constant or a stored percentage of the moving average. To be done. If possible, both wide and narrow acceptance limits should be stored in the microprocessor 35. Alternatively, these limits can also be stored in RAM or ROM. In the illustrated embodiment, whether the new acceptance limit is set to a wide or narrow value is controlled by external information provided to the microprocessor 35 via the data communication bus. Alternatively, a select switch connected to one input of the microprocessor 35 could be used instead. In this latter structure, the microprocessor 35
Tests the state of the select switch, i.e. whether the select switch is open or closed, and adjusts the coin acceptance limit depending on the state of the select switch. If the coin accepting range is narrow, very good protection that does not accept small metal lumps can be achieved. However, this may result in rejecting worn or damaged acceptable coins. The choice of wide or narrow acceptance limits allows the owner of the device to adjust the coin acceptance limits according to his business experience.

The other ports of the microprocessor 35 are
The gate 71, the clock 75, and the power supply circuit 8 shown in FIG.
0, the relay control circuit 7 for controlling the interface lines 81, 82, 83 and the net and debug line 85.
It is connected to 0. The microprocessor 35 can be easily programmed to control a relay circuit 70 which operates a gate to separate acceptable coins from unacceptable coins or to perform other coin routing tasks. However, the particularly detailed description of such gates does not form part of the present invention. For a more detailed description of an exemplary gate operation, see, eg, US Pat. No. 4,106,610 assigned to the assignee of the present invention. Also, for details of suitable gates suitable for use in connection with the present invention, see “Low Power Coin Routing Gate (Low Power) by Plesko, filed concurrently with this application and assigned to the assignee of the present invention. Po
US Application No. 585,252 entitled "werCoin Routing Gate)"
See the issue.

Clock 75 and power supply 80 provide the clock inputs and clock inputs required by microprocessor 35. Interface lines 81, 82, 83 and 84 provide a means for connecting electronic coin testing device 10 to other devices or circuits that may be included in a coin operated vending machine having electronic coin testing device 10. The details of the other devices mentioned and their connections to them do not form part of the invention. Debug line 85
Provides test connections for monitoring operations and debugging.

FIG. 3 illustrates one way in which the sensors 24, 25 and 26 can be properly positioned near the coin path defined by the two spaced sidewalls 36, 38 and the coin tracks 33, 33a and an electronic coin. 1 shows the mechanical part of the test apparatus 10. The coin handling device 11 is a conventional coin receiving cup 3
1. Two separate side walls 36 and 38 joined by a conventional hinge and spring assembly 34, and coin tracks 33, 33
a. Coin orbits 33, 33a and side wall 3
6, 38 are coin receiving cups 31 to coin sensors 24, 2
A coin path passing through 5 is formed. FIG. 3 also shows the gate 71
The sensor, which is placed after the, is shown, and the gate 71 shown in FIG. 3 is for separating unacceptable coins from acceptable coins.

It should be noted that other positioning of the sensor would be advantageous, other coin path configurations are expected, and another sensor could be used for other coin tests.

FIG. 4 is a flow chart of the operation of the embodiment shown in FIGS. According to one embodiment of the method of the invention,
For each unit of coins to be accepted, the initial acceptance limit for each test is the microprocessor 3 of the electronic coin testing device 10.
It is stored in 5. These initial acceptance limits are set fairly wide to ensure almost 100% acceptance of acceptable coins. These acceptance limits are used only in the initial adjustment. To tune the electronic coin test apparatus 10, a predetermined number of known acceptable coins with each unit are inserted.
For example, eight acceptable 5 cent coins are inserted.
These inserted coins are detected by the sensor circuit 21, the microprocessor 35 is awakened, the sensor circuit 21 is used to perform an amplitude and frequency test for each coin, and the sensor circuit 22 is used to make a second Frequency test is performed. A new acceptance limit is then calculated based on the test information for the eight acceptable coins. These new acceptance limits will be used to test further inserted coins. For example, a frequency test using the sensor circuit 21 will be further described, but similar processing is performed for each test performed in the coin confirmation process.

The flow chart of FIG. 4 illustrates the method associated with the case of a coin telephone. However, the method and apparatus of the present invention can be used in other cases. The general method of FIG. 4 is understood by considering all f variables as representing any function that can be tested, such as frequency, amplitude, etc. for any given coin test. The following specific description pertains to the frequency testing of US 5 cent coins.

When the unhook condition of the telephone is detected, the microprocessor 35 is powered up,
The idle frequency f ₀ is measured and stored, and the microprocessor 35 goes into its low power dormant state, for initial calibration and tuning, the unhook signal of the telephone can also be artificially simulated. And, in one embodiment, a series of eight acceptable 5 cent coins to tune the device for 5 cent coins,
Is inserted. Microprocessor 35 remains dormant until the first five cent coin is detected. The frequency of the output of the sensor circuit 21 is obtained by repeatedly sampling and measuring the frequency f. Then, during the passage of the first 5-cent coin, the maximum difference value Δf is calculated from the maximum difference between f measured and f ₀ . That is, the maximum value of Δf = (f measured −f ₀ ).

The original quantity F is then obtained by the calculation of Δf divided by f ₀ . That is, F = Δf / f ₀ . The F calculated for the first 5 cents coin is compared to the stored acceptance limit to see if it is within the stored acceptance limit. Since the first 5 cent coin is an acceptable 5 cent coin, its F value is within the acceptance limit of memory. Therefore, the first five cent coin is accepted and the microprocessor 35 obtains the coin count C for that coin.

For the first coin, the coin count C is equal to zero. That is, C = O. This coin count is then incremented by 1. Then, the coin count C = 1 is compared with the number 32. That is, C = 32? Since C is not equal to 32, C is compared to 8 in the next step to see if C is greater than or equal to 8. That is, C ≧ 8? Since C is not greater than 8 and is not equal to 8, the next step is to calculate the new mean below, ie F new mean, for a 5 cent coin. That is, F new average = ((C−1) × F old average) + F / C. The F old mean for the first coin is equal to zero. Therefore, F new average = F
/ C = F. Next, the F new average is stored as the F old average. That is, F old average = F new average. This stage completes the processing of the first 5 cent coin.

As more 5 cent coins are inserted for device tuning, the above method is repeated until the eighth 5 cent coin is inserted. For the eighth 5 cent coin, the coin count C = 7, and when it is incremented by 1, the coin count C equals 8. next,
When C is compared to 8, it can be seen that it is equal to 8. As a result, a flag is set to determine the acceptance limit using the calculated F new average value. The F new mean value is calculated as described above, but this time it is used to determine the acceptance limit for the subsequently inserted 5 cent coin. The first remembered acceptance limit is no longer used. The new acceptance limit is F new average plus or minus constant value, that is, upper limit = F new average + X, lower limit = F new average−X; or F new average plus / minus a certain proportion of F new average, Upper limit = (F new average value) (1 + X), lower limit = (F
New average value) * (1-X); or can be calculated from the F new average value in any logical way. As mentioned above, the device, once tuned, can be used in a real operating environment.

When a further 5 cent coin is inserted, the new average F value and the new acceptance limit are continuously calculated again and again. When a coin other than an acceptable 5 cent coin is inserted, its F
The value of is not within the acceptance limit, so the coin is rejected. After this, a new idling frequency f ₀ is measured and the microprocessor 35 goes back to sleep and waits for the arrival of coins.

By calculating the F new mean value and acceptance limit for each acceptable 5-cent coin after the eighth, the device of the present invention self-tunes to recalibrate itself, thus parameter drift, temperature, And it is possible to compensate for changes in the environment. In order for this advantageous compensation to be achieved, it is important that the F new mean value is not overweighted by the previously accepted coins. Therefore, when the 32nd five cent coin is inserted, the count is increased to C = 32.
And the process branches differently. C = 32
, The coin count C is reset to 16. That is, C = 16. The coin count value C = 16 is then used for the F new average value calculation. When the 33rd coin is received, the coin count C = 16 is incremented for use in later process steps. The process described above
It will continue indefinitely as more 5-cent coins are inserted.

As mentioned above, the method of the present invention is not limited to frequency-based testing. Further, the statistical function is not limited to the moving average. Further, while the embodiment of the flow chart above uses the numbers 8, 16 and 32 in the calculation process, other predetermined numbers could be used without departing from the invention.
The values 8, 16 and 32 were chosen because: a) the new average F value was determined fairly well after 8 coins were received,
b) The F new average value is heavily weighted after 32 coins are inserted so that further insertion of acceptable coins has little effect, and c) the number 16 is 8 and 3
Because it is between 2.

In the preferred embodiment, the microprocessor 35 is programmed according to the accompanying printout, but the operation of the electronic coin test apparatus 10 will be apparent to those skilled in the art from the foregoing description.

[Brief description of drawings]

FIG. 1 is a schematic block diagram of an embodiment of an electronic coin testing device according to the present invention.

FIG. 2 is a detailed schematic diagram of a circuit suitable for the embodiment of FIG.

2A is a diagram showing the left half of FIG. 2. FIG.

FIG. 2B is a diagram showing the right half of the diagram.

FIG. 3 is a schematic diagram showing positions suitable for the sensor of the embodiment of FIG.

4 is a flowchart of the operation of the embodiment of FIG.

 ─────────────────────────────────────────────────── ─── Continuation of front page (56) Reference JP-A-58-72290 (JP, A) JP-A-58-214990 (JP, A) JP-A-53-75998 (JP, A) JP-A-58- 60390 (JP, A) JP 57-161635 (JP, A)

Claims (1)

[Claims] 1. A test means (20) for generating a test value indicating a characteristic of a test coin, and a storage unit for storing a test acceptance criterion, the stored value being compared with the stored test acceptance criterion. In a coin testing device comprising a processing means (30) for judging whether or not a test coin is acceptable, the processing means calculates a test count value for each acceptance judgment, and a test value (F) currently accepted and the The average value (F new average) based on the stored test acceptance criteria ((C-1) F old average) weighted by the number of test times (C) for allowable coins up to is calculated, and each test is allowed. For each judgment, the test acceptance criterion stored in the storage unit is updated with the calculated average value as the acceptance criterion to be used for the coins subsequently tested, and the test count value is the predetermined upper limit value. Each time the test reaches 32 (eg 32) Coin testing apparatus, characterized in that to reset the value to the preset value is smaller predetermined positive integer from the upper limit value (e.g., 16).