JPH0787316B2 - Charging circuit - Google Patents
Charging circuitInfo
- Publication number
- JPH0787316B2 JPH0787316B2 JP60006911A JP691185A JPH0787316B2 JP H0787316 B2 JPH0787316 B2 JP H0787316B2 JP 60006911 A JP60006911 A JP 60006911A JP 691185 A JP691185 A JP 691185A JP H0787316 B2 JPH0787316 B2 JP H0787316B2
- Authority
- JP
- Japan
- Prior art keywords
- inverting input
- terminal
- input terminal
- potential
- connection point
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000003990 capacitor Substances 0.000 claims description 19
- 238000010586 diagram Methods 0.000 description 3
- 230000003321 amplification Effects 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 230000000087 stabilizing effect Effects 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- 239000006227 byproduct Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000000047 product Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
- H03F1/305—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in case of switching on or off of a power supply
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Description
【発明の詳細な説明】 産業上の利用分野 本発明は、差動増幅器のバイアス回路に関し、電源投入
後、短時間に一定電位まで立ち上げる充電回路に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bias circuit for a differential amplifier, and more particularly, to a charging circuit which rises to a constant potential in a short time after power is turned on.
従来の技術 従来の代表的な充電回路について、第2図を参照しなが
ら説明する。2. Description of the Related Art A typical conventional charging circuit will be described with reference to FIG.
第2図に示す充電回路は、電源端子1と接地端子2間に
直列接続された抵抗R24とR25と、その中間接続点Bと接
地端子2間に接続された容量C21と、によって基準電圧
回路を構成し、抵抗R24とR25の抵抗比で出力電圧の大き
さを設定し、リップル成分を除去した直流電圧を出力す
る。そして、電源端子と接地端子2間に直列接続された
抵抗R21とR22は電源電圧を分圧する。エミッタを共通接
続した差動対トランジスタTR1,TR2は、一方のトランジ
スタTR1のベースが抵抗R24とR25の中間接続点Bに接続
され、他方のトランジスタTR2のベースが抵抗R21とR22
の中間接続点Aに接続されており、中間接続点AとB間
の電位差を監視する。The charging circuit shown in FIG. 2 has a reference voltage circuit formed by resistors R24 and R25 connected in series between the power supply terminal 1 and the ground terminal 2, and a capacitor C21 connected between the intermediate connection point B and the ground terminal 2. The output voltage is set by the resistance ratio of the resistors R24 and R25, and the DC voltage with the ripple component removed is output. The resistors R21 and R22 connected in series between the power supply terminal and the ground terminal 2 divide the power supply voltage. In the differential pair transistors TR1 and TR2 whose emitters are commonly connected, the base of one transistor TR1 is connected to the intermediate connection point B between the resistors R24 and R25, and the base of the other transistor TR2 is connected to the resistors R21 and R22.
Is connected to the intermediate connection point A, and the potential difference between the intermediate connection points A and B is monitored.
容量C21は、電源電圧のリップル成分を除去して、安定
な直流出力電圧を得る為のものである。ところが、電源
電圧の投入時に、抵抗R24及びR25と容量C21で決定され
る時定数で、その直流出力電圧が緩やかに立ち上がる。
そこで、差動対トランジスタTR1,TR2で直流出力電圧の
立ち上がりの遅れを検出して、トランジスタTR2を導通
させ、トランジスタTR3,TR4で構成される電流ミラー回
路を介して、容量C21に充電電流を与える。そして、電
源投入時に、容量C21の端子間を急速充電し、出力電圧
が安定する時間を短縮するものである。The capacitor C21 is for removing the ripple component of the power supply voltage and obtaining a stable DC output voltage. However, when the power supply voltage is turned on, the DC output voltage rises gently with the time constant determined by the resistors R24 and R25 and the capacitance C21.
Therefore, the delay of rising of the DC output voltage is detected by the differential pair transistors TR1 and TR2, the transistor TR2 is made conductive, and the charging current is given to the capacitor C21 via the current mirror circuit composed of the transistors TR3 and TR4. . Then, when the power is turned on, the terminals of the capacitor C21 are rapidly charged to shorten the time for the output voltage to stabilize.
発明が解決しようとする問題点 このような従来例の回路では、中間接続点AとBの電位
が、定常状態の時にほぼバランスするような状態に設定
していなければならず、差動対トランジスタTR1,TR2は
電源投入の過渡期以外の定常状態でも導通させることに
なる。すると、その動作電流がロス電流となり、好まし
くない。Problems to be Solved by the Invention In such a conventional circuit, the potentials of the intermediate connection points A and B must be set to a state in which they are almost balanced in the steady state. TR1 and TR2 will be conducted even in the steady state other than the transition period of power-on. Then, the operating current becomes a loss current, which is not preferable.
本発明は、上記の問題点を鑑みてなされたもので、電源
投入時のみ充電電流を容量に与え、無駄な消費電流を抑
えながら、差動増幅回路へバイアスが短時間で安定化す
る充電回路を提供することを目的とする。The present invention has been made in view of the above problems, and a charging circuit that applies a charging current to a capacitor only when power is turned on and suppresses unnecessary current consumption while stabilizing a bias to a differential amplifier circuit in a short time. The purpose is to provide.
問題点を解決するための手段 上記の目的を達成するために、本発明の充電回路は、電
源端子と接地端子間に第1,第2の抵抗を直列接続する第
1の中間接続点と、前記第1の中間接続点と前記接地端
子間に接続された第1の容量と、非反転入力端が第3の
抵抗を介して前記第1の中間接続点の電位にバイアスさ
れると共に、出力端と反転入力端との間に第4の抵抗が
接続された差動増幅回路と、前記反転入力端と前記接地
端子間に接続された第2の容量とを備えた増幅器をバイ
アスする回路において、前記電源端子と前記接地端子間
に第5,第6の抵抗を直列接続する第2の中間接続点の電
位変化に追従して順方向導通する2個のダイオード手段
で、前記第1の中間接続点の電位と前記反転入力端の電
位を個々に並列に立ち上げることを特徴とする構成であ
る。Means for Solving the Problems In order to achieve the above object, the charging circuit of the present invention includes a first intermediate connection point in which first and second resistors are connected in series between a power supply terminal and a ground terminal, A first capacitor connected between the first intermediate connection point and the ground terminal and a non-inverting input terminal are biased to a potential of the first intermediate connection point via a third resistor and output. In a circuit for biasing an amplifier comprising a differential amplifier circuit in which a fourth resistor is connected between an end and an inverting input terminal, and a second capacitor connected between the inverting input terminal and the ground terminal. , Two diode means for conducting in the forward direction following a potential change at a second intermediate connection point in which fifth and sixth resistances are connected in series between the power supply terminal and the ground terminal, the first intermediate The potential at the connection point and the potential at the inverting input terminal are individually raised in parallel. It is a configuration.
作 用 上記の構成により、電源投入時に、第1の容量と第2の
容量を同一電位になるように急速充電するから、差動増
幅回路の反転入力端の電位と非反転入力端の電位が均衡
するまでの時間が早められ、差動増幅回路の動作を素早
く安定化させることができる。Operation With the above configuration, when the power is turned on, the first capacitor and the second capacitor are rapidly charged so that they have the same potential. Therefore, the potential at the inverting input terminal and the potential at the non-inverting input terminal of the differential amplifier circuit are The time until the balance is reached is shortened, and the operation of the differential amplifier circuit can be stabilized quickly.
実施例 以下、第1図に示す回路図を参照しながら、本発明の充
電回路に係る一実施例を説明する。Embodiment An embodiment of the charging circuit of the present invention will be described below with reference to the circuit diagram shown in FIG.
第1図において、R11〜R17は抵抗、TR11はエミッタホロ
ワ用トランジスタ、C1,C2は容量、D1,D2はダイオード、
1は電源端子、2は接地端子、3はオペアンプ形式の差
動増幅回路、4は差動増幅回路3の非反転入力端、5は
差動増幅回路3の反転入力端、6は差動増幅器回路3の
出力端、TR12,TR13は差動増幅回路の入力段のPNPトラン
ジスタ、TR14,TR15は差動増幅回路の出力トランジスタ
である。In FIG. 1, R11 to R17 are resistors, TR11 is an emitter follower transistor, C1 and C2 are capacitors, D1 and D2 are diodes,
1 is a power supply terminal, 2 is a ground terminal, 3 is an operational amplifier type differential amplifier circuit, 4 is a non-inverting input terminal of the differential amplifier circuit 3, 5 is an inverting input terminal of the differential amplifier circuit 3, and 6 is a differential amplifier. Output terminals of the circuit 3, TR12 and TR13 are PNP transistors at the input stage of the differential amplifier circuit, and TR14 and TR15 are output transistors of the differential amplifier circuit.
そして、差動増幅回路3は、PNPトランジスタTR12のベ
ースを非反転入力端4とし、PNPトランジスタTR13のベ
ースを反転入力端5とし、非反転入力端4から入力され
る信号を増幅して、トランジスタTR14,TR15のエミッタ
出力に接続された出力端6から増幅した出力電圧を出力
する。The differential amplifier circuit 3 uses the base of the PNP transistor TR12 as the non-inverting input terminal 4 and the base of the PNP transistor TR13 as the inverting input terminal 5 to amplify the signal input from the non-inverting input terminal 4 and The amplified output voltage is output from the output terminal 6 connected to the emitter outputs of TR14 and TR15.
差動増幅回路3の非反転入力端4のバイアスは、電源端
子1と接地端子2との間に直列接続された第1の抵抗R1
3,第2の抵抗R14の抵抗比で定める直流電圧を、その中
間接続点Bから第3の抵抗R15を介して直流バイアスさ
れる。中間接続点Bと接地端子2との間に接続された第
1の容量C1は、電源端子1から供給される供給電圧のリ
ップル成分を除去して、非反転入力端4に安定な直流バ
イアスを与える。また、交流入力信号も非反転入力端4
から入力される。The bias of the non-inverting input terminal 4 of the differential amplifier circuit 3 is the first resistor R1 connected in series between the power supply terminal 1 and the ground terminal 2.
3. A DC voltage determined by the resistance ratio of the second resistor R14 is DC biased from the intermediate connection point B through the third resistor R15. The first capacitor C1 connected between the intermediate connection point B and the ground terminal 2 removes the ripple component of the supply voltage supplied from the power supply terminal 1 to provide a stable DC bias to the non-inverting input terminal 4. give. In addition, the AC input signal is also applied to the non-inverting input terminal 4
Input from.
一方、反転入力端5のバイアスは、出力端6と反転入力
端5との間に第3の抵抗R16を接続し、反転入力端5と
接地端子2との間に第2の容量C2を接続して、出力端6
から反転入力端5に直流的な負帰還をかける。例えば、
反転入力端5の電位が低ければ差動増幅回路3の出力端
6が上昇し、出力電圧の帰還によって、非反転入力端4
の電位と反転入力端5の電位とが均衡するように、反転
入力端5の直流バイアスが決定される。なお、抵抗R17
とR16の抵抗比による交流負帰還量で、差動増幅回路3
の交流利得を設定されるが、最大利得で直流バイアスを
安定化する時は、抵抗R17を短絡すれば良い。On the other hand, as for the bias of the inverting input terminal 5, the third resistor R16 is connected between the output terminal 6 and the inverting input terminal 5, and the second capacitor C2 is connected between the inverting input terminal 5 and the ground terminal 2. And output terminal 6
Applies negative feedback to the inverting input terminal 5 like a direct current. For example,
If the potential of the inverting input terminal 5 is low, the output terminal 6 of the differential amplifier circuit 3 rises, and the non-inverting input terminal 4 is fed back by the feedback of the output voltage.
The DC bias of the inverting input terminal 5 is determined such that the potential of the input terminal 5 and the potential of the inverting input terminal 5 are balanced. The resistor R17
Differential amplification circuit 3 by the amount of AC negative feedback by the resistance ratio of R16 and R16.
The AC gain of is set, but when stabilizing the DC bias with the maximum gain, the resistor R17 may be short-circuited.
次に、電源端子1と接地端子2との間に直列接続された
第5の抵抗R11と第6の抵抗R12は、常に電源電圧を分圧
するもので、それらの中間接続点Aの電位は電源投入と
同時に立ち上がる。Next, the fifth resistor R11 and the sixth resistor R12 connected in series between the power supply terminal 1 and the ground terminal 2 always divide the power supply voltage, and the potential at the intermediate connection point A between them is the power supply. It stands up at the same time as the input.
そして、電源電圧の投入時に、第1の中間接続点Bや反
転入力端5の電位の上昇が遅ければ、エミッタホロワ用
のトランジスタ11が導通し、ダイオードD1を介して第1
の容量C1を急速充電し、ダイオードD2を介して容量C2を
急速充電する。更に、第1の中間接続点Bと反転入力端
5は同一電位で立ち上げられるので、差動増幅回路3は
素早く安定した動作状態になる。If the potential of the first intermediate connection point B or the inverting input terminal 5 rises slowly when the power supply voltage is turned on, the transistor 11 for the emitter follower becomes conductive and the first transistor via the diode D1
The capacitor C1 is rapidly charged, and the capacitor C2 is rapidly charged through the diode D2. Furthermore, the first intermediate connection point B and the inverting input terminal 5 are raised at the same potential, so that the differential amplifier circuit 3 quickly becomes a stable operation state.
もし、急速充電する為の回路(TR11,D1,D2)が無けれ
ば、第1の中間接続点Bの電位を立ち上げる時定数は抵
抗R13,R14の合成抵抗と、第1の容量C1との積で決定さ
れる。反転入力端5の電位は、差動増幅回路3の出力端
6に電圧が出力されて初めて、出力端6から抵抗16を通
じて容量C2に充電されることになるから、反転入力端5
の電位を立ち上げる時定数は、第4図の抵抗R16と第2
の容量C2との積に前述の時定数を足した値にほぼ等し
い。従って、反転入力端5の電位がなかなか上昇せず
に、安定な定常動作に移行するのに時間がかかる。第1
の実施例は、エミッタホロワ用トランジスタTR11が、電
源投入時に、低インピーダンスのエミッタ出力から、容
量C1とC2が同一電位になるように急速充電するから、出
力端6からの帰還回路(抵抗R16)に依存しないで第2
の容量を充電するので、差動増幅回路の反転入力端5の
電位と非反転入力端4の電位が均衡するまでの時間が早
められ、差動入力を増幅し得るバイアス状態への移行が
素早くなり、電源投入後直ぐに、差動増幅回路が増幅可
能な動作状態になる。If there is no circuit (TR11, D1, D2) for rapid charging, the time constant for raising the potential of the first intermediate connection point B is the combined resistance of the resistors R13, R14 and the first capacitance C1. Determined by product. The potential of the inverting input terminal 5 is charged into the capacitor C2 through the resistor 16 from the output terminal 6 only after the voltage is output to the output terminal 6 of the differential amplifier circuit 3.
The time constant for raising the potential of is the resistance R16 and the second
Is approximately equal to the product of the capacitance C2 and the time constant. Therefore, it takes time to shift to a stable steady operation without the potential of the inverting input terminal 5 rising easily. First
In this embodiment, the transistor TR11 for emitter follower rapidly charges the emitter output of low impedance so that the capacitors C1 and C2 have the same potential when the power is turned on. Second without depending
Since the capacitance of the differential amplifier circuit is charged, the time until the potential of the inverting input terminal 5 of the differential amplifier circuit and the potential of the non-inverting input terminal 4 are balanced is shortened, and the transition to the bias state in which the differential input can be amplified is swift. As soon as the power is turned on, the differential amplifier circuit is ready for amplification.
発明の効果 以上に詳述したように、本発明の充電回路は、電源投入
時に、第1の容量と第2の容量を同一電位になるように
急速充電するから、反転入力端と非反転入力端の電位が
均衡する時間を早くし、電源投入後直ぐに差動入力を増
幅可能にできる。EFFECTS OF THE INVENTION As described in detail above, the charging circuit of the present invention rapidly charges the first capacitor and the second capacitor so that they have the same potential when the power is turned on. The time at which the potentials at the ends are balanced can be shortened and the differential inputs can be amplified immediately after power is turned on.
第1図は本発明の充電回路に係る一実施例の回路図、第
2図は従来の充電回路の回路図である。 1……電源端子、2……接地端子、3……差動増幅回
路、4……非反転入力端、5……反転入力端、6……出
力端、R11〜R17……抵抗、C1,C2……容量、TR11〜TR15
……トランジスタ、D1,D2……ダイオード。FIG. 1 is a circuit diagram of an embodiment of a charging circuit of the present invention, and FIG. 2 is a circuit diagram of a conventional charging circuit. 1 ... power supply terminal, 2 ... ground terminal, 3 ... differential amplifier circuit, 4 ... non-inverting input terminal, 5 ... inverting input terminal, 6 ... output terminal, R11-R17 ... resistance, C1, C2 ... Capacity, TR11 to TR15
...... Transistors, D1, D2 …… Diodes.
Claims (1)
直列接続する第1の中間接続点と、前記第1の中間接続
点と前記接地端子間に接続された第1の容量と、非反転
入力端が第3の抵抗を介して前記第1の中間接続点の電
位にバイアスされると共に、出力端と反転入力端との間
に第4の抵抗が接続された差動増幅回路と、前記反転入
力端と前記接地端子間に接続された第2の容量とを備え
た増幅器をバイアスする回路において、 前記電源端子と前記接地端子間に第5,第6の抵抗を直列
接続する第2の中間接続点の電位変化に追従して順方向
導通する2個のダイオード手段で、前記第1の中間接続
点の電位と前記反転入力端の電位を個々に並列に立ち上
げることを特徴とする充電回路。1. A first intermediate connection point for connecting first and second resistors in series between a power supply terminal and a ground terminal, and a first intermediate connection point connected between the first intermediate connection point and the ground terminal. A differential circuit in which a capacitance and a non-inverting input terminal are biased to the potential of the first intermediate connection point via a third resistance, and a fourth resistance is connected between the output terminal and the inverting input terminal. In a circuit for biasing an amplifier including an amplifier circuit and a second capacitor connected between the inverting input terminal and the ground terminal, a fifth and a sixth resistor are connected in series between the power supply terminal and the ground terminal. The potential of the first intermediate connection point and the potential of the inverting input terminal are individually raised in parallel by two diode means which follow the potential change of the second intermediate connection point to be connected and which conducts in the forward direction. Charging circuit characterized by.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60006911A JPH0787316B2 (en) | 1985-01-18 | 1985-01-18 | Charging circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60006911A JPH0787316B2 (en) | 1985-01-18 | 1985-01-18 | Charging circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61166208A JPS61166208A (en) | 1986-07-26 |
| JPH0787316B2 true JPH0787316B2 (en) | 1995-09-20 |
Family
ID=11651420
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60006911A Expired - Lifetime JPH0787316B2 (en) | 1985-01-18 | 1985-01-18 | Charging circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0787316B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0744094Y2 (en) * | 1989-01-31 | 1995-10-09 | ミツミ電機株式会社 | Differential amplifier |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS598970B2 (en) * | 1979-11-15 | 1984-02-28 | 松下電工株式会社 | photoelectric switch |
| JPS5853209A (en) * | 1981-09-25 | 1983-03-29 | Mitsubishi Electric Corp | Differential amplifier |
-
1985
- 1985-01-18 JP JP60006911A patent/JPH0787316B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61166208A (en) | 1986-07-26 |
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| JPH0449701Y2 (en) | ||
| JPH0345568B2 (en) |