JPH0795226B2 - Driving method of matrix display panel - Google Patents

Description

DETAILED DESCRIPTION [Overview] In a selected cell of a matrix display panel, the polarity is inverted at a predetermined cycle, and a scanning voltage pulse is applied to a scanning electrode by superimposing a scanning voltage pulse on a scanning electrode. When a voltage pulse is applied to drive, the reference voltage is effectively changed depending on the display pattern and the light emission luminance varies.Therefore, a compensation voltage pulse having the same voltage as the data voltage pulse is superimposed on the rising portion of the reference voltage pulse. By the pulse, the polarization charge at the rising portion of the reference voltage pulse is made constant, and the emission brightness is made uniform.

[Industrial application field]

The present invention relates to a driving method of a matrix display panel,
More specifically, the present invention relates to an improved driving method that enables lowering of the breakdown voltage of the driving circuit and high-quality display.

A matrix type EL display panel in which a plurality of thin film EL elements are arranged in a matrix is expected to be applied to a display unit of a terminal device of OA equipment, a personal computer, or the like. Therefore, there is a demand for a display panel and a driving method that realize inexpensive and high-quality display.

[Conventional technology]

Generally, the driving method of a matrix EL panel is to invert the polarity applied for each frame and drive an EL display element (hereinafter referred to as a display cell) by a line scanning method. Then, in the conventional general driving method, as shown in FIG. 5, the scanning voltage pulse Vsp is applied to the scanning electrodes, the data voltage pulse Vdp according to the display information is applied to the data electrodes, and those electrodes are applied. The voltage generated by combining the scanning voltage pulse and the data voltage pulse, that is, the so-called writing voltage pulse Vap is applied to the intersection (display cell) of the above to emit light. In this driving method, when a voltage of 215V is required to make the display cell emit light, the scan voltage becomes 165V when the data voltage is 59V, for example, and the scan voltage of the high potential must be sequentially switched and applied to the scan electrodes. . Therefore, the driver that outputs the scanning voltage has a drawback that it requires a high breakdown voltage switching element and becomes expensive.

On the other hand, the inventors of the present invention have proposed a new driving method for reducing the withstand voltage of the scan driver and reducing the cost thereof by Japanese Patent Application No. 61-100117. A feature of this driving method is that a reference voltage pulse (pedestal voltage pulse) is applied to all the scan electrodes in advance, and a low-potential scan voltage pulse is applied while being superposed on the reference voltage during selective scanning. For example, if the reference voltage is 165V and the data voltage is 25V, the scan voltage is 25V.
(25 = 215-165-25). Therefore, as the driver that outputs the scanning voltage, a low breakdown voltage integrated circuit switching element can be used and can be provided at low cost.

FIG. 6 shows a drive waveform according to the drive method of this prior application.
More specifically, FIG. 6A shows a voltage waveform applied to a predetermined data electrode Di of the EL panel, and FIGS. 6B to 6D show scan electrodes S ₁ , S ₂ ... S _n of the panel. Applied voltage waveform,
(E) to (g) show voltage waveforms applied to the display cells formed at the intersections of the data electrodes and the scanning electrodes, Vdp ₁ and Vdp ₂ in the drawing are data voltage pulses, and Vsp ₁ and Vsp ₂ are Scanning voltage pulses, Vpp ₁ and Vpp ₂ are reference voltage pulses, respectively.

As shown in this figure, in the Fi frame, first, the negative reference voltage pulse Vpp ₁ (−165 V) is applied to all scan electrodes of the EL panel.
Simultaneously applied to S _{1 to} S _n . Then the scanning electrodes S ₁ at a lower rank from the upper to overlap to, S ₂ ··· S _n negative polarity scan voltage pulse Vsp ₁ (-190V) is sequentially applied.
During this period, for example, the i-th data electrode D _i is selected, and a positive polarity data voltage pulse Vdp ₁ (+25 V) is applied to this electrode in synchronization with each scanning voltage pulse Vsp ₁ . As a result, the data electrode D _i and each scan electrode S ₁ , S ₂
... Each display cell of the intersection of the S _n, FIG. 6 (e),
The drive voltages Va, Vb, Vn shown in (f) and (g) are applied.
In this case, the positive emission selection voltage, so-called write voltage pulse Vap ₁ (215V = scan side voltage 190V + data side voltage 25V) is applied during the period synchronized with the scan voltage pulse, and the other period corresponds to the reference voltage. A voltage of 165V is applied.
By applying this write voltage pulse Vap ₁ , the data electrode
The selected display cell group on D _i sequentially emits light from the first scan electrode line.

After the completion of writing drive of such a Fi frame, the next Fi + 1
In the frame, the reference voltage pulse Vpp ₂ , the scanning voltage pulse Vsp ₂ , and the data voltage pulse Vdp ₁ , which have a polarity opposite to that of the Fi frame, that is, the positive polarity, are applied to the scanning electrodes S ₁ , S _{2 in the} same manner as above.
... By applying S _n and data electrode D _i respectively to the selected display cell, a negative write voltage pulse Vap ₂
Light is emitted by applying (-215V). The subsequent driving of the frame is performed by alternately and repeatedly applying the above-mentioned negative and positive driving waveforms for each frame.

According to the driving method according to the above-mentioned prior application, the reference voltage is applied to the selected scan electrode in advance before the scan voltage pulse is applied, and the scan voltage pulse is generated by being superimposed on the reference voltage. As for the withstand voltage of the scanning side pulse voltage generation IC driver, only the voltage difference between the voltage value of the write voltage pulse and the voltage value of the reference voltage pulse is required, so an inexpensive IC driver with low withstand voltage can be used, and the circuit is inexpensive. There is an advantage that can be configured.

[Problems to be solved by the invention]

However, in the driving method of the prior application in which the reference voltage whose polarity is inverted for each frame is applied to the scan electrodes, the reference voltage is effectively changed depending on the displayed pattern, so that the luminance varies depending on the voltage change. There is a problem that it will occur.

That is, FIG. 7 shows a light emitting state of a display cell based on two extremely different display patterns. In FIG. 7A, when only one display cell is selected to emit light on one data electrode D _i , (B) is a case where all the display cells are selected to emit light, and there is a difference in emission brightness between them. Also the 8th
FIGS. 7A and 7B are diagrams for explaining the phenomenon of the luminance difference, in which the data electrode D is selected according to the single cell selection state and the all cell selection state of FIGS. 7A and 7B. _i shows the drive voltage waveforms applied to _i , the scan electrode S _j, and the display cell, respectively.

Referring to FIG. 8, in the single cell selection state of (a) and the all cell selection state of (b), the scanning voltage pulse Vsp is superimposed on the reference voltage pulse Vpp on the selected scanning electrode S _j at a predetermined timing. Applied. On the other hand, the selected data electrode D _i has (a)
In the case of single cell selection, the data voltage pulse Vdp is applied only when the scanning voltage pulse Vsp is applied,
In the case of selecting all cells in (b), the data voltage pulse is continuously applied during one frame period. Therefore, the applied voltage waveform (D _i −S _j ) of the display cell between the selection electrodes is equal to the data voltage Vd.
And a large voltage difference is generated between (a) and (b). This voltage difference can be seen as the voltage fluctuation of the reference voltage pulse Vpp when viewed from the effective surface of the display cell, and the effective reference voltages in the single cell selection state (a) and all cell selection state (b) are Vpsmin and Vpsmax, respectively. When defined as, the relation of the following equation is established.

Vd = Vpsmax−Vpsmin (1) The curves Ba and Bb in FIG. 9 are display panels having a plurality of display cells on one data electrode, and FIGS. 7 (a) and 7 (b). )
7 shows the luminance-voltage characteristics when driven in the cell selection state of FIG. The horizontal axis represents voltage and the vertical axis represents luminance. As can be seen from this figure, since there is a difference in the slope between the characteristics of Ba and Bb, a large difference in luminance occurs when the same write voltage Va is applied. That is, in the single cell selection state of FIG. 7 (a), a brightness of about 18 (f1 = foot transversal) and about 12 in the all cell selection state of FIG. 7 (b).
The brightness of (f1) is exhibited, and a brightness difference of about 6 (f1) occurs between the two. When the number of selected cells is between (a) and (b), the luminance characteristic equivalently shows the characteristic between Ba and Bb. As a result, the brightness varies depending on the display pattern.

In FIG. 9, the curve Bc shows the light emission characteristic when the voltage of the reference voltage pulse is increased, and shows that when the voltage (Vpmax) of 190V is exceeded, the display cell emits light by the pulse itself. . Reference numeral Vna represents a threshold voltage of the light emission characteristic, which will be described in detail later.

FIG. 10 is a characteristic diagram showing the result of a more detailed examination of the relationship between the reference voltage and the luminance described above. Note that the relationship between the luminance and the scanning voltage Vs is also shown in this figure. In the figure, the vertical axis represents luminance, the lower horizontal axis represents the reference voltage Vp, the upper horizontal axis represents the scanning voltage Vs, and the curve A has a constant write voltage (215V) of the reference voltage, the scan voltage, and the data voltage, Further, the data voltage is constant, and the light emission characteristics are shown when the reference voltage and the scanning voltage are variously changed. Here, the maximum reference voltage Vpmax is the threshold voltage (Vp in FIG. 9 that starts to shine by the reference voltage pulse itself when there is no write voltage pulse.
max = 190V), and the reference voltage cannot be set above this voltage.

As can be seen from the curve A in FIG. 10, the reference voltage Vp is changed from 0V to 15V.
The brightness is almost constant when changing to 0V, but 150V
The luminance gradually decreases in the variable range from to Vpmax (190V). Based on this characteristic, the drive voltage of the display panel is determined as follows. That is, from the conclusion, the effective reference voltage (Vpsmax) = 190V, the effective reference voltage (Vpsmin) = 165V, the data voltage (Vd) = 25V, the scanning voltage (VS) = 50V, the writing voltage (Va) = 240V, respectively.

Explaining the reason for selecting the above voltage, first, the total voltage applied to the scan electrodes when the scan voltage pulse is applied is the sum of the effective reference voltage Vpsmin and the scan voltage Vs. This value is set to be equal to the threshold voltage Vna of the luminance characteristic (Vna = 215V in FIG. 9) in order to increase the writing voltage Va. Therefore, the following equation is given.

Vpsmin + Vs = Vna (= 215V) (2) Here, Vpsmin must be set as high as possible because it is necessary to lower the scan voltage Vs (to lower the withstand voltage of the scan driver). The present inventors decided to set this Vs to 50V, which facilitates the integration of the scan driver into a highly integrated circuit.

Therefore, Vpsmin is obtained from the following equation.

Vpsmin = Vna−Vs = 165V (3) Next, the data voltage Vd applied to the data electrode is the same as in (1) above.
As shown by the formula, in order to increase the write voltage Va, the effective reference voltage Vpsmax is set as high as possible and the value is set to the maximum reference voltage Vpma.
It is desirable to set it equal to x (190V). Therefore, Vd is obtained from the following equation.

Vd = 190V-165V = 25V Fig.7 (a) by the drive voltage set in this way
When the cell selection drive as shown in (b) and (b) is performed, the luminance variation (luminance variation) occurs as described above, and the variation value ΔA is 42% as shown in FIG.

By clarifying the cause of the above-mentioned phenomenon of the brightness variation, it was found that the reference voltage pulse affects the polarization charge Q.

That is, FIG. 11 is a diagram showing the fluctuation of the polarization charge during the application of the reference voltage pulse. As the driving voltage in this example, 165V was selected as the reference voltage, 50V was selected as the scanning voltage, and 25V was selected as the data voltage, and the write voltage, which is the combined voltage thereof, was set to 240V. To briefly describe the polarization charge, it is EL
By applying an electric field to the electrode pairs arranged on both sides of the light emitter, the EL
This is a state in which when a light-emitting body is made to emit light, electric charges generated thereby are accumulated in an insulating film interposed between the electrode and the EL light-emitting body.

Now, Fig. 11 shows a state in which the display cell in the central portion of the display panel is selected. The polarization charge of the selected cell is not only the application timing (TW) of the 240V write voltage pulse Vap but also the reference at the time of polarity reversal. Rising part of voltage pulse Vpp (T
It can be seen that P) also fluctuates. In other words, this polarized charge is 165 V (effective reference voltage Vp
(corresponding to smin), the rising part (TP) of the reference voltage pulse
190V (effective reference voltage)
On the contrary, in Vpsmax), on the contrary, at the rising portion (TP) of the reference voltage pulse, the fluctuation becomes larger than when the write voltage pulse is applied (TW). Furthermore, the total fluctuation amount at 165 V
Total variation at 190V from Qa (0.48 μc / cm ² ) Qb (0.38 μc / c
It can be seen that m ² ) is smaller.

In this way, the difference between the effective reference voltages Vpsmin and Vpsmax appears as the difference between the polarization charge fluctuation amount and the total fluctuation amount at the rising portion (TP) of the reference voltage pulse, and the difference in the total polarization charge fluctuation amount is the luminance characteristic. It appears as a fluctuation of.

In short, the conventional driving method in which the reference voltage whose polarity is inverted in each frame is applied to the scanning electrodes has a feature that the driving circuit can have a low breakdown voltage and can be manufactured at low cost, but can display a display panel with uniform brightness. There is a problem in display quality that it cannot be done.

SUMMARY OF THE INVENTION In view of the above situation, an object of the present invention is to improve the conventional driving method to reduce the cost of the driving circuit and enable high-quality display.

[Means for solving problems]

In order to achieve the above object, the present invention, as shown in FIG. 1, for example, inverts the polarity in frame units and applies the scanning voltage pulse Vsp to the scanning electrode Sj by superimposing the scanning voltage pulse Vsp on the data electrode. In the driving method in which a data voltage pulse Vdp is applied to Di, and a write voltage pulse Vap composed of a combination of those voltages is applied to a selected display cell, when the reference voltage pulse Vpp is applied by switching the polarity,
A drive configuration is adopted in which a compensating voltage pulse Vcp having the same voltage as the data voltage pulse Vdp is superposed on the rising portion (TP) of the reference voltage pulse to make the polarization charge constant at the rising portion of the reference voltage pulse. is doing.

[Action]

It was experimentally confirmed that the fluctuation of the polarization charge at the rising portion (TP) of the reference voltage pulse Vpp described above ends within a short time within 0.5 ms. Therefore, the present invention is
In order to make the fluctuations of the polarization charge uniform within s, the compensation voltage pulse Vcp having the height of the data voltage Vd and a narrow width within 1 ms is superimposed on the rising portion TP of the reference voltage pulse.

This compensating voltage pulse changes the potential of the rising edge (TP) of the reference voltage pulse to the above-mentioned effective reference voltage as shown in FIG.
Set the value equivalent to Vpsmax and the polarization charge at the rising edge.
The fluctuation amount of Q ₁ (solid line part) is regulated to a value equivalent to the fluctuation amount of the polarization charge Q ₂ (dotted line part) due to the effective reference voltage Vpsmax, that is, it is made constant. As a result, the polarization charge of all the cells of the display panel becomes a constant and uniform amount prior to the selective scanning with respect to the scanning electrodes.

Then, for example, when the display cell at the center of the panel is selectively driven at a predetermined timing TW, the polarization charge of the cell fluctuates according to the write voltage pulse Vap at that time, but the fluctuation amount is the polarization charge fluctuation amount according to the effective reference voltage Vpsmax. Indicates a value equivalent to. As a result, the total fluctuation amount Qc of the polarization charge can be made almost constant, and its value is equivalent to the total fluctuation amount Qb due to the effective reference voltage Vpsmax.

When the effect of the above compensation voltage pulse is shown by the brightness characteristics,
It becomes like the curve B in Fig. 10, and the brightness variation ΔB is about 3%.
It will be suppressed to a value that has almost no problem. As is clear from comparison with the characteristics of the conventional example shown by the curve A in the figure, the luminance variation is greatly reduced.

〔Example〕

A preferred embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 2 is a block diagram of a drive circuit for realizing the drive method of the present invention, and FIG. 3 is a detailed view of a part of the drive circuit. In FIG. 2, 1 is a matrix EL panel, 2 is a scanning side drive circuit, 3 is a first drive voltage generation circuit, 4 is a second drive voltage generation circuit, 5 is a data side drive circuit, and 6 is a Zener diode. Shown respectively.

The EL panel 1 has a plurality of scanning electrodes S ₁ , S ₂ ··· S _n and a plurality of data electrodes D ₁ , D _2, · · D _{m on} both sides of an EL light emitting layer whose both surfaces are covered with an insulating film. It has a structure provided to intersect.

The scanning side drive circuit 2 includes a level conversion circuit 21, a shift register 22, a latch circuit 23, and a driver 24.
Referring to FIG. 3, the scan driver 24 includes P-channel transistors QY _{P1 to} QY _Pn and N-channel transistors.
It has a push-pull configuration of QY _{N1 to} QY _Nn , the scan electrodes S _{1 to} S _n are connected to the drains of the transistors connected in common, and the sources thereof are the first and second drive voltage generating circuits 3, 4 is connected. The equivalent diode shown by the dotted line is between the source and drain of each transistor.
D ₁ and D ₂ are formed.

Referring to FIG. 3, the first drive voltage generation circuit 3 includes power supplies V _{11 to} V ₁₅ for obtaining a positive scan voltage, a negative reference voltage, a positive scan voltage, a ground potential, etc., respectively. The switching circuits SW _{11 to} SW ₁₅ are provided. Specifically, the voltage of each power source is V ₁₁ = -190V, V ₁₂ = -165V, V ₁₃ = 0V, V ₁₄ = + 2
It is set to 40V, V ₁₅ = + 190V.

The second drive voltage generating circuit 4 also includes power supplies V _{21 to} V ₂₅ for obtaining a positive reference voltage, a negative reference voltage, a negative scan voltage, a ground potential, etc., respectively, also referring to FIG. And switching circuits SW _{21 to} SW ₂₅ . Specifically the voltage of each power _{supply, V 21 = + 190V, V} 22 = + 190V, V 23 = 0V, V
₂₄ = -215V, is set to V ₂₅ = -165V. One of the first and second drive voltage generation circuits is in the ON state (operating state)
At the time of, the other is controlled to be in the off state (stop state).

Although the circuit components arranged on the scan electrode side have been described above, the circuit configuration is the same as that of the above-mentioned prior invention. Then, the control is performed as follows.

That is, referring to FIG. 2, the strobe signal SY ₁ , the latch signal SY ₂ , the clock signal SY ₃ , the data signal SY ₄ , and the polarity signal SY ₅ are input to the level conversion circuit 21 as control signals. After level conversion here, the data signal SY ₄
Is input to the shift register 22 for electrode scanning. The clock signal SY ₃ sequentially shifts the data signal input to the shift register. The latch signal SY ₂ latches the sequentially shifted data signal in the latch circuit 23. The strobe signal SY ₁ specifies the valid period of the latch output sequentially input to the driver 24, and controls the output of the reference voltage and the scan voltage from the drive voltage generation circuits 3 and 4 to the scan electrodes S _{1 to} S _n . The polarity signal SY ₅ specifies the polarity of the driver of the output voltage waveform.

On the other hand, the data side drive circuit 5 is composed of a shift register 51, a latch circuit 52, a driver 53 and a power supply 54.
Referring to FIG. 3, the data driver 53 includes P-channel transistors QX _{P1 to} QX _Pm and N-channel transistors.
It has a push-pull configuration with QX _{N1 to} QX _Nm, and the data electrodes D _{1 to} D _m are connected to the drains of commonly connected transistors.
Are connected, and the power supply 54 is connected between the respective sources. The voltage of the power supply 54 is set to + 25V.
The circuit configuration of this drive circuit is not much different from that of the drive circuit of the above-mentioned prior invention. However, regarding the control method, control for outputting a compensation voltage pulse is added according to the features of the present invention.

That is, referring to FIG. 3, as control signals on the data electrode side, the clock signal SX ₃ and the data signal SX ₄ are sent to the shift register 51, the latch signal SX ₂ is sent to the latch circuit 52, the strobe signal SX ₁ and the polarity signal SX. ₅ is input to the driver 53, respectively. The data signal SX ₄ corresponding to the display information input to the shift register 31 is shifted by the clock signal SX ₃ , and when the data signal for one scanning period is accumulated, the latch signal is generated.
It is latched by the latch circuit 52 by SX ₂ and added to the driver 53. The strobe signal SX ₁ specifies the valid period of the latch output input to the driver 53, and controls the output of the data voltage from the power supply 54 to each of the data electrodes D _{1 to} D _m .
The polarity signal SX _{5 functions} as a control signal that specifies the polarity of the output voltage waveform of the driver 54 and that outputs a compensation voltage pulse. That is, when the reference voltage pulse is output from the scanning side driver 24, the polarity signal SX ₅ is switched to the “H” or “L” level state for a predetermined time in synchronization with the rising edge of the pulse and input to the data driver 53. , Power 54
Can be output as compensation voltage pulses to all the data electrodes D _{1 to} D _m through the driver.

Now, the operation of the drive circuit having the above configuration will be described with reference to the drive waveforms in FIGS. 3 and 4. In Fig. 4 (a)
Is a voltage waveform applied to a predetermined data electrode D _i of the EL panel, and (b) to (d) are scan electrodes S ₁ , S ₂ ... S of the panel.
Voltage waveforms applied to _n , (e) to (g) show voltage waveforms applied as a combined voltage to the display cells formed at the intersections of the data electrodes and the scan electrodes, and Vdp ₁ , Vdp _{2 in the} figure.
Is the data voltage pulse, Vsp ₁ , VSp ₂ is the scanning voltage pulse, Vpp
₁ and Vpp ₂ are reference voltage pulses, and Vcp ₁ and Vcp ₂ are compensation voltage pulses, respectively.

As shown in FIG. 4, in the Fi frame, first, the negative reference voltage pulse Vpp ₁ (−165 V) is applied to all the scanning electrodes of the EL panel.
Simultaneously applied to S _{1 to} S _n (see (b) to (d)). The operation of applying the reference voltage pulse is as follows. At time t ₁ , the switching circuit SW of the first drive voltage generation circuit 3
₁₂ is turned on and the other switching circuits SW ₁₁ , SW _{13 to} SW ₁₅ are turned off, the voltage of the power source V ₁₂ (−165 V) is supplied to the scan driver 24, and all the scan electrodes S are supplied to the driver through the diode D ₁ incorporated therein. leading edge of the reference voltage pulse Vpp ₁ is applied to the ₁ to S _n.

Also, in synchronization with the rise of this reference voltage pulse Vpp _1.
A compensation voltage pulse Vcp _{1 of} about 1 ms is applied to all data electrodes D _{1 to} D _m . This pulse Vcp ₁ application operation is performed by setting the polarity signal SX ₅ input to the data driver 53 to the “H” level state during the time t ₁ to t ₂ , for example, the P-channel transistor.
QX _{P1 to} QX _Pm are all turned on during that period, and the voltage (+25 V) of the power supply 54 is supplied to all the data electrodes D _{1 to} D _m as the compensation voltage pulse Vcp ₁ via those transistors.

As a result, all display cells including cells at the intersections of the data electrode D _i (second data electrode D ₂ ) and the scan electrodes S ₁ , S ₂ ... S _n are shown in FIG. , (F) and (g) are applied, that is, the drive voltage in which the compensation voltage pulse Vcp ₁ is superimposed is applied to the rising portion of the reference voltage pulse Vpp ₁ . Then, this driving voltage makes the polarization charge of the cell uniform as described above.

Following this, the first drive voltage generation circuit 3 is turned off (stopped state), the second drive voltage generation circuit 4 is set to the on state, and it is superposed on the reference voltage pulse Vpp ₁ from the upper level. A negative scanning voltage pulse Vsp ₁ (−215V) is sequentially applied to the scanning electrodes S ₁ , S _2, ... S _n in the lower order (see FIGS. 4B to 4D). The application operation of this pulse Vsp ₁ is as follows. Turn on the switching circuit SW ₂₄ at time _{t 3, t 5, t 7} , the other switching circuits SW ₂₁ to SW
₂₃ and SW ₂₅ are turned off, the voltage of the power supply V ₂₄ (−215 V) is supplied to the scan driver 24, and at the same time, the N-channel transistors of the driver are sequentially turned on in the order of QY _N1 , QY _N2 ... QY _Nn . Then, at times t ₄ , t ₆ , and t ₈ , the switching circuit SW ₂₅
Is turned on and other switching circuits SW _{21 to} SW _{24 are} turned off.
As a result, the reference voltage pulse Vp is applied to the selective scan electrodes S _{1 to} S _n.
The scanning voltage pulse Vsp ₁ is sequentially applied so as to be superimposed on p ₁ . Here, for example, the transistor QY _N1 is turned on and the scan electrode
When S ₁ is selected, the transistors in the OFF state QY _N2 ~QY _Nn
The scan electrodes S _{2 to} S _n connected to the drain of
Is applied, the source-drain voltage is 50V.
[= ‖-215V ‖-‖-165V ‖], and the breakdown voltage problem is solved.

During this period, for example, the i-th data electrode D _i is selected according to a predetermined display pattern, and a positive polarity data voltage pulse Vdp ₁ (+25 is applied to the electrode in synchronization with each scanning voltage pulse Vsp _1.
It is assumed that V) is applied to each (see FIG. 4 (a)). The application operation of this pulse Vdp ₁ is as follows. That is, the data signal SX ₄ corresponding to the display pattern
Is input to the data side drive circuit 5, and the P-channel transistors QX _P1 , QX _P2 , and QX _Pm of the data driver 53 are turned on for a predetermined time respectively, so that the voltage of the power supply 54 (+25 V)
Is supplied to the data electrode D _i via the transistors as the data voltage pulse Vdp ₁ . Thus, each display cell at an intersection of the data electrode D _i and the scanning electrode S _1, S ₂ ··· S _n is FIG. 4 (e), (f), as shown in (g) Write voltage pulse Vap ₁ (240V = scan side voltage 21
5V + data side voltage 25V) is applied, and the write voltage pulse causes the selected display cell group on the data electrode D _i to sequentially emit light sequentially from the first line of the scan electrode.
Although not shown, a refresh voltage pulse pair having a negative polarity and a positive polarity is applied to all display cells after the end of the write driving, thereby causing the selected cell to emit light again. This refresh operation works to invert the polarization charge generated by the write voltage pulse and has the effect of increasing the brightness.

In the next Fi + 1 frame, the reference voltage pulse Vpp ₂ , the compensation voltage pulse Vcp ₂ , the scanning voltage pulse Vsp ₂ , and the data voltage pulse Vdp ₂ which have a polarity opposite to that of the Fi frame, that is, a composite voltage applied to the display cell are negative. Is applied to the scan electrodes S ₁ , S ₂ ... S _n and the data electrodes in the same manner as above, so that the write voltage pulse of negative polarity is applied to the selected display cell.
Vap ₂ (-240V) is applied to cause light emission. The operation of applying such a pulse is as follows.

That is, first, at time t ₁₁ , the switching circuit SW ₂₂ of the second drive voltage generating circuit 4 is turned on, the other switching circuits SW ₂₁ , SW _{23 to} SW ₂₅ are turned off, and the voltage of the power source V ₂₂ (+19
0V) is supplied to the scan driver 24, and a voltage of + 190V is applied to all the scan electrodes S _{1 to} S _n through the diode D ₂ incorporated therein. This voltage corresponds to a voltage obtained by superimposing a compensation voltage of + 25V on a reference voltage of + 165V. At this time, if the polarity signal SX ₅ input to the data driver 53 is set to the “L” level state until time t ₁₂ , the N-channel transistors QX _{N1 to} QX.
_Nm all turned on, all the data electrodes D ₁ to D _m is the ground potential through them (0V). As a result, a voltage pulse of -190V is supplied to all display cells. This voltage pulse corresponds to a reference voltage pulse Vpp ₂ of −165V and a compensation voltage pulse Vcp ₂ of −25V superimposed thereon.

Then during the time t ₁₂ ~t _19, wherein the polarity signal SX ₅ is set to "H" level state, and ground potential data voltage pulse output state as the output polarity of the data driver. As a result, a voltage pulse of -165V (-190V + 25V) is supplied to all display cells. This voltage pulse is -165V
Corresponding to the reference voltage pulse Vpp ₂ . And time t ₁₃ ~ t
_{At 14} , the switching circuit SW ₁₄ is turned on to supply the voltage (+240 V) of the power supply V ₁₄ to the scan driver 24, and at the same time, the P-channel transistor QY _P1 of the driver is turned on. Thereby, a voltage pulse of +240 V is applied to the scan electrode S ₁ . At this time, the N-channel transistor QX _N1 of the data driver 53 is turned on by the data signal and the polarity signal to set the data electrode D _i to the ground potential as described above. As a result, -240V is applied to the selected cell on the data electrode.
Will be supplied. This voltage pulse is the write voltage pulse Vap ₂ , and corresponds to the reference voltage pulse Vpp ₂ of −165 V and the data voltage pulse Vdp ₂ of −25 V and the scanning voltage pulse Vsp _{2 of} −50 V superimposed on each other.

The above voltage application operation is performed on the scan electrodes S ₂ ··· S _{n of} the next-order selection line, and also in the subsequent frame drive, the drive waveforms of the negative polarity and the positive polarity described above for each frame. Are alternately and repeatedly applied.

Although one embodiment of the present invention has been described above, the present invention is not limited to this, and the following modifications are possible.

A dedicated power supply circuit for outputting the compensation voltage pulse Vcp is provided on the data electrode side or the scan electrode side. In this case, the connection position of the power supply circuit may be either the high voltage power supply terminal of the driver or the output stage.

The level of the compensation voltage pulse Vcp can be increased or decreased if it is slightly lower than the height of the data voltage. However, the value should not exceed the threshold voltage Vna of the light emission characteristic.

The polarity inversion of the reference voltage pulse does not necessarily have to be performed in units of frames, and may be inverted below that or every few frames.

The positive and negative drive voltage levels do not have to match and may be asymmetric.

〔The invention's effect〕

According to the driving method of the present invention, an inexpensive IC driver having a low breakdown voltage can be used as an IC driver for driving the matrix display panel, and the luminance of the display panel can be made uniform over the entire surface to provide a high quality display. Therefore,
When applied to EL matrix panels, the practical effects are extremely large.

[Brief description of drawings]

FIG. 1 is a diagram for explaining the principle of the present invention, FIG. 2 is a block diagram according to one embodiment of the present invention, FIG. 3 is a circuit diagram of a main part of the above embodiment, and FIG. 4 is a drive waveform diagram for the above embodiment, FIGS. 5 and 6 are drive waveform diagrams according to the conventional driving method, and FIGS. 7 to 11 are diagrams for explaining the problems of the conventional driving method. 1 to 4, 1 is an EL panel, 2 is a scanning side drive circuit, 3 is a first drive voltage generation circuit, 4 is a second drive voltage generation circuit, 5 is a data side drive circuit, and 21 is Level conversion circuit, 22 and 51 are shift registers, 23 and 52 are latch circuits, 24 and 53 are drivers, 54 is a power supply, SW _{11 to} SW ₁₅ , SW _{21 to} SW ₂₅ are switching circuits, and V ₁₁ to
V _15, V ₂₁ ~V ₂₅ power, Vpp _1, Vpp ₂ is a reference voltage pulse, Vsp
₁ and Vsp ₂ are scanning voltage pulses, Vdp ₁ and Vdp ₂ are data voltage pulses, and Vcp ₁ and Vcp ₂ are compensation voltage pulses.

Claims (2)

[Claims] 1. When illuminating a selected display cell of a matrix display panel in which a display cell is formed by interposing an electro-optical body between scanning electrodes and data electrodes intersecting with each other, scanning is performed with a polarity reversed at a predetermined cycle. Write by combining the reference voltage pulse (Vpp) with the scanning voltage pulse (Vsp) superimposed on the electrode (Sj) and the data voltage pulse (Vdp) on the data electrode (Di). Voltage pulse (Va
p) is applied to the selected display cell, when the reference voltage pulse (Vpp) is applied by switching the polarity, the same as the data voltage pulse (Vdp) at the rising portion of the reference voltage pulse. A method of driving a matrix display panel, characterized in that a compensating voltage pulse (Vcp) of a voltage is superposed so that the polarization charge at the rising portion of the reference voltage pulse is made constant. 2. The compensation voltage pulse (Vcp) is supplied from a power supply circuit (5) that outputs the data voltage pulse (Vdp) in synchronization with the rising of the reference voltage pulse (Vpp). A method of driving a matrix display panel according to claim (1).