JPH0795253B2 - Power recovery processing method for power supplies for information processing equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] The present invention relates to a power recovery processing method for an information processing apparatus power supply that performs power recovery processing after a power failure occurs in a power supply unit that supplies power to the information processing apparatus. In order to provide a power recovery processing method for a power supply for an information processing device, which is capable of performing a normal power failure processing even in the case of a momentary power failure, a power supply unit including a power supply unit, a power supply control unit, and an information processing unit is provided. In the power recovery processing method of the power supply for the information processing device in which the power supply control unit controls the power supply from the power supply to the information processing unit, the power supply control unit stores the power failure state in the storage unit by the timer unit activated by the power failure signal. A power failure processing unit that stores the data, and a power recovery processing unit that is activated when the power failure signal is off when the time-out output of the timer means occurs, and the power recovery processing unit reads the power failure state of the storage means when activated. And a control signal for instructing the power supply unit to turn on the power.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power recovery processing method for a power supply for an information processing apparatus that performs power recovery processing after a power failure occurs in a power supply unit that supplies power to an information processing apparatus.

CPU, memory, which make up the main body of the computer system,
The information processing units such as the channels are supplied with power supplies of various necessary voltages (+ 5V, ± 12V, etc.) from one power supply unit. Other input / output devices such as magnetic disk devices,
Printers and the like have power supplies attached to them.

The supply of power to such an information processing apparatus is accompanied by automation of system operation, and there is a demand for automation of processing when a power failure occurs. For this reason, a method has been adopted in which the power supply is provided with a mechanism for detecting a power failure, and the power supply control section and the information processing section perform power failure processing.

However, when power is restored in a short time after a power failure occurs, it is difficult to automatically perform power restoration processing, and automatic power restoration processing in that case is desired.

[Prior Art] FIG. 6 is a block diagram of a conventional example.

In FIG. 6, reference numeral 60 is a power supply unit, 61 is a power supply control unit, and 62 is an information processing unit. The power supply unit 60 is a commercial power supply AC100V from the power supply control unit 61
The information processing unit 62, which is the main body of the information processing system, generates a standby power supply (+ 5V) for driving each unit of the
Generates and supplies system power consisting of various necessary voltages to cards (printed circuit boards) of (CPU, memory, channels, etc.).

The operation when a power failure occurs in the configuration of the conventional example shown in FIG. 6 will be described with reference to the time chart of the conventional example shown in FIG.

B. Is the AC input status, b. C. Indicates the state of the system power supply and standby power supply in the power supply unit 60, d. Is the power control unit
Represents the processing executed at 61.

First, when the power supply section 60 loses AC100V input and a power failure is detected, b. C. As shown in, the power supply unit 60 supplies the system power supply to the information processing unit 62 for a predetermined time, and the standby power supply is supplied to the power supply control unit 61 for a time slightly longer than the system power supply so as to execute the power outage process. It has a configuration.

While the system power and standby power are retained,
A power failure signal is supplied from 60 to the power supply control section 61, whereby the power supply control section 61 performs power failure processing. In this processing, a microprocessor (not shown) in the power supply control unit 61 records the fact that a power failure has occurred in a nonvolatile memory (not shown) by the power failure processing program. Further, the information processing unit 62 is interrupted to stop the system. The information processing unit 62 forcibly stops the system. That is,
For example, the operation of the input / output device during operation of the disk device or the like is forcibly terminated.

When the power outage process in the power supply control unit 61 ends, the power supply unit 60
To the power off process. After that, when the AC input is restored, the standby power supply of the power supply unit 60 is immediately supplied to the power supply control unit 61 when there is an AC input, so the power supply control unit 61 starts operating by the standby power supply and The contents of the non-volatile memory are read to identify that there was a power failure. With this identification, the power supply control unit 61 starts the power recovery process, and the power recovery process is executed by supplying a power-on control signal from the power supply control unit 61 to the power supply unit 60. Power control unit 61
Causes the system power to be output,
B. Then, the information processing unit becomes operable.

[Problems to be Solved by the Invention] The above-described conventional operation is performed when a power failure continues for a relatively long time. On the other hand, in the case of a momentary interruption in which a power failure occurs for a short time, the following operation is performed.

B. When a power failure occurs in the power supply controller and the power supply controller executes the power failure process, the system power supply supplies a power-off control signal to the power supply unit 60. As a result, the power supply control unit executes the power outage process as described above, records the power failure in the non-volatile memory, generates the power off control signal, and disconnects the system power supply of the power supply unit. After instructing to turn off the system power, but before turning off the standby power supply. Therefore, when the AC input returns to the original level (in case of a momentary interruption) as indicated by the dotted line, the power supply control unit 61 does not disconnect the standby power supply even once, so it is said that it returns from the standby power supply off state to the on state after the power failure process. The phenomenon does not occur. In this case, the power control unit
In No. 61, the trigger for executing the power recovery process is not output, and eventually the power recovery process is not developed, so that there is a problem that the system power is not turned on.

It is an object of the present invention to provide a power recovery processing method for a power supply for an information processing device, which can normally perform power recovery processing even when the power is instantaneously cut off such that power is recovered immediately after power failure processing.

[Means for Solving the Problems] FIG. 1 shows a basic configuration of the present invention.

In FIG. 1, 10 is a power supply control unit, 11 is a power failure processing unit, 12 is a power recovery processing unit, 13 is timer means, 14 is storage means, 15 is a power supply unit, 16
Represents an information processing unit.

According to the present invention, the power supply control unit 10 is provided with a timer means 13, the timer means 13 is activated by the output of a power failure signal, generates an output after a predetermined timing, drives the power recovery processing section 12, and performs the power recovery processing. The unit 12 supplies a power-on control signal to the power supply unit 15 if the power failure signal is not output at that time.

[Operation] When the power supply unit 15 detects a power failure, it outputs a power failure signal to the signal line 150. Accordingly, the power outage processing unit 11 of the power supply control unit 10
Executes a power failure process and stores in the storage means 14 that there is a power failure.

After that, when the power outage ends in a short time before the permanent power supply is cut off, the timer means 13 outputs an output 130 due to a time-out (time-out) after a predetermined time. When this output 130 is detected by the power recovery processing unit 12, the power recovery processing unit 12 determines whether a power failure signal is being output to the signal line 150 at that time, and if a power failure signal is present, executes disconnection processing, If there is no power failure signal due to power recovery, power recovery processing is executed. In the power recovery process in this case, the content of the storage unit 14 is read, and if the power failure is stored, the power-on control signal 120 is output to the power supply unit 15. With this, the power supply unit 15 outputs the system power supply and supplies it to the information processing unit 16.

[Embodiment] FIG. 2 is a block configuration diagram of an embodiment of the present invention, FIG. 3 is a configuration diagram of a power supply control unit, FIG. 4 is a process flow chart of the embodiment, and FIG. 5 is a time chart diagram of the embodiment. Indicates.

In FIG. 2, 20 is a power supply unit, 21 is a power supply control unit, 22 is an information processing unit, and the power supply unit generates a power failure signal by detecting a power failure of AC100V. And a power supply circuit for generating a system power supply to the information processing unit 22 is provided as in the conventional example.

The configuration of an embodiment of the power supply control unit 21 according to the present invention is shown in FIG.

In FIG. 3, 31 is a microprocessor that controls power supply control, 32 is a CPU interface that interfaces with the information processing unit 22 (FIG. 2) to which system power is supplied, and 33 is the power supply unit 20 (see FIG. 2)) and a power supply interface for receiving signals from the power supply unit, 34 is a ROM storing a microprocessor program, 35 is a RAM storing various data such as variable areas used by the program, 36 Is a non-volatile RAM that retains data even when the power is cut off to store information during a power outage
(Equipped with a dedicated backup power supply), 37 represents a timer for measuring a fixed time.

FIG. 4 shows a process flow chart of the embodiment at the time of power failure by the power supply control unit shown in FIG.

Explaining the processing flow of FIG. 4, when the power supply interface 33 first detects the occurrence of a power failure signal from the power supply unit 20, the microprocessor 31 executes the power failure signal check processing (41) to the power supply interface 33. Confirm by reading the power failure signal 2-3 times. Microprocessor 31 then stores 42 the power failure event. In this case, the non-volatile RAM 36 is stored with data representing the occurrence of a power failure, and an interrupt signal is further output to the CPU interface to cause the information processing unit 22 to execute the processing of the power failure occurrence.

Next, the timer processor 31 executes power-off processing (4
3). In this process, a power-off control signal is output to the power supply unit 20 via the power supply interface 33, the system power supply of the power supply unit 20 is stopped, and the timer 37 is started (44).

Next, the microprocessor 31 determines whether the timer 37 has generated a timer output after a predetermined preset time has elapsed (45), and when the output occurs, the power failure signal at that time is still output. (46) if there is no power failure signal or if there is a momentary interruption. If the power failure signal has disappeared, the microprocessor executes power-on processing (power recovery processing) (47). In this process, the stored contents of the non-volatile RAM 36 are read out, and by detecting the record of the power failure, a power-on control signal is supplied to the power supply unit 20 via the power supply interface 33, and the system power supply is generated in the power supply unit 20. Then, power is supplied to the information processing unit 22 and the system can be started up.

When the standby power supply to the power supply control unit 21 is cut off during execution of the timed operation by the above timer (48), the operation is stopped, and when the power is restored, it is the case of the conventional example (the long time shown in FIG. 7). In the case of a power outage for an hour), the same power recovery process is performed.

FIG. 5 shows a time chart of the embodiment according to the above processing flow. Figure a. AC input, b. C. Is the system power supply of the power supply unit, the standby power supply, d. Represents the processing of the power supply control unit, and a. If the AC input is momentarily interrupted as shown in, the power failure signal from the power supply unit takes the power outage process in the power supply control unit and the timer for a certain period of time, and when the AC input is restored after a certain period of time. It is shown that power recovery processing is performed and system power is turned on.

[Effects of the Invention] According to the present invention, since power recovery processing can be automatically performed even in the case of a short power failure, automation of the operation of the information processing system and labor saving can be achieved.

[Brief description of drawings]

FIG. 1 is a basic configuration diagram of the present invention, FIG. 2 is a block configuration diagram of an embodiment of the present invention, FIG. 3 is a configuration diagram of a power supply controller, and FIG.
FIG. 5 is a process flow chart of the embodiment, FIG. 5 is a time chart diagram of the embodiment, FIG. 6 is a configuration diagram of a conventional example, and FIG. 7 is a time chart diagram of the conventional example. In FIG. 1, 10: power supply control section 11: power failure processing section 12: power recovery processing section 13: timer means 14: storage means 15: power supply section 16: information processing section

Claims (1)

[Claims] 1. A power supply unit (15), a power supply control unit (10), and an information processing unit (16).
In the power recovery processing method of the power supply for the information processing device in which the power supply to the power control unit (10) is controlled by the power supply control unit (10), the power supply control unit (10) includes a timer unit (13) that is activated by a power failure signal and a power failure signal. A power failure processing section (11) for storing the power failure state in the storage means (14) by means of a power recovery processing section (12) which is activated when the power failure signal is off when the timer means (13) outputs a timeout, The power recovery processing unit (12) generates a control signal for instructing the power supply unit (15) to turn on the power when the power failure state of the storage unit (14) is read by the power recovery unit (12). Power recovery processing method.