JPH0797267B2 - Display device drive circuit - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a drive circuit of a display device having a capacitive load, and more particularly to a discharge display panel including discharge cells having a binary storage function. The present invention relates to a drive circuit of a discharge memory type display device such as a DC discharge pulse memory type and an AC discharge type.

(Prior Art) A conventional discharge memory type display panel, for example, a drive circuit of a DC discharge pulse memory type has a first diode group D _w (D _w1 , D _w2 , ..., D _wn ), as shown in FIG. Write pulse WP (V _W ) is maintained by second diode group D _s (D _s1 , D _s2 , ..., D _sn ) Pulse SP
(V _s ) is a circuit for mixing and supplying the display anodes (DA1, DA2, ..., DAn).

By using such a drive circuit, a sustain pulse train having a constant cycle and a pulse width is constantly applied to the display anode, a write pulse is applied to the display anode and a scan pulse is applied to the cathode, and a desired discharge cell is selected by matrix selection. Then, once the discharge is started, the discharge is connected by this sustain pulse until the erase pulse is applied, that is, the memory function is added to the write information to realize the high brightness panel display device.

On the other hand, the applicant proposed a sustain pulse supply circuit for capacitive load with reduced power consumption in Japanese Patent Publication No. Sho 56-30730 "Pulse supply circuit", and various solid-state devices such as a MOS type shift register that becomes a capacitive load. It facilitates the practical application of storage devices.

This pulse supply circuit has an inductance element L connected to one end of a capacitive load C as shown in FIG.
And two DC voltage sources V ₁ and V ₂ having different voltage values via the second switch elements S ₁ and S ₂ , respectively,
Connected to both ends of the inductance element L, as shown in FIG. 3 (b), during the open circuit off period of the second switch element S ₂ , the capacitance (C) of the capacitive load and the inductance (L of the inductance element L ) Time of about 1/2 of the resonance period associated with And each time the first switch element S ₁ is closed on twice,
After the first on period of the first switch element S ₁ ,
When a voltage pulse having an amplitude 2 (V ₂ -V ₁ ) related to the different voltage values is supplied to the capacitive load by turning on the switch element S ₂ of the above, and a repetitive pulse is supplied to the capacitive load. Power consumption is effectively reduced (in principle, the power consumption becomes zero if the resistance included in the circuit element is ignored).

Further, as a relatively easy method of applying the sustaining pulse SP commonly to a plurality of display anodes and applying the writing pulse WP to the selected display anodes, as a relatively easy method, FIG. 4 ( Configurations such as a) and (b) are possible. Fourth
Figure (a) shows a sustain pulse on the common return line of the write pulse WP.
FIG. 4 (b) shows a method of supplying a sustain pulse SP between each write pulse WP and a load through various insulated energy converters TR, for example, a transformer, by adding SP.

(Problems to be solved by the invention) In the drive circuit of the DC discharge pulse memory type shown in FIG. 2, the switch SW _wi (i is the number of the display electrode DA) and the switch SW _wi
D is closed at a rate of 1/10. At that time, the current due to the write pulse flows in the order of SW _wi , D _wi , D _Di , R _Di , SW _D and ground from the power supply V _w, and the current value at that time is determined by the DC resistance R _{Di and} is V _w / R _Di Yes, and DC loss occurs only in R _Di. Now, assuming that V _w = 90 V and R _Di = 2 kΩ, the power consumption due to R _Di per electrode reaches 405 mW. Also, the charge (voltage) supply to the stray capacitance load is switched by the switch SW _wi
Although not shown, power is consumed by the resistance component included in this switch. Also, the discharge from the stray capacitance is, in this case, D _Di , R _Di , SW _D ,
It is done on the ground path. In this way, all the charges supplied to the capacitive load by the pulse are switched elements (more precisely, SW
_w1 , SW _w2 …, SW _wn and the resistance component and R _D1 , R _D2 ,…, R
_Dn ) consumes power, and this power consumption is so large that the overall luminous efficiency of the display panel is deteriorated.

Therefore, it can be considered to apply the pulse supply circuit of FIG. 3 (a) to the repetitive pulse generation circuit of FIG. However, the pulse supply circuit of FIG. 3 (a) cannot be used as it is for the sustain pulse generating circuit of the repetitive pulse of FIG. It can charge but not discharge a capacitive load due to the rectifying nature of the diode used. Even if discharging is performed by another circuit, the number of diodes turned on differs depending on the number of display anodes written during charging, so the equivalent capacitance value cannot be realized depending on the video signal. Is.

In the method of FIG. 4 (a), the sustain pulse interferes when the write pulse is shaped, and in the method of FIG. 4 (b), it is difficult to form an integrated circuit and the cost is high.

(Means for Solving Problems) An object of the present invention is to eliminate the above-mentioned drawbacks and to significantly reduce power consumption, for example, a display properly incorporating the pulse supply circuit shown in FIG. 3 (a). It is intended to provide a drive circuit for a device.

That is, the drive circuit of the display device of the present invention outputs a combination of binary input signals in the drive circuit which supplies the write pulse and the sustain pulse to each load of the discharge memory type display device having a plurality of capacitive loads. Is provided with a drive circuit for the write pulse configured by a controllable push-pull circuit including an open state, and from the supply circuit for the sustain pulse when the output state of the drive circuit for the write pulse is the open state. The sustain pulse is supplied through at least a switch element having an open / closed state.

(Embodiment) FIG. 1 shows a circuit configuration (a) of the first embodiment of the present invention,
The waveform of each part and the state (b) of each switch are shown. However, in this case, the number of display anodes is limited to two.

Write pulse drive circuit switch elements S _A1 and S
_A2 takes the state W in the written state and the state N in the non-written state. The voltage waveforms v ₁ and v ₂ show the waveforms of the two anode buses. The states of the switch elements S _A1 and S _A2 indicate that the switch elements are in an open state, which has a sufficiently high impedance. Therefore, the switch element S _Ai
When (i is 1 or 2) is in state W, voltage waveform
The voltage of v ₁ maintains the voltage V _w . Next, the switching element S _{Ai is set} to the state via the state N, and then the switching element S _{Bi is set} to o.
Set to n (Cl). As a general rule, at least one of the switch elements S _Ai and S _Bi is open. The sustain pulse supply circuit including the switch elements S _C1 and S _C2 is the same as the pulse supply circuit shown in FIG. 3 (a), by which the sustain pulse is supplied to the display anode. At this time, if the DC voltage sources V ₁ and V ₂ of this supply circuit have a relationship of 2V ₁ = V ₂ , the top of the sustain pulse SP is at voltage V ₂ and the bottom of the sustain pulse SP is at 2V.
_There is no contradiction with the case where _1- V ₂ = 0 and the switching element S _Ai enters the state N.

Separately, as is apparent from FIG. 3 (b), the switching element S _Bi
Must be a bidirectional switch element, but the switch element S _Ai need not be.

Next, a specific configuration of each switch element will be shown.

The configuration of the switch element S _Ai is shown in FIG. FIG. 3A shows an example of a totem pole type bipolar transistor. That is, the drive circuit for the write pulse WP according to the present invention is constituted by the power supply V _w shown in the first figure and the switch elements S _A1 and SA _A2 . In the present invention, this portion is output by a combination of binary input signals. This state is composed of a push-pull circuit that can be controlled including the open state. As shown in the drawing, when a binary A or B signal of an appropriate level is input to the input, either N or W can be taken accordingly. This is similar to a logic IC that takes three states. The diode D is a protection diode for preventing the output from exceeding the voltage value V _w .

FIG. 5B shows an example of a MOS (complementary MOS) type. As described above, in the present invention, since the write pulse drive circuit is configured by the push-pull circuit using the totem pole type or complementary type bipolar transistor or FET, there is at least no DC power loss and at most one electrode. The power consumed by charging and discharging the stray capacitance of the electrodes (about 100 mW, which is also present in the conventional drive circuit shown in FIG. 2) to drive the electrode remains, resulting in extremely small power consumption. Become.

FIG. 6 shows the configuration of the switch element S _Bi . The figure (a) uses a bipolar transistor, and the figure (b) uses a CMOSFET. A pulse is applied between the emitter and the source via a transformer or an optical coupling device so that the base and the gate are turned on when necessary.

FIG. 7 shows the circuit configuration of the second embodiment of the present invention. This is a configuration in which the sustain pulse can be supplied without changing the conventional circuit configuration shown in FIG. 2 so much. Also in this circuit configuration, the number of display anodes is limited to two.
Here, the switch element S _D is for removing the signal leakage due to the line capacitance between the two loads, and is turned on only in the first period of the write pulse period. During the period of the sustain pulse, the write pulse voltage values v _1i , v _2i, etc. fall to zero V, so that there is no outflow to the sustain pulse supply circuit side due to the diodes D ₁₁ , D _21, etc.

The configuration shown in FIG. 8 is a third modified version of the configuration shown in FIG.
In this embodiment, the switch element portion is simplified. The switch elements S _E1 and S _E2 may be unidirectional switches in the direction of the arrow. The switch elements S _E1 and S _E2 are generally
However, if the write pulse is specific, it may be turned on separately according to the specific write pulse.

By the way, in the configuration circuit shown in FIG. 8, when the writing has already been performed, that is, when at least one of v _{1 and} v ₂ has reached the writing voltage, the circuit for applying the sustain pulse is the same as the conventional one. It was found that the required amplitude could not be obtained by connecting to.

This problem can be abstracted as follows. That is, in the circuit as shown in FIG. 9, the total capacitance is C and the writing rate is 1-a (a is a parameter, 0 ≦ a ≦ 1 and shows the rate of the number of unwritten electrodes).

As an initial condition Assuming that D ₁ and D ₂ are ideal diodes.

By solving the above equation, i, v is expressed by the following equation, where 0 ≦ v ≦ V ₁ .

i = aω ₁ CV sin ω ₁ t (3) v = V (1-cos ω ₁ ) (4) Is.

v (t ₁₎ = V ₁ to become t ₁ is, Becomes

Next, when V ₁ ≦ v, D ₁ and D ₂ become conductive and i = I _α sin (ωt + θ) (8) here, Next, a specific example is shown.

Let V = V ₁ .

If t ′ = t−t ₁ And the waveform of v becomes as shown in FIG. 10 depending on the parameter a. That is, a = 0, when all are written,
With this driving method, the voltage of the sustain pulse does not rise any further. This is intuitively clear. That is, if V and v (o) = V _{1 in} FIG. 9 are equal, nothing happens even if S is closed because the voltage across L is 0. On the other hand, when a = 1, it rises to v = 2v as usual.

Therefore, in order to obtain the required amplitude of v even when a = 0, it is necessary to set V to V ₁ or more.

When a = 0, v = V− (V−V ₁ ) cos ωt (14), so the maximum value is 2V−V _{1 as} shown in FIG. This may be set as a required voltage, but when a> 0, this voltage is exceeded and a problem occurs. Even in this method, since a = 0.5 in the actual image, it suffices to set it to a voltage corresponding to it, but the following two methods have solved this problem.

Third Embodiment The value of a = 1-ω can be determined in advance. That is, since it is determined by the ratio of the number of 1's and 0's of the signals coming to the sequential simultaneous converter, it can be determined before adding the write signal. V may be changed at that value so that the maximum value becomes the required voltage. The structure is shown in FIG. The clock pulse may be gated by a sequential signal, the number of 1s may be counted by a counter, and appropriately processed to control the voltage.

Fourth Embodiment FIG. 13 shows the configuration of this example.

In this circuit, the minimum t such that v (o) = 0, v (t) = V _s is t
_c Thus, the waveform shown in FIG. 14 is obtained. i As is evident from the _second direction, minute electromotive force L exceeding V _s power to flow back to V _s side back to the power supply side. A switch for holding V _{s in} this circuit
If S ₂ is put in properly, a pulse of amplitude V _s can be supplied to the load. If the value of V Oke made larger than the value of V _1, even when a = 0, raised to _{2V-V 1, 2V-V} 1 ≧
If V _s , that is, V ≧ 0.5 (V _s + V ₁ ), V _s can be obtained in any case.

The circuit of FIG. 13 can be used in other cases as well. For example, when there is resistance in L or S ₁ and the loss due to that is indefinite.

Next, I will write about other detailed ideas. The position for inserting the inductance L may be in series with the switch. When charging and discharging, different L values may be used to change the values, and the power sources corresponding to the value V may be changed to different values. Further, although the effect becomes worse, it may be used only for one process of only charging or discharging, and another power reduction method may be used for other processes.

When the power returned to one power source is surplus, it can be transferred to another power source by using an appropriate converter.

When using unidirectional switches, it is possible to apply an appropriate bias to keep them in the OFF state.

Partial combination implementations between the respective embodiments are also possible. The above example is about driving of the discharge type pulse memory panel, but it is also applicable to the case where different signals and a pulse common to all are supplied to a plurality of capacitive loads. It can also be applied to AC type discharge panels, EL, and other conversion elements and devices.

(Effects of the Invention) Although the configuration of the driving circuit of the present invention has been described in detail above, by using the driving circuit of the present invention, a device having a conventional capacitive load, for example, driving of a discharge display panel, particularly a pulse memory type display panel, is driven. The circuit consumes a large amount of power that cannot be overlooked relative to the power supplied to the capacitive load. The loss due to the resistance component remains, but this is very small). Further, these driving circuits can be easily integrated into an integrated circuit.

[Brief description of drawings]

FIG. 1 shows the circuit configuration (a) of the first embodiment of the present invention, the waveform of each part and the state of each switch (b), and FIG. 2 is a conventional discharge display panel DC discharge pulse memory type drive. FIG. 3 shows a circuit, FIG. 3 shows a circuit (a) of a pulse supply circuit applied to the drive circuit of the present invention and waveforms (b) of respective parts, and FIGS. 4 (a) and 4 (b) show sustain pulses. Two examples of applying the write pulse are shown, FIGS. 5 (a) and 5 (b) show two examples of the configuration of the switch element S _Ai used in the embodiment of the present invention, and FIGS.
Similarly, (b) shows two examples of the configuration of the switch element S _Bi , FIGS. 7 and 8 show circuit configurations of the second and third embodiments of the present invention, and FIG. FIG. 10 shows a circuit generalized for the analysis of the circuit of the third embodiment shown in the drawings, FIGS. 10 and 11 show the respective analysis results, and FIGS. 12 and 13 show the present invention. FIG. 14 shows a block diagram and circuits of the circuit configurations of the third and fourth embodiments, and FIG. 14 is a diagram showing waveforms of respective parts of the thirteenth illustrated circuit. S _Ai (SA ₁ , SA ₂ ) ... write pulse switch element W, N, .... Switch element write state, non-write state and open state, v _i (v ₁ , v ₂ ), v, v _s … … Voltage waveform S _Bi (S _B1 , S _B2 ) …… Switch element, Cl …… Switch element off, on L …… Inductance C, C ₁ , C ₂ …… Capacitive load S _c1 , S _c2 …. ... sustain pulse supply switch element WP, SP ... write pulse and sustain pulse D _w (D _w1 , D _w2 , ..., D _wn ) ... first diode group D _s (D _s1 , D _s2 , ..., D _sn ) …… Second diode group DA (DA1, DA2, ..., DAn) …… Display anode S ₁ , S ₂ …… First and second switch elements A, B …… Two level values D, D ₁₁ , D ₂₁ …… Diode S, S _D …… Switch element D ₁ , D ₂ , D ₃ …… Diode v, i …… Voltage and current waveform TR1, TR2 …… Transformer

Claims (2)

[Claims] 1. A drive circuit for supplying a write pulse and a sustain pulse to each load of a discharge memory type display device having a plurality of capacitive loads, wherein an output state is opened by a combination of binary input signals. And a write pulse drive circuit composed of a controllable push-pull circuit, and when the output state of the write pulse drive circuit is an open state, at least an open / closed state from the sustain pulse supply circuit is provided. A drive circuit for a display device, wherein the sustain pulse is supplied through a switch element that the display circuit has. 2. The sustain pulse supply circuit connects an inductance element (L) to one end of a capacitive load (C), and connects the inductance element (L) via first and second switch elements (S ₁ , S ₂ ), respectively. , Two DC voltage sources (V ₁ , V ₂ ) having different voltage values are connected to both ends of the inductance element (L) respectively, and the circuit of the _second switch element (S ₂ ) is turned off.
Approximately half the time of the resonant period associated with the capacitance (C) of the capacitive load and the inductance (L) of the inductance element during the period. The first switch element (S ₁ ) is closed on twice, and the second switch element (S ₂ ) is turned on continuously after the first on period of the first switch element (S ₁ ). The amplitude (2 (V ₂ -V ₁ )) related to the different voltage values.
The drive circuit of the display device according to claim 1, wherein a voltage pulse having the following is supplied to the capacitive load.