JPH0797470B2 - Relay contact switching prohibition circuit at power on - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention is a relay-controlled power supply circuit that prohibits switching of relay contacts when the power is on.

(B) Conventional Technology and Problems Next, a conventional relay-controlled power supply circuit will be described with reference to FIG.

In FIG. 4, 1 is a control circuit, 2 is a D-type flip-flop (hereinafter referred to as FF), 3 is an inverting driver, 4 is a relay, 5 is a power supply, 6 is a relay contact, and 7 is a load.

The control circuit 1 outputs a time signal 11, a time signal 12 and a time signal 13 which will be described later.

The time signal 11 is connected to the D terminal of the D type FF2, and the time signal 12 is connected to the T terminal.

The “1” output of the D-type FF 2 is connected to the input of the inverting driver 3, and the relay 4 is turned on / off by the output of the inverting driver 3.

If the output of D-type FF2 can drive relay 4,
The inverting driver 3 is omitted, and the "0" output of the D-type FF2 is connected to the relay 4.

The power supply 5 is turned on / off by the time signal 13.

A relay contact 6 which is turned on and off by the relay 4 is connected between a power source 5 and a load 7.

In order to supply power to the load 7, the relay contact 6 is contacted and the power supply 5 is turned on.

In order to make contact with the relay contact 6, the relay 4 is turned on.

A method of turning on the relay 4 will be described with reference to the time chart of FIG.

2A shows the waveform of the time signal 11, and FIG. 2A shows the waveform of the time signal 12.

The time signal 11 is turned on at time T1, turned off at time T5, and the time signal 12 is turned on at time T2 and turned on at time T6. Time signal
12 is a signal that turns off as soon as it turns on.

Time signal 11 enters D terminal of D-type FF2, time signal 12 becomes D
When you enter the T terminal of type FF2, from the "1" output of type D FF2,
The waveform shown in Fig. 2c appears.

When this waveform passes through the inverting driver 3, it becomes the inverted waveform of FIG. 2C, becomes “0” between the time T2 and the time T6, and the relay 4 is turned on.

FIG. 2C shows the state where the relay contact 6 is in contact.

Figure 2e shows the waveform of the time signal 13, which is the time of day.
Turns on at time T3 later than T2 and earlier than time T5
Turns off at T4.

When the time signal 13 is on, the power supply 5 is turned on, and the power is supplied from the relay contact 6 to the load 7.

The power supply 5 is turned on between the time T3 and the time T4, the relay contact 6 is contacted at the time T2, and is disconnected at the time T6.

As is clear from FIGS. 2E and 2E, the power supply circuit of FIG. 4 disconnects the relay contact 6 when the power supply 5 is off.

If the relay contact 6 as shown in FIG. 4 is disconnected when the power supply 5 is on, the relay contact 6 will deteriorate, so normally the power supply 5
The relay contact 6 is cut off when is turned off.

However, due to human error such as operation error or program error, the relay contact 6 may be disconnected while the power supply 5 is on, and the relay contact 6 may be deteriorated or damaged without being noticed.

(C) Object of the Invention The present invention improves a conventional power supply circuit by relay control and provides a relay contact switching prohibition circuit at power-on so that the relay 4 does not operate when the power supply 5 is on. And

(D) Embodiment of the Invention Next, FIG. 1 shows a circuit diagram of an embodiment according to the present invention.

In FIG. 1, 8 is an exclusive OR circuit, 9 is an AND gate, and other parts are the same as in FIG.

That is, FIG. 1 shows an AND circuit of FIG.
It has a gate added.

The exclusive OR circuit 8 is connected with the time signal 11 and the "1" output of the D-type FF2 as inputs.

The output of the exclusive OR circuit 8 and the power supply 5 are connected to the AND gate 9.
Connect the ON signal 16 of as an input.

The ON signal 16 of the power supply 5 is a signal that is output when the power supply 5 is ON.

Next, the operation of FIG. 1 will be described with reference to the timing chart of FIG.

Since the operation of FIG. 4 has been described with reference to FIGS.

FIG. 2D shows the output waveform of the exclusive OR circuit 8.
The figure shows the waveform of the ON signal 16 of the power supply 5.

The exclusive OR circuit 8 is "1" between the times T1 and T2 and the times T5 and T6, and the ON signal 16 of the power supply 5 is "1" during the times T3 and T4.

FIG. 2C shows the waveform of the output signal 17 of the AND gate 9, which is “0” in the state of FIG.

Next, a time chart of another state of FIG. 1 is shown in FIG.

FIG. 3 is a state diagram in the case where the ON signal 16 of the power source 5 is still ON after the time T4.

In the case of FIG. 3, the AND gate 9 is turned on at time T5, and A
Send the output signal 17 of the ND gate 9 to the control circuit 1A,
Do not output the time signal 12 at time T6 from 1A.

Therefore, when the power supply 5 is on, the time signal 12 is not output at the output of the AND gate 9 and the relay 4 cannot be turned off.

(E) Effects of the Invention According to the present invention, an exclusive OR circuit and an AND gate are added to a relay-controlled power supply circuit, and when the power is on, the relay is turned off by the output of the AND gate. Since it is not possible, it has the following effects.

Even if an attempt is made to switch the relay contact that is being energized due to a human error, it is detected before the relay operates, and the relay operation is forcibly prevented, so that the deterioration of the relay can be prevented.

By using the AND gate output, human error can be displayed as an alarm and the operator can be alerted.

[Brief description of drawings]

FIG. 1 is a circuit diagram of an embodiment according to the present invention, FIG. 2 and FIG.
FIG. 1 is a timing chart of FIG. 1, and FIG. 4 is a circuit diagram of a conventional power supply circuit by relay control. 1A ... Control circuit, 2 ... D-type flip-flop (D-type F
F), 3 ... Inversion driver, 4 ... Relay, 5 ... Power supply, 6 ... Relay contact, 7 ... Load, 8 ... Exclusive OR circuit, 9 ... AND gate, 11 to 13 ... Time signal, 16 ...
... ON signal of the power supply 5.

Claims (1)

[Claims] 1. A control circuit (1A) which outputs a first time signal (11), a second time signal (12) and a third time signal (13).
And a D-type FF (2) that connects the first time signal (11) to the D terminal and the second time signal (12) to the T terminal, and a D-type
The relay (4) that turns on and off with the output of FF (2), the power supply (5) that turns on and off with the third time signal (13), and the power supply (5) and the load (7) are connected to each other, ) In a relay-controlled power supply circuit having a relay contact (6) for making on / off connection, an exclusive OR circuit (1) that receives the first time signal (11) and the output of the D-type FF (2) as input 8) and an AND gate (9) that receives the output of the exclusive OR circuit (8) and the ON signal (16) of the power supply (5) as an input, and when the power supply (5) is ON, the AND gate ( A relay contact switching prohibition circuit at power-on, characterized in that the second time signal (12) is turned off by the output of 9).