JPH0797537B2 - Method for manufacturing monolithic ceramic capacitor - Google Patents
Method for manufacturing monolithic ceramic capacitorInfo
- Publication number
- JPH0797537B2 JPH0797537B2 JP5155955A JP15595593A JPH0797537B2 JP H0797537 B2 JPH0797537 B2 JP H0797537B2 JP 5155955 A JP5155955 A JP 5155955A JP 15595593 A JP15595593 A JP 15595593A JP H0797537 B2 JPH0797537 B2 JP H0797537B2
- Authority
- JP
- Japan
- Prior art keywords
- ceramic capacitor
- laminated body
- manufacturing
- cutting
- laminated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Length Measuring Devices Characterised By Use Of Acoustic Means (AREA)
- Ceramic Capacitors (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明は、積層セラミックコンデ
ンサの製造方法に関し、得に内部電極が形成された積層
体をチップ状に切断する際の切断位置決め方法に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a laminated ceramic capacitor, and more particularly to a cutting and positioning method for cutting a laminated body having internal electrodes formed into chips.
【0002】[0002]
【従来の技術】積層セラミックコンデンサの製造工程
は、図6に示すように、内部電極4を塗布形成したセラ
ミックグリーンシート3を複数枚積層し、さらにその上
下より内部電極の塗布されていないセラミックグリーン
シート数枚で挟み込んだ後、加圧プレスし、積層体2を
形成する。次に積層体を内部電極4の位置に合わせて縦
横に切断し、図5の如き角形の生チップ8を切り出す。
切り出した生チップ8は焼成した後、外部電極を両端面
に塗布し完成する。2. Description of the Related Art As shown in FIG. 6, a manufacturing process of a monolithic ceramic capacitor comprises laminating a plurality of ceramic green sheets 3 each having an internal electrode 4 applied thereon, and further arranging a ceramic green sheet having no internal electrode applied from above and below. After sandwiched by several sheets, pressure pressing is performed to form a laminated body 2. Next, the laminate is cut vertically and horizontally according to the position of the internal electrode 4, and a rectangular raw chip 8 as shown in FIG. 5 is cut out.
The cut raw chip 8 is baked, and then external electrodes are applied to both end surfaces to complete.
【0003】従来、積層体を切断する際に用いられる切
断の位置決め方法には特開昭64−73709に開示さ
れている。これはグリーンシート3を加圧プレスして積
層体2を形成する際、例えば静水圧プレスを用い液中の
積層体2の周囲から均一に圧力を加え、グリーンシート
3を圧着する。この際、内部のグリーンシート3には内
部電極4が塗布形成されているため、グリーンシート3
を複数枚積層すると積層トータル厚みにおいて内部電極
4のある部分とない部分に内部電極4の合計厚み分だけ
の差がある。この積層体2に静水圧が加えられると内部
電極4のない部分の表面が(電極厚×電極形成グリーン
シート枚数)×1/2だけ凹入し、図3−(b)に示す
ように内部電極4のある部分とない部分の境界に段差5
が形成される。この表面の段差5をイメージセンサ等を
用いて光学的に検出し、これを基に切断位置を決定し、
生チップが切り出されていた。A conventional cutting positioning method used for cutting a laminated body is disclosed in Japanese Patent Laid-Open No. 64-73709. When the green sheet 3 is pressure-pressed to form the laminated body 2, for example, a hydrostatic pressure is used to uniformly apply pressure from around the laminated body 2 in the liquid to press-bond the green sheet 3. At this time, since the internal electrodes 4 are formed by coating on the internal green sheet 3, the green sheet 3
When a plurality of the internal electrodes 4 are laminated, there is a difference in the total laminated thickness between the portion with the internal electrodes 4 and the portion without the internal electrodes 4 by the total thickness of the internal electrodes 4. When hydrostatic pressure is applied to the laminated body 2, the surface of the portion without the internal electrodes 4 is recessed by (electrode thickness × the number of electrode forming green sheets) × 1/2, and as shown in FIG. A step 5 is formed at the boundary between the portion with and without the electrode 4.
Is formed. The step 5 on the surface is optically detected using an image sensor or the like, and the cutting position is determined based on this.
Raw chips had been cut out.
【0004】[0004]
【発明が解決しようとする課題】従来の位置決め方法で
は、グリーンシートに塗布された内部電極の厚みが1〜
2μ程度で、積層枚数が枚数(10枚以下)という様な
積層セラミックコンデンサでは、静水圧プレスをかけて
も段差5が表面に表われないため検出不可という問題が
あった。また非常に小型の積層セラミックコンデンサを
製造する様な場合、図5の切断後の生チップのマージン
部分7が極端に狭くなり、段差5部分が正確に読み取れ
ず、所定の切断位置6に対しずれた位置で切断されるた
め、マージン部分7が所定の幅よりさらに小さくなって
絶縁不良等をおこしていた。In the conventional positioning method, the thickness of the internal electrode applied to the green sheet is 1 to 1.
In the case of a laminated ceramic capacitor having a laminated number of about 2 μm (10 or less), there is a problem that the step 5 cannot be detected because the step 5 does not appear on the surface even when the isostatic pressing is performed. Further, in the case of manufacturing a very small monolithic ceramic capacitor, the margin portion 7 of the raw chip after cutting in FIG. 5 becomes extremely narrow, the step 5 portion cannot be read accurately, and it shifts from the predetermined cutting position 6. Since it is cut at a different position, the margin portion 7 becomes smaller than a predetermined width, resulting in insulation failure or the like.
【0005】[0005]
【課題を解決するための手段】本発明の目的は、かかる
従来欠点を解決した積層セラミックコンデンサの製造方
法を提供することになる。SUMMARY OF THE INVENTION It is an object of the present invention to provide a method for manufacturing a monolithic ceramic capacitor which solves the above-mentioned conventional drawbacks.
【0006】本発明によれば、内部電極を塗布したグリ
ーンシートを複数枚積層しさらにその上下より内部電極
の塗布されていないセラミックグリーンシート数枚で挟
み込み加圧プレスされた積層体において、前記積層体の
内部電極を電気的に検出して、これを基に切断位置を決
定しこの切断位置で積層体を切断して生チップを切り出
すように構成したものである。According to the present invention, a plurality of green sheets to which internal electrodes are applied are laminated, and further, a plurality of ceramic green sheets to which internal electrodes are not applied are sandwiched from above and below to be pressed and pressed. The internal electrode of the body is electrically detected, the cutting position is determined based on this, and the laminated body is cut at this cutting position to cut out the raw chip.
【0007】[0007]
【実施例】以下、本発明の第1の実施例を図1及び図2
を参照して説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below with reference to FIGS.
Will be described with reference to.
【0008】まず、表面に所定のパターンで内部電極4
を塗布したセラミックグリーンシート3を所定枚数重
ね、さらにその上下より内部電極4の塗布されていない
セラミックグリーンシート(所定枚数)で挟み込み、加
圧プレスして積層体2を形成する。次に図1に示すよう
に積層体2上をうず電流式センサ1が上下左右に移動
し、内部電極4の位置を電圧差により検出する。例えば
図2に示すように積層体上のセンサーが左から右に移動
すると内部電極4がある部分で約3.5(V)、内部電
極4のない部分(電極間)で約4.0(V)を示す。こ
こで検出位置d、およびf付近の電圧約3.75(V)
を仕切り電圧として、検出位置がc→d→e→fへと移
動する段階で3.75(V)を超えた検出位置dと、
3.75(V)を割った検出位置fとの中間の位置を切
断位置とする。また縦方向も同様に切断位置を検出して
切断する。First, the internal electrode 4 is formed on the surface in a predetermined pattern.
A predetermined number of the coated ceramic green sheets 3 are stacked, and the ceramic green sheets (predetermined number) on which the internal electrodes 4 are not applied are sandwiched from above and below, and pressed to form a laminated body 2. Next, as shown in FIG. 1, the eddy current sensor 1 moves vertically and horizontally on the laminated body 2 to detect the position of the internal electrode 4 by the voltage difference. For example, as shown in FIG. 2, when the sensor on the laminated body moves from left to right, it is about 3.5 (V) at a portion where the internal electrode 4 is present and about 4.0 (at a portion without the internal electrode 4 (between the electrodes)). V) is shown. Here, the voltage around the detection position d and f is about 3.75 (V)
Is a partition voltage, and the detection position d exceeds 3.75 (V) when the detection position moves from c → d → e → f,
A position intermediate to the detection position f obtained by dividing 3.75 (V) is set as a cutting position. In the vertical direction, the cutting position is similarly detected and the cutting is performed.
【0009】以上のように、うず電流式センサで内部電
極4の位置を検出し、この検出位置を基に切断6を決定
し、この切断位置6に沿って刃物で積層体を切断するこ
とにより、図5の如き生チップ8を切り出す。このよう
に切り出された生チップ8は焼成した後、外部電極を両
端面に塗布し完成する。As described above, the position of the internal electrode 4 is detected by the eddy current type sensor, the cutting 6 is determined based on the detected position, and the laminate is cut along the cutting position 6 with a blade. The raw chip 8 as shown in FIG. 5 is cut out. The raw chip 8 thus cut out is baked, and then external electrodes are applied to both end faces to complete the process.
【0010】以上の説明では電気的検出手段としてうず
電流式センサを例に挙げたが、それ以外に静電容量式や
超音波式のセンサを採用してもかまわない。In the above description, the eddy current type sensor is taken as an example of the electric detection means, but other than that, a capacitance type sensor or an ultrasonic type sensor may be adopted.
【0011】[0011]
【発明の効果】以上本発明によると積層体2の内部電極
4の位置を電気的に検出し、これを基に切断位置6を決
定するようにしたので段差5が表面に表われないような
積層体2や小型コンデンサのようにマージン部分7が狭
いため段差5部分も狭いものでも切断位置6が正確に検
出できないという問題がなくなり、小型品のマージン部
分7が狭いものでも切断が可能となる。また切断による
不良率が低減するという多大な効果を有する。As described above, according to the present invention, the position of the internal electrode 4 of the laminated body 2 is electrically detected and the cutting position 6 is determined based on this, so that the step 5 does not appear on the surface. Since the margin portion 7 is narrow such as the laminated body 2 and the small capacitor, there is no problem that the cutting position 6 cannot be accurately detected even if the step 5 portion is also narrow, and it is possible to cut even the small margin portion 7 having the narrow margin portion 7. . Further, it has a great effect that the defective rate due to cutting is reduced.
【図1】本発明の概略図。FIG. 1 is a schematic diagram of the present invention.
【図2】図1で示した内部電極位置とセンサの出力電圧
との関係図。FIG. 2 is a relationship diagram between the internal electrode position shown in FIG. 1 and the output voltage of the sensor.
【図3】(a)は積層体の断面図(段差なし)、(b)
は積層体の断面図(段差あり)。FIG. 3 (a) is a cross-sectional view of a laminate (without step), (b).
Is a cross-sectional view of the laminated body (with steps).
【図4】積層体の切断部拡大図。FIG. 4 is an enlarged view of a cut portion of the laminated body.
【図5】積層セラミックコンデンサ、生チップの斜視
図。FIG. 5 is a perspective view of a monolithic ceramic capacitor and a raw chip.
【図6】積層体の構成を示す模式図。FIG. 6 is a schematic diagram showing a configuration of a laminated body.
1 センサ(うず電流式) 2 積層体 3 グリーンシート 4 内部電極 5 段差 6 切断位置 7 マージン 8 生チップ 1 sensor (eddy current type) 2 laminated body 3 green sheet 4 internal electrode 5 step 6 cutting position 7 margin 8 raw chip
Claims (4)
シートを複数枚積層し、さらにその上下より内部電極の
塗布されていないセラミックグリーンシート枚数で挟み
込み加圧プレスされた積層体において、前記積層体の内
部電極を電気的に検出して、これを基に切断位置を決定
し、積層体を切断し、生チップを切り出すことを特徴と
する積層セラミックコンデンサの製造方法。1. A laminated body in which a plurality of ceramic green sheets coated with internal electrodes are laminated, and further pressed from above and below by the number of the ceramic green sheets not coated with internal electrodes, the inside of said laminated body being pressed. A method for manufacturing a monolithic ceramic capacitor, which comprises electrically detecting an electrode, determining a cutting position based on this, cutting the laminated body, and cutting out a raw chip.
サーであることを特徴とする請求項1記載の積層セラミ
ックコンデンサの製造方法。2. The method for manufacturing a laminated ceramic capacitor according to claim 1, wherein the electrical detection method is an eddy current sensor.
サーであることを特徴とする請求項1記載の積層セラミ
ックコンデンサの製造方法。3. The method of manufacturing a monolithic ceramic capacitor according to claim 1, wherein the electrical detection method is a capacitance type sensor.
ーであることを特徴とする請求項1記載のセラミックコ
ンデンサの製造方法。4. The method of manufacturing a ceramic capacitor according to claim 1, wherein the electrical detection method is an ultrasonic sensor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5155955A JPH0797537B2 (en) | 1993-06-28 | 1993-06-28 | Method for manufacturing monolithic ceramic capacitor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5155955A JPH0797537B2 (en) | 1993-06-28 | 1993-06-28 | Method for manufacturing monolithic ceramic capacitor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0714744A JPH0714744A (en) | 1995-01-17 |
| JPH0797537B2 true JPH0797537B2 (en) | 1995-10-18 |
Family
ID=15617189
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5155955A Expired - Lifetime JPH0797537B2 (en) | 1993-06-28 | 1993-06-28 | Method for manufacturing monolithic ceramic capacitor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0797537B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009050536A (en) * | 2007-08-28 | 2009-03-12 | Samii Kk | Game machine |
| JP7083654B2 (en) * | 2018-02-05 | 2022-06-13 | 株式会社ディスコ | How to detect the planned split line |
-
1993
- 1993-06-28 JP JP5155955A patent/JPH0797537B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0714744A (en) | 1995-01-17 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 19960416 |