JPH079935B2 - Semiconductor device - Google Patents

Description

The present invention relates to a semiconductor device, and more particularly to a semiconductor device including a multi-layer wiring.

[Conventional technology]

Generally, as a method of opening a contact window of a wiring in a semiconductor device having a multilayer wiring, there are a method using isotropic etching, a method using anisotropic etching, a method using a combination of both, and the like. is there. Among these methods, the method of completely opening holes by anisotropic etching after opening holes halfway by isotropic etching has the conventional semiconductor device in which both pattern accuracy and step coverage of upper layer wiring (step coverage) are improved. From the viewpoint, it is often used as a good method.

[Problems to be solved by the invention]

In the conventional semiconductor device described above, the portion to be etched due to the anisotropy of the contact window is often set to several hundred nm (for example, 500 nm) in terms of the pattern size, and the upper wiring is deposited by the sputtering method. For metals such as aluminum, step coverage (step coverage)
Was enough.

However, in a semiconductor device that requires extremely high speed and high reliability, a plurality of metal layers such as titanium-platinum-gold or titanium-palladium-gold are often used for the upper wiring. In this case, the first metal that covers the contact window first is often titanium, a titanium alloy, or a titanium compound, but the vertical portion of the side surface formed by anisotropic etching of the contact window is a normal number. 100 nm,
In particular, when the thickness is 200 nm or more, the covering property is extremely poor, and as a result, the semiconductor device manufacturing yield and quality are deteriorated.

This problem indicates that the step coverage is not improved simply by depositing a thicker layer of metal, and if it is too thick, then the stress of the film will be applied to the interlayer insulating film. Even the inconvenience of generating microcracks was added.

[Means for solving problems]

A semiconductor device of the present invention is a multilayer wiring type semiconductor device comprising a lower layer and an upper conductor layer which are stacked via an interlayer insulating film and are connected to each other through a contact window opened in the interlayer insulating film. The conductor layer is composed of a plurality of conductor layers including a first metal layer for adhesion to the lower conductor layer and a second metal layer for diffusion prevention, and the interlayer insulating film is an oxide film and an oxide film on the oxide film. It is made of a nitride film, and the side surface of the contact window is composed of an upper tapered portion formed over the entire thickness of the nitride film and a lower vertical portion formed over the entire thickness of the oxide film. Accordingly, the height of the vertical portion set by the film thickness of the oxide film has a predetermined height of less than 200 nm.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view of an embodiment of the semiconductor device of the present invention.

In this embodiment, a contact window is opened in the oxide film 3a and the nitride film 3b which cover the lower Al wiring 2 formed on the semiconductor substrate 1 by isotropic and anisotropic etching, respectively, and the contact is further made. Ti layer 6a, Pt layer 6b and Au layer 6 covering the window
It has a structure in which a plurality of metal layers of c are provided. Here, if the thickness d of the oxide film 3a is less than 200 nm and is, for example, about 100 nm, the height of the vertical portion of the side surface of the contact window is 100 nm.
As a result, the contact window has a shape that improves the step coverage of the upper metal layer (step coverage).

2 (a) to 2 (c) are cross-sectional views of a semiconductor chip showing the order of steps for explaining one embodiment of the method for manufacturing a semiconductor device of the present invention.

In this embodiment, first, as shown in FIG. 2A, an oxide film 3a having a thickness of about 100 nm and a nitride film 3b thereon are sequentially formed on a semiconductor substrate 1 having an Al wiring 2 formed on its surface. Form.

Next, as shown in FIG. 2 (b), after forming a photoresist film 4 having an opening for forming a contact window, first, nitriding is performed by isotropic plasma etching using the photoresist film 4 as a mask. The film 3b is removed to open a contact window 5a.

At this time, generally, the etching rates of the nitride film and the oxide film in the isotropic plasma etching are considerably different, so that it is relatively easy to terminate the isotropic plasma etching after just removing the nitride film.

In this way, after the contact window 5a is opened in the portion of the nitride film 3b by isotropic plasma etching, as shown in FIG. 2 (c), the oxide film 3a is opened in the contact window by anisotropic etching. Open part 5b. Therefore, of the height removed by anisotropic etching, the height of the portion of the contact window perpendicular to the semiconductor substrate is approximately equal to the thickness of the oxide film 3a, and in this case, is controlled to a value of about 100 nm. be able to.

Next, after removing the photoresist film 4, first, the Ti layer 6a and the Pt layer 6b, which are the upper metal, are deposited. In the present invention, since the shape of the contact window is extremely easy to cover, it is possible to obtain a sufficient covering state even with a metal layer having poor covering properties such as the Ti layer 6a and the Pt layer 6b. You can Then, Ti layer 6a and Pt layer 6b are formed by dry etching or the like.
After patterning, the Au layer 6c is deposited by plating or the like to complete an embodiment of the semiconductor device of the present invention.

In fact, we also prototyped a semiconductor device in which the vertical portion of the contact window was 200 nm or more, but the step coverage was not good due to the occurrence of microcracks.

The above describes the method in the case where the present invention is applied to a semiconductor device of a multi-layer wiring type including wiring of a Ti-Pt-Au layer, but it is clear that it can be similarly applied to a semiconductor device of other similar structure. is there.

〔The invention's effect〕

As described above, the present invention, by making the portion of the side surface of the contact window connecting the upper layer wiring and the lower layer wiring perpendicular to the semiconductor substrate have a predetermined height of less than 200 nm, Even if it is a metal that is difficult to improve the step coverage with a step, it can sufficiently cover the contact window and can be processed without impairing the pattern accuracy. Therefore, a high-performance multi-layer wiring type semiconductor device can be manufactured with high yield. There is an effect that it can be manufactured with high quality.

[Brief description of drawings]

FIG. 1 is a sectional view of an embodiment of the semiconductor device of the present invention, and FIG.
FIGS. 3A to 3C are cross-sectional views of a semiconductor chip shown in the order of steps for explaining an embodiment of the method for manufacturing a semiconductor device of the present invention. 1 ... Semiconductor substrate, 2 ... Al wiring, 3a ... Oxide film, 3b ... Nitride film, 4 ... Photoresist film, 5a, 5b ... Contact window, 6a
… Ti layer, 6b… Pt layer, 6c… Au layer.

Claims (1)

[Claims] 1. A multilayer wiring type semiconductor device comprising a lower layer and an upper conductor layer, which are laminated via an interlayer insulating film and are connected to each other through a contact window opened in the interlayer insulating film. Comprises a plurality of conductor layers including a first metal layer for adhering to the lower conductor layer and a second metal layer for preventing diffusion, and the interlayer insulating film is an oxide film and a nitride film on the oxide film. The side surface of the contact window is composed of an upper tapered portion formed over the entire thickness of the nitride film and a lower vertical portion formed over the entire thickness of the oxide film. Thus, the height of the vertical portion set by the film thickness of the oxide film has a predetermined height of less than 200 nm.