JPH0799499B2 - Information processing equipment - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention In the field of knowledge information processing, the present invention is an information processing for processing a logical language (prolog) which has a function of inference such as unification (identification) or nondeterministic control as a language. It relates to the device.

[0002]

2. Description of the Related Art The unification function referred to in the present case corresponds to an operation of assigning a value to a variable in a logical programming language. Here, two structure data (patterns) including variables are used instead of simple assignment. It is a function to give the same pattern by giving (combining) appropriate values to the variables in it. FIG. 3 shows the configuration of a conventional information processing apparatus that processes such unification. In FIG.
Reference numeral 300 denotes an inference processing unit that executes a logic language having a built-in reasoning function as a machine language, and 310 has functions of storing, managing, and operating structure data including a data type of a predicate argument in the logic language. This is a structure memory section. The inference processing unit 300 includes predicate data 301 and 302 in a logical language, and unification means 303 that performs unification processing between the same arguments of the predicates of the predicate data 301 and 302. The structure memory unit 310 stores structure data 311 and 312. In this example, the structure data 311 is the predicate data 3
01 indicates the data when the argument 3 of the predicate a is structure data, and the structure data 312 indicates the data when the argument 3 of the predicate b in the predicate data 302 is the structure data.

Next, the operation will be described. As shown in FIG. 3, conventionally, when the argument of the predicate is structure data, it is stored in a structure memory unit 310 independent of the inference processing unit 300 in a list format having a pointer. When the unification process is executed between the arguments of the predicate a in the predicate data 301 and the predicate b in the predicate data 302, the unification unit 303 performs the unification with the same argument 1 in the inference processing unit 300. The unification of arguments takes place sequentially, and the argument n
This unification process ends successfully due to the success of the unification of the comrades. If the unification of the arguments fails, the processing is immediately stopped and the processing ends in failure.

As shown in FIG. 3, when the argument 3 is structure data, unification of elements of the structure data 311 and 312 stored in the structure memory unit 310 is performed. In this case, since the pointers of the list are traced one step at a time to fetch the data into the inference processing unit 300 and perform unification, the contents of the structure memory unit 310 are frequently referenced and the processing time increases.

[0005]

In the conventional information processing apparatus, when the unification of predicates having a plurality of arguments is executed, the structure data stored in the structure memory unit has a large-scale and complicated structure. In the case of holding the data, there is a problem that it takes a long processing time because the data is accessed by tracing the pointer one by one. That is, there is a problem that the processing performance is deteriorated due to an increase in the frequency of access to the structure memory unit.

The present invention has been made in order to solve the above problems, and can efficiently execute unification processing even in inference processing that handles a large amount of structure data having a large-scale and complicated structure. The object is to obtain an information processing device capable of performing the above.

[0007]

In the information processing apparatus according to the present invention, the unification means 10 for performing the unification processing of the same arguments of predicates in the inference processing section 100.
3 is provided, and structure data is stored in the structure memory unit 110 as list data in list format and vector data in vector format.
A list processing unit that stores each data
And a vector processing unit 130.
If the argument in the inference processing unit 100 is structure data,
In parallel with the processing of the inference processing unit 100,
Unification processing of vector data related to numbers is performed.
The parallel unification means 140 is provided.

[0008]

In the inference processing unit 100, unification processing of the same arguments of predicates is performed. Structure memory unit 11
At 0, the list processing unit 120 stores the structure data in the list format, and the vector processing unit 130 stores the structure data in the vector format. Inference processing unit 1
If the argument in 00 is structure data, the above
In parallel with the processing of the logic processing unit 100, the vector processing unit
Vector data related to the argument in 130
Unification by the fictitious means 140
Processing is performed.

[0009]

EXAMPLES Example 1. (Corresponding to Claim 1) FIG. 1 is a block diagram of an information processing apparatus according to an embodiment of the present invention. In Figure 1, 100 is an inference processing unit for executing a logic programming language that incorporates the function of reasoning as machine language. The inference processing unit 100 includes predicate data 101 and 102 in a logical language and unification means 103 that performs unification processing between the same arguments of the predicates of the predicate data 101 and 102. 110
Is a structure memory unit having functions of storing, managing, and operating structure data including the data type of the argument of the predicate in the logic language. This structure memory unit 110 is
The structure data is classified into list-format list data and vector-format vector data, and the list processing unit 120 that stores the list data, the vector processing unit 130 that stores the vector data, and the inference processing unit 100.
And a parallel unification means 140 for performing unification processing in parallel on the vector data of the structure data in the vector processing unit 130 when the argument in is the structure data. 101,10
2 is predicate data in the inference processing unit 100. 121,
122 is list data in the list processing unit 120,
131 and 132 are vector data in the vector processing unit 130.

Next, the operation will be described. In this information processing apparatus, the inference processing unit 100 executes a unification process by giving a control signal to the structure memory unit 110. Further, the structure memory unit 1
10 can execute parallel unification of vector data in parallel with the processing of the inference processing unit 100. In the inference processing unit 100, unification processing is performed by the unification means 103 between arguments of the predicate a in the predicate data 101 and the predicate b in the predicate data 102.
When first executed, the unification of the arguments 1 is performed, and if the unification succeeds, the unification of the next arguments is sequentially performed. When the argument 3 is structure data as in the example shown in FIG. 1, the list processing unit 12 of the structure memory unit 110
The list data 121 and 122 stored in 0 are unified, and then the vector data 131 and 132 stored in the vector processing unit 130.
The parallel unification processing of the elements of the above is executed by the parallel unification means 140. At this time,
In the inference processing unit 100, unification of arguments 4 and later can be performed in parallel with unification in the vector processing unit 130, unification between arguments is performed one after another, and the unification of the last argument n succeeds, so that this unification process succeeds. finish. Here, if the unification of arguments is unsuccessful, the processing is immediately stopped and the processing ends in failure.

When the argument 3 is structure data as in the example shown in FIG. 1, the vector processing unit 130 uses the dedicated parallel unification means 140 in the vector processing unit 130 as in the case of the inference processing unit 100. Since the unification process is executed in parallel with the above process, the time required for the unification process can be shortened.

According to the first embodiment, the structure memory unit 1
Concerning the unification of the argument that refers to the contents of 10, the unification of the structure data in the vector format, which takes a long processing time in the conventional processing method, by using the parallel unification means 140 in the dedicated vector processing unit 130, is efficient. Unification processing is possible.

Example 2. Although the first embodiment described above is premised on an ordinary single processor having one inference processing unit 100, a plurality of inference processing units 200 and a plurality of structures as shown in FIG. The memory unit 210 and networks 240, 250, 2 that connect them to each other
An efficient unification process can be executed in the same manner as described above even in a multiprocessor type parallel inference machine including 60 and processing a plurality of inferences in parallel.

According to the second embodiment, the structure memory unit 2
The unification process of the structure data comrades, which takes a lot of time to refer to the contents of 10, can be efficiently executed by the decentralization of the parallel unification means (not shown).

[0015]

As described above, according to the present invention, structure data can be converted into list format list data and vector format vector data.
Data and a list that stores each data
The inference processing unit is equipped with a vector processing unit and a vector processing unit.
If the argument in the Science Department is structure data, the inference process
In parallel with the processing of the science section, the vector data unit
Parallel unification means for performing fiction processing
Since the above structure is provided in the structure memory unit, it is possible to effectively execute the unification process even in the inference process that handles a large amount of structure data having a large-scale and complicated structure. That is, according to the present invention, in general, as compared with the unification of arguments such as integers and atoms (basic symbols that cannot be subdivided), the contents of the structure memory section are referred to more frequently, which requires much time. The unification process of the structure data is distributed by the parallel unification means and can be efficiently executed in parallel.

[Brief description of drawings]

FIG. 1 is a configuration block diagram of an information processing apparatus according to an embodiment of the present invention.

FIG. 2 is a configuration block diagram of an information processing apparatus according to another embodiment of the present invention.

FIG. 3 is a configuration block diagram of a conventional information processing device.

[Explanation of symbols]

 100 inference processing unit 103 unification means 110 structure memory unit 120 list processing unit 130 vector processing unit 140 parallel unification means

Claims (1)

[Claims] 1. An inference processing unit that executes a logical language having a built-in inference function as a machine language, and storage, management, and operation of structure data including a data type of an argument of a predicate in the logical language. In an information processing device having a function of a unification process for combining and controlling a structure memory unit having a function to make structure data the same pattern, the inference processing unit performs a unification process of the same arguments of predicates. The unification means is provided, and the structure data is listed in the structure memory section.
Format list data and vector format vector data.
List processing unit that stores data of each type
And a vector processing unit.
If the argument is structure data,
In parallel with the processing, the vector data unit
Parallel unification means for performing fiction processing
The information processing apparatus characterized by a provided.