JPH0799607B2 - Playback speed controller - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reproduction speed control device for a motor which keeps a signal reproduction speed of a tape, a disk or the like constant. 2. Description of the Related Art An analog signal is converted into a digital signal by an analog-digital converter, a sync signal is added to each signal division and recorded, and the sync signal is detected from the read digital signal during reproduction. The PCM recording system, which reproduces a digital signal based on this synchronization signal and reproduces an analog signal at the time of recording by a digital-analog converter, has an advantage that the distortion of the recording medium is not affected and the sound quality is little deteriorated. , Its spread is expected. In PCM recording, the digitally converted signal is further modulated and recorded as a train of several different pulse width signals. One example is shown in FIG.
(A) shows a sequence of recorded signal contents, and (b)
Shows a sequence of digital signals when viewed as an electrical signal. In FIG. 1, T is the unit clock cycle, and 11T "H
A signal obtained by combining the "high level" and the 11T "Low level" is used as a synchronization signal, and the information signal is 10T or less and 3T
This is an example in the case of being recorded as the above pulse train. The display of 3T to 10T in FIG.
This indicates the length of the pulse width of the "h level" and the "Low level." Therefore, in the case of this example, the combination of 11T and 11T "High level" and "Low level" can be identified as a synchronization signal. 2 shows an example of the structure of a reproducing apparatus for reproducing a PCM signal recorded on a disk by such a system: In FIG.2, 1 is a disk, 2 is a pickup, 3 is a motor, and 4 is code demodulation. , 5 is a sync signal detector, 6 is a digital processor, 7 is a digital / analog converter, 8 is a frequency / voltage converter (hereinafter referred to as fv converter), 9 is a reference value, and 10 is an error amplifier. The signal read from the disc 1 by the pickup 2 is demodulated by a code demodulator 4 into a digital signal before recording and modulation, and then a sync signal detector 5 and a demultiplexer. The sync signal detector 5 detects and reproduces the sync signal from the recorded signals, and the digital processor 6 distinguishes the digital signal with the sync signal as a reference and at the time of transmission. The generated error is corrected, and the analog signal is reproduced by the digital-analog converter 7.
By the way, the reading speed of the signal must be controlled so that the synchronizing signal has a constant interval. That is, the rotation speed of the motor 3 for rotating the disk 1 must be controlled so that the sync signal is at a constant interval.
The reproduction synchronizing signal of is converted into a voltage signal by the fv converter 8 and is fed back to the motor 3 through the error amplifier 10 to control the rotation speed of the motor 3, that is, the rotation speed of the disk 1. The voltage source 9 provides a reference voltage for rotating the disc 1 at a predetermined speed. In the above description, the rotation of the disk 1, that is, the motor 3 rotates at a predetermined speed,
It has been assumed that the code demodulator 4 can correctly determine the pulse width of the information signal and the pulse width of the synchronizing signal, and that the reproduced synchronizing signal can be obtained at the output of the synchronizing signal detector 5. However, as can be seen from the width of the signal pulse shown in FIG. 1, it must be possible to discriminate between the sync signal and the information signal whether it is 11T or a pulse width of 10T or less. . That is, as shown in FIG. 3, the sync signal detector 5 has a limited range in which the sync signal can be detected and reproduced. FIG. 3A shows a range in which the sync signal can be detected near the target speed. In this range, the speed control described above is performed, but the sync signal cannot be detected (B).
In the range of (B), it is no longer possible to reproduce the information on the disc 1. In particular, the disk 1 has a constant linear velocity (CLV) to increase the recording density.
Called) is performed. When reproducing the disc 1 recorded by CLV, the rotation speed of the motor 3 varies depending on the position of the pickup 2.
That is, the rotation speed of the motor 3 must be reduced as the pickup 2 moves toward the outer circumference of the disk 1. When playing such a disc, a problem occurs at the time of starting. If it is assumed that the motor 3 is applied so that the rotation speed increases while the output of the fv converter 8 is not output, it is possible to transiently obtain the reproduction synchronization signal to the synchronization signal detector 5. Depending on the response characteristics of the system, the rotation speed of the motor 3 cannot always be controlled well. A further problem is that when the position of the pickup 2 is randomly moved beyond the detection range of the sync signal detector 5, it is not possible to discriminate where it is in (B) and (B) of FIG. You also won't get information about whether to speed up or slow down. The object of the present invention is to eliminate the above-mentioned drawbacks,
It is an object of the present invention to provide a reproduction speed control device that always provides a predetermined rotation speed. To this end, the present invention takes advantage of the fact that the recorded PCM signal is a signal having several different pulse widths, so that the pulse width of a particular pulse (eg maximum The pulse width of the pulse, which will be described below using the maximum pulse width) is detected, the current sync signal interval is predicted from the length of this pulse width, the motor is controlled, and the rotation speed of the motor is detected by the sync signal detector. A first speed control loop for pulling into the operating range 12 and a second speed control loop for performing control based on the reproduction sync signal of the sync signal detector are provided and until the sync signal is detected by the sync signal detector. In the first speed control loop, after the sync signal is detected, the control is performed in the second speed control loop based on the reproduction sync signal. FIG. 4 shows the basic idea of the present invention. The first speed control loop pulls the speed into the sync signal detectable range (A), waits for the detection and reproduction of the sync signal, switches to the second speed control loop, and tries to control to the target speed. Therefore, in FIG. 4, (C) is the operating range of the first speed control loop, and (D) is the operating range of the second speed control loop. FIG. 5 shows an example of a speed control device according to the present invention. The same symbols as in FIG. 2 indicate the same items. Until the sync signal can be reproduced by the sync signal detector 5, the maximum pulse width in the signal read by the pickup 2 from the disc 1
The maximum pulse width detector 11 detects and updates at regular intervals, and the pulse width voltage converter 12 converts the pulse width signal into a voltage.
The switching device 13 is connected to the (a) side to drive the motor 3. This loop is called the first speed control loop. The first speed control loop operates in the area (C) shown in FIG. The rotation of the motor 3 is controlled by the above-mentioned control so that the synchronization signal detector 5
When it enters into the sync signal detectable range (A), the sync signal is detected and reproduced by the sync signal detector 5, so the switching device 13 is connected to the (b) side to rotate the motor 3 (this Is referred to as a second speed control loop), so that the target speed can be controlled at any time. If the maximum pulse width can always be detected accurately and reliably, the speed control can be performed only by the first speed control loop. However, the detection result of the maximum pulse width must be (1) updated at regular intervals. Therefore, there is a lot of time delay. (2) The maximum pulse width is shorter than the synchronization signal period, so the accuracy is poor
(3) A second speed control loop is required because the disc 1 is scratched and vulnerable to dropout. In particular, since the sync signal detector 5 can also have the ability to replenish the sync signal lost due to scratches or dropout of the disk 1, the second speed control loop can reduce the influence of disturbance. FIG. 6 shows another embodiment of the present invention, in which the switching device 13 is automatically switched by the discrimination circuit 14 for discriminating whether or not the synchronization signal can be detected by the synchronization signal detector 5. Different from the example. Another embodiment of the present invention is shown in FIG. Reference numeral 15 denotes a pseudo sync signal generator, which is different from the example of FIG. 6 in that the switching device 13 is placed in front of the fv converter 8. The pseudo sync signal generator 15 has, for example, a configuration example shown in FIG. Before the description of FIG. 7, the operation of FIG. 8 will be described using the signal example of FIG. Reference numeral 151 denotes a pulse width detector, which counts pulse widths of different lengths from the pickup 2 with the reference clock of the reference clock generator 15 ₅ . 15 ₂ is a maximum pulse width detector in which the value of the pulse width with the largest count value detected by the pulse width detector 151 is set. Reference numeral 154 is a frequency divider for dividing the value of the reference clock by the value of the arithmetic unit 153 as a frequency division ratio by the timer 156 at regular intervals. The maximum pulse width detector 15 ₂ is reset by the timing device 156 when the number entered in the calculator 15 ₃ is finished. Now set the reference clock frequency to N / T,
Assuming that the rotation speed of the motor 3 is rotating at K times the target speed, the pulse width of the portion corresponding to the maximum pulse width 11T in FIG. 1 is 11T / K, and the count value of 15 ₁ is (11T / K) · (N / T) = 11N / K is the maximum, and is registered at 15 ₂ . Reference numeral 15 ₃ is an arithmetic unit for multiplying the maximum count value by the ratio of the time between the synchronization signal interval and the maximum pulse width, which is multiplied by M / 11 in the case of FIG. Therefore, the output of 15 ₃ is (11 N / K)
・ (M / 11) = NM / KNM. Numeral 15 ₄ is a counter for counting the reference clock in which the value of 15 ₃ is set as a frequency division ratio by the time limiter 15 ₆ . Therefore, one pulse is output to the output of 15 ₄ as (NM / K) / (N / T) = MT / KMT. That is, when the motor is rotating at a speed of K times, one pulse is obtained during the period corresponding to the synchronization signal interval, which is equivalent to obtaining the synchronization signal. The synchronization signal thus predicted and obtained is called a pseudo synchronization signal. 15 ₂ is 1 by the time limiter 15 _6.
When the number in 5 ₄ is finished, it is reset and updated to the maximum pulse width value thereafter. In FIG. 7, the pseudo sync signal obtained by the pseudo sync signal generator 15 is used to connect the switching device 13 to the (a) side until the sync signal detector 5 operates, thereby forming a first speed control loop. When the sync signal can be detected and reproduced by the sync signal detector 5, the switching device 13 is switched to the (b) side and the second
To control the speed of the motor 3. In the example of FIG. 7, the signals of the first and second speed control loops are the same at the same frequency and the target speed.
As in the example of FIG. 6, there is no gain variation that occurs between the fv converter 8 and the pulse width voltage converter 12, and the switching device 13
There is an advantage that can be switched smoothly. As described above, according to the present invention, the motor can be rotated at the predetermined target speed at any time even when the sync signal detection range is narrow. Although the maximum pulse width is used as the specific pulse for explanation, the minimum pulse width may be used without any particular limitation. Further, although the present invention has been described by taking the disc reproducing apparatus as an example, it goes without saying that the present invention is not limited to the disc.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a waveform diagram showing an example of a PCM signal recording system. FIG. 2 is a block diagram showing a configuration example of a conventional disc reproducing device. FIG. 3 is an explanatory diagram for explaining problems in the conventional device. FIG. 4 is an explanatory diagram showing the basic idea of the present invention. FIG. 5 is a block diagram showing an embodiment of the present invention. FIG. 6 is a block diagram showing another embodiment. FIG. 7 is a block diagram showing still another embodiment. FIG. 8 is a block diagram showing another embodiment. [Description of Codes] 1 ... Disc, 2 ... Pickup, 3 ... Motor, 4 ... Code demodulator, 5 ... Sync signal detector, 8 ... Frequency / voltage converter, 10 ... Error amplifier, 11 ... Specific pulse width detection device ,
12 ... Pulse width voltage converter, 13 ... Switching device, 14 ... Discriminator, 15 ... Pseudo sync signal generator.

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Takashi Takeuchi             Stock, 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa             Home Appliance Research Laboratory, Hitachi, Ltd. (72) Inventor Shinichi Ohashi             Stock, 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa             Home Appliance Research Laboratory, Hitachi, Ltd.              (56) References JP-A-50-33378 (JP, A)

Claims (1)

What is claimed is: 1. A reproducing apparatus for reproducing data from a recording medium, on which digital data including a periodically recorded synchronizing signal is recorded, according to a rotation speed of a motor, and a synchronization detecting circuit for detecting the synchronizing signal from the reproducing signal. (5), a frequency-voltage converter (8) for converting the frequency change of the synchronization detection circuit into a voltage, a maximum pulse width detector (11) for detecting the maximum pulse width in the reproduction signal, and the maximum pulse width A pulse width voltage converter (12) for converting the detection pulse width of the detector (11) into a voltage, and selectively switching between the output of the pulse width voltage converter (12) and the output of the frequency voltage converter (8). A reproduction speed control device characterized in that a rotation speed of the motor is controlled by a switching circuit (13) and an output of the switching circuit (13).