JPH079966B2 - Method for manufacturing hybrid integrated circuit - Google Patents

Description

The present invention relates to a method for manufacturing a hybrid integrated circuit having a large-capacity bus structure, and more particularly, to improving the interconnection structure between the buses and the wiring connection structure between the buses and mounted elements. The present invention relates to a method for manufacturing a hybrid integrated circuit.

(B) Conventional Technique A conventional hybrid integrated circuit and its manufacturing method will be described with reference to FIG.

FIG. 4 is a plan view of the hybrid integrated circuit. The hybrid integrated circuit includes an insulating metal substrate (70), a conductive path (72), a relay pad (74), an external lead pad (76), and bonding. The wire (78) and a plurality of integrated circuit elements such as the first gate array (80), the microcomputer (82), the memory (84), the second gate array (86), and other peripheral integrated circuits (88). , And the chip resistance (90), etc.

An insulated aluminum substrate is mainly used as the insulating metal substrate (70), and a wiring pattern is formed in a predetermined shape by photo-etching a copper foil attached to the insulating metal substrate (70), which will be described later. A pad for fixing the integrated circuit element, a pad for connecting the electrode thereof, a conductive path (72) such as a relay pad (74), and an external lead pad (76) are formed.

At the predetermined position of the above-mentioned conductive path (72), the first and second
Of the gate array (80) (86), the microcomputer (82), the memory (84) and the peripheral integrated circuit (88) are fixed by Ag paste, and electronic components such as chip capacitors and chip resistance elements are attached. The components are soldered and fixed in consideration of connection strength and contact resistance.

Such large-scale hybrid integrated circuits are used in various kinds of electric devices, and in recent years, they have also been used as printer controllers.

The case of implementing a general printer controller as a hybrid integrated circuit will be briefly described. For example, the first gate array (80) receives the parallel data of the Centronics specification, the sensor input, the printer front panel switch signal, and the like. Functioning as an input interface for inputting to the microcomputer (82), the second gate array (86) outputs a character font to the print head based on the command of the microcomputer (82), and also a carriage return or feedforward signal. It functions as an output interface that outputs control signals and the like. The microcomputer (82) has, for example, a 16-bit input / output port and a 20-bit address space.
An 80-pin microcomputer was used, and memory (8
For 4), for example, a 256-Kbit, 28-pin memory is used.

The hybrid integrated circuit having the above structure can meet the demand for miniaturization required for the printer controller, and since the insulating metal substrate is used, the heat radiation problem of the device is solved.

(C) Problems to be Solved by the Invention However, the wiring pattern of a digital circuit which has a 16-bit data bus and an address space of 20 bits and is large-scaled is extremely complicated. For example, as shown in FIG. 4, conductive paths such as a data bus and an address bus must be connected to each other at a place on the substrate by using a technique called jumping wire connection. As a result, there is a limit in reducing the effective mounting area of the substrate due to an increase in the number of pads for fixing the jumping wires and miniaturizing the device, and it is difficult to realize a large-capacity and ultra-small hybrid integrated circuit.

Also. Several methods have been proposed to solve the above problems by the multilayer wiring technology. According to the method of fixing and mounting elements on a wiring board having a multilayer structure in advance to complete a hybrid integrated circuit, solder fixing, etc. There is a problem that insulation performance between wiring boards and reliability of connection are deteriorated by high temperature processing of the boards. On the other hand, if the main board and the sub-board are fixed to each other during the manufacturing process to form a multilayer board structure, the above-mentioned problem can be solved. However, a problem occurs depending on the selection of the adhesive that bonds the main substrate and the sub substrate during the manufacturing process.
For example, when a thermosetting adhesive such as an adhesive resin-impregnated sheet is used, it is necessary to apply pressure during heat treatment, which may damage the surface of the chip-shaped integrated circuit element when the sub-board is fixed. is there.

Furthermore, since the main substrate, especially around the integrated circuit element, is formed in a fine pattern, it has been difficult to form the adhesive layer with high precision so as not to cover the pattern such as the pad.

For the above reasons, it has been generally difficult to achieve a multi-layer wiring structure including a mounting element and a sub-board on a single surface of the board.

(D) Means for Solving the Problems The present invention has been made in view of the above problems, and a sub-substrate having a wiring pattern formed in a predetermined shape has a substantially same shape as that of the sub-board. Eliminating the complexity of adhesion of the sub-board by temporarily adhering the adhesive resin-impregnated sheet having, after the completion of the step of exposing the sub-board to a relatively high temperature, such as a soldering step, the insulating hard board, By adhering to a predetermined area on the insulating hard substrate before fixing the integrated circuit element, the problem of reduction in effective board mounting area of the conventional manufacturing method, insulation performance between wiring boards, and deterioration of connection reliability are reduced. It solves the problem, and further the problem of damage to integrated circuit devices.

(E) Function Since the address bus, data bus, etc. are connected through the conductive path formed on the sub-board, a long span connection is possible, and the connection between the microcomputer and its peripheral circuit elements and the microcomputer. In addition, in the connection between the peripheral circuit element and the predetermined conductive path, it is possible to eliminate the conventional jumping wire connection.

Further, since the adhesive resin impregnated sheet is temporarily adhered to one main surface of the sub substrate, the adhesive resin impregnated sheet can be positioned with high precision only by paying attention to the positional accuracy of the sub substrate. The problem of pattern contamination and the problem of process complexity are solved.

Furthermore, since the sub-board is fixed after the soldering step and the like, most printing steps such as solder printing and solder resist printing can be performed without being obstructed by the sub-board, and due to the high temperature of the soldering step, the sub-board and its adhesive Does not cause dielectric breakdown.

Furthermore, since the sub-board is fixed before the step of fixing the integrated circuit element, there is no possibility of damaging the chip-shaped integrated circuit element in the step of fixing. Moreover, since the Ag paste layer for fixing the integrated circuit element is formed by the stamping method, the presence of the sub-board does not hinder the formation of the Ag paste layer.

(F) Embodiment An embodiment of the present invention will be described with reference to FIGS. 1A to 1D which are sectional views of a hybrid integrated circuit in respective steps characteristic of the present invention.

Referring to FIG. 1 (A), as the insulating hard substrate (10), any hard substrate such as ceramics, heat-resistant resin or metal is used. When aluminum, which has excellent heat dissipation characteristics, is used, its surface is anodized by anodic oxidation, and its main surface is covered with an insulating resin layer (12) having adhesiveness with epoxy resin or polyimide resin, and a clad of copper foil. Is attached. The illustrated conductive path (14) and external lead pad (18) are formed by photo-etching the copper foil, and as shown in the plan view of FIG.
A desired pattern is formed on the insulating hard substrate (10) to partially form a bus structure. The conductive path (14) is also formed below the sub-board (40) described later.

Next, referring to FIG. 1 (B), solder is printed on a predetermined conductive path (14) of the insulating hard substrate (10), and a chip element (34) such as a chip resistor or a chip capacitor is provided at that position. Placed. Then, the insulating hard substrate (10) is heated, and the chip elements (34) are fixed to the conductive paths (14) by melting the solder. As shown in the plan view of FIG. 2, chip elements (34) such as chip resistors or chip capacitors are arranged on the sub-board (40) at a distance. Therefore, the chip element (34) is shown in a side view in FIG. 1 (B) which is a sectional view taken along the line I-I of FIG.

Referring to FIG. 1 (C), a sub-board (40) and an adhesive resin impregnated sheet (60) are laminated by engaging a guide post (not shown) formed on the insulating hard substrate (10). Body is a predetermined area on the insulating rigid substrate (10) (see Fig. 2)
Placed on. In the figure, the chip element (34) is omitted.

The adhesive resin impregnated sheet (60) is made by impregnating, for example, an epoxy resin having adhesiveness with a Japanese paper having a thickness of about 0.5 mm, and a sub-board (40) formed with a conductive path (44) having a predetermined pattern. ), And is temporarily adhered to the sub-substrate (40) by, for example, heat treatment at 90 ° C. for 30 minutes. This adhesive resin-impregnated sheet (60) is heated under pressure to heat the insulating hard substrate (10), so that the impregnated resin is melted again and heat-cured so that the insulating hard substrate (10) and Firmly adhere the substrate (40).

According to the present invention, which temporarily adheres the adhesive resin-impregnated sheet to one main surface of the sub-board, the positional accuracy of the adhesive-resin-impregnated sheet (60) can be improved only by improving the positional accuracy of the sub-board (40) by means such as a guide post. And the problem of pattern contamination of the impregnated resin due to the positional shift and the problem of process complexity are solved. According to the present invention, since the integrated circuit element is not fixed when the sub-board (40) is bonded, the sub-board (40) can be pressed freely.

Here, the sub-board (40) will be described with reference to FIG.

The sub board (40) is a glass epoxy with a thickness of 0.6 mm to 1.0 mm,
It is formed of a resin such as paper epoxy, paper phenol, or polyimide, and has holes (42) or notches (42) for exposing chips such as gate arrays, microcomputers, and memories, as shown in the figure. As will be apparent from the following description, the holes (42) are formed for arranging bonding pads in multiple layers around the integrated circuit element such as a microcomputer, and the purpose thereof is substantially the same. The shape is not limited to holes as long as the shape is achieved.

A conductive path (44) such as an address bus and a data bus is formed on both surfaces of the sub-board (40) by a known method, as shown in the drawing, and through holes (46) are formed at appropriate positions. ) Is connected by.

A part of the predetermined conductive path (44) is formed so as to extend to the peripheral edge of the sub-board (40) to form a pad (48) for bonding connection with a pad formed on the insulating hard substrate (10). A part of the other predetermined conductive path (44) is formed so as to extend around the hole (42) to form a pad (50) which is bonded and connected to an electrode such as a gate array, a microcomputer or a memory. ing. As a matter of course, it is preferable that the pattern of the sub-board (40) has a multi-sided structure and is cut into a single surface after the adhesive resin-impregnated sheet (60) is temporarily bonded.

Referring to FIG. 1C again, an Ag paste layer (15) is formed by a stamping method on a predetermined region exposed by the hole (42) formed in the sub-substrate (40). In the present invention
It should be noted that the presence of the sub-board does not hinder the formation of the Ag paste layer (15) because the stamping method is used to form the Ag paste layer (15).

Subsequently, referring to FIG. 1D, a chip-shaped predetermined integrated circuit device, for example, a first integrated circuit device, is formed on the Ag paste layer (15).
After mounting the second gate arrays (24) and (30), the microcomputer (26), and the memory (28), the insulating hard substrate (10) is heated to about 155 ° C. to form the Ag paste layer (15). Is hardened, and the integrated circuit element is firmly fixed to a predetermined conductive path (14) formed on the insulating hard substrate (10).

As described above, and as shown schematically in FIG. 1, when the sub-board (40) is insulation-bonded so that the predetermined integrated circuit element is exposed by the hole (42), the first and second sub-boards are formed. Gate array (24) (30), microcomputer (2
6), the pads to be connected to the electrodes of the integrated circuit elements are arranged in two layers around the memory (28), and the conductive paths (14) or the sub-boards (40) on the insulating hard substrate (10) are arranged at the shortest distance. A) Wire bonding to any of the conductive paths (44) above. The reference numeral (36) refers to the bonding wire connecting the electrodes of the integrated circuit element and the conductive path (14), and the reference numeral (5) refers to the bonding wire connecting the electrode of the integrated circuit element and the pad (50) of the sub-board (40).
2) and further pads (48) and conductive paths (1) on the sub-board (40)
The bonding wire connecting 4) is indicated by reference numeral (54).

As described above, according to the present invention, since the chip-shaped integrated circuit element is fixed after the sub-substrate (40) is bonded, the integrated circuit element is not damaged by the sub-substrate (40) bonding step. Further, in the hybrid integrated circuit obtained by the present invention, since the address bus, the data bus and the like are connected through the conductive path (44) formed in the sub-board (40), the conductive on the insulating hard substrate (10) is The paths (14) can be connected to each other by wire bonding at a maximum of two places. In addition, the conductive path (44) of the sub-board (40) is formed by wire bonding at one location to an arbitrary conductive path (14) on the insulating hard board (10).
The number of relay pads can be significantly reduced. Further, this makes it possible to standardize the layout of the microcomputer and its peripheral circuit elements, and to simplify the layout as shown in the drawing.

The present invention has been described above based on an embodiment. However, various changes, such as the material of the adhesive resin-impregnated sheet, the range and type of the microcomputer and its peripheral circuit elements for which the layout should be standardized, of the present invention are possible. However, it is obvious to those skilled in the art that the present invention is not limited to the embodiments.

(G) Effects of the Invention As described above, according to the present invention, (1) the positional accuracy of the sub-board is improved by means such as a guide post for temporarily adhering the adhesive resin-impregnated sheet to one main surface of the sub-board. The positional accuracy of the adhesive resin-impregnated sheet is improved by only doing so, and the problem of the pattern contamination of the impregnated resin due to the displacement and the problem of the complicated adhesion process are solved.

(2) Since the sub-board is permanently bonded with the adhesive resin-impregnated sheet after the completion of the relatively high temperature treatment step such as the solder fixing step, thermal insulation breakdown of the adhesive resin-impregnated sheet and the sub-board is avoided.

(3) Since the chip-shaped integrated circuit element is fixed after the sub-board is bonded, the integrated circuit element is not damaged by the sub-board bonding process.

(4) Since the number of wire bonds is reduced, the process is simplified. Also, the reliability of the hybrid integrated circuit is improved.

(5) A long span connection is possible, and the number of relay pads is reduced, so that the mounting density is improved.

(6) Since the predetermined electrodes of the microcomputer and its peripheral circuit elements are connected in the shortest distance, there is no obstacle due to the wiring capacitance.

(7) Since the layout of the microcomputer and peripheral circuit elements can be made small and standardized, the pattern design of the hybrid integrated circuit becomes easy.

[Brief description of drawings]

FIGS. 1 (A) to 1 (D) are views for explaining the manufacturing method of the present invention, each being a cross-sectional view of a hybrid integrated circuit in each process characteristic of the present invention, and FIG. 2 is a hybrid integrated circuit according to the present invention. FIG. 3 is a plan view of a circuit, FIG. 3 is a plan view of a sub-board used in the present invention, and FIG. 4 is a plan view of a hybrid integrated circuit manufactured by a conventional manufacturing method. (10) ... Insulating hard substrate, (12) ... Insulating resin layer, (14)
(44) ... Conductive path, (15) ... Ag paste layer, (18) ... External lead pad, (36) (52) (54) ... Bonding wire, (24) (26) (28) (30) ... Integrated circuit element, (3
4) ... Chip resistor, chip capacitor, (40) ... Sub substrate, (42) ... hole, (46) ... through hole, (60) ... adhesive resin impregnated sheet.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kazuyuki Kashimura 41-1, Omama, Yamama-gun, Gunma Prefecture Within Tokyo Icy Corporation (72) Toshiaki Higa 41-1, Omama, Yamada-gun, Gunma Prefecture Higashi Kyo IC Co., Ltd.

Claims (6)

[Claims] 1. A step of forming a conductive path of a predetermined shape on an insulating hard substrate serving as a main board, and heating the insulating hard substrate to provide a chip component such as a chip resistor or a chip capacitor at a predetermined position of the conductive path. A step of adhering, a step of temporarily adhering an adhesive resin-impregnated sheet having substantially the same shape as this sub-board to one main surface of the sub-board on which a wiring pattern is formed in a predetermined shape, and insulating the sub-board with insulating hard Placing the insulating hard substrate on a predetermined area on the substrate, heating the insulating hard substrate to a predetermined temperature, melting the impregnating resin of the adhesive resin impregnated sheet, and fixing the sub-board and the insulating hard substrate; and fixing the sub-board. And then fixing a chip-shaped memory and an integrated circuit element such as a microcomputer on a conductive path formed on the insulating hard substrate. . 2. The method of manufacturing a hybrid integrated circuit according to claim 1, wherein the chip components are fixed by soldering. 3. The method of manufacturing a hybrid integrated circuit according to claim 1, wherein the integrated circuit elements such as the memory and the microcomputer are fixed with Ag paste. 4. The method of manufacturing a hybrid integrated circuit according to claim 1, wherein the adhesive resin impregnated sheet is formed by impregnating paper with an epoxy adhesive resin. 5. The method of manufacturing a hybrid integrated circuit according to claim 1, wherein an insulating-treated metal substrate is used as the hard substrate. 6. The method of manufacturing a hybrid integrated circuit according to claim 1, wherein a resin substrate made of glass epoxy, paper phenol, polyimide, or the like is used as the sub substrate.