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JPH0799725B2 - Multilayer Chip Inductor - Google Patents
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JPH0799725B2 - Multilayer Chip Inductor - Google Patents

Multilayer Chip Inductor

Info

Publication number
JPH0799725B2
JPH0799725B2 JP61270604A JP27060486A JPH0799725B2 JP H0799725 B2 JPH0799725 B2 JP H0799725B2 JP 61270604 A JP61270604 A JP 61270604A JP 27060486 A JP27060486 A JP 27060486A JP H0799725 B2 JPH0799725 B2 JP H0799725B2
Authority
JP
Japan
Prior art keywords
conductor
external electrode
chip inductor
pattern
multilayer chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61270604A
Other languages
Japanese (ja)
Other versions
JPS63124404A (en
Inventor
利夫 河端
国三郎 伴野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP61270604A priority Critical patent/JPH0799725B2/en
Publication of JPS63124404A publication Critical patent/JPS63124404A/en
Publication of JPH0799725B2 publication Critical patent/JPH0799725B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Manufacturing Cores, Coils, And Magnets (AREA)
  • Coils Or Transformers For Communication (AREA)

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は積層型チップインダクタ、特にその磁性体シー
ト上に設けられた導体のパターン形状に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention relates to a multilayer chip inductor, and more particularly to a pattern shape of a conductor provided on a magnetic material sheet thereof.

[従来技術とその問題点] 従来、高周波領域でコイル作用を奏する積層型チップイ
ンダクタとしては、第3図に示す様に、磁性体シート1
上に導体2を碁盤目状のパターンに印刷等の方法で設
け、これを第4図に示す様に所定枚数積層すると共に圧
着した後、一点鎖線A,Bでパターンごとにカットし、焼
成したものが提供されている。なお、図示しない外部電
極はカットされた導体2の端部に接続固定される。
[Prior Art and its Problems] Conventionally, as a multilayer chip inductor that exhibits a coil action in a high frequency region, as shown in FIG.
The conductor 2 is provided on the top by a method such as printing in a grid pattern, and after laminating a predetermined number of the conductors as shown in FIG. 4 and crimping, each pattern is cut along dashed-dotted lines A and B and baked. Things are offered. An external electrode (not shown) is connected and fixed to the cut end of the conductor 2.

しかしながら、以上の様に製造されるチップインダクタ
では、導体2は連続した碁盤便目状のパターンとして磁
性体シート1上に設けられるため、積層,圧着した際
に、導体2で囲まれた部分の空気が気泡3として残留す
ることが多い。そのため、磁性体シート1間の密着性が
悪化すると共に、焼成時に気泡3が膨張して磁性体シー
ト1にクラックが発生したり、剥離が生じるという問題
点を有している。
However, in the chip inductor manufactured as described above, since the conductor 2 is provided on the magnetic sheet 1 as a continuous checkerboard-like pattern, the portion surrounded by the conductor 2 is laminated and pressure-bonded. Air often remains as bubbles 3. Therefore, there is a problem that the adhesion between the magnetic material sheets 1 is deteriorated, and the bubbles 3 expand during firing to cause cracks or peeling of the magnetic material sheet 1.

そこで、本発明では積層,圧着工程時において気泡の残
留を除去すること、及び導体と外部電極との接続信頼性
の向上を図ることを課題とする。
Therefore, it is an object of the present invention to remove residual air bubbles during the lamination and pressure bonding steps and to improve the connection reliability between the conductor and the external electrode.

[問題点を解決するための手段] 本発明に係る積層型チップインダクタは、積層,圧着し
てカットする前の導体がパターンごとに外部電極接続部
分で分断され、連続した空気抜き通路を有し、さらに、
磁性体シートは導体の外部電極接続部分が各チップの角
隅部に露出する様にカットされていることを特徴とす
る。
[Means for Solving the Problems] A multilayer chip inductor according to the present invention has a continuous air vent passage in which a conductor before being cut by stacking, crimping, is divided at an external electrode connecting portion for each pattern, further,
The magnetic sheet is characterized in that it is cut so that the external electrode connecting portion of the conductor is exposed at the corners of each chip.

[作 用] 以上の構成において、磁性体シートを積層した際導体の
パターン間は連続した空気抜き通路で外部と連通するこ
ととなり、圧着時に内部の空気は該通路を通じて外部に
抜けてしまい、気泡として残留することがない。また、
カットされた磁性体シートの角隅部には導体の外部電極
接続部分が露出し、外部電極は1辺のみならず角隅部に
回り込んで接続し、接触面積が増加する。
[Operation] In the above configuration, when the magnetic material sheets are laminated, the conductor patterns are connected to the outside through continuous air vent passages, and the air inside escapes to the outside through the passages at the time of crimping to form bubbles. It does not remain. Also,
The external electrode connecting portion of the conductor is exposed at the corners of the cut magnetic material sheet, and the external electrodes are connected not only on one side but also around the corners to increase the contact area.

[実施例] 第1図は積層,圧着してカットする前の磁性体シート10
を示し、セラミック等の磁性粉末よりシート状に成形さ
れたもので、表面には導体11が一定のパターン状に印刷
等の方法で設けられている。この導体11はコ字形状の各
パターンごとに中心導体部分11aと外部電極接続部分11b
とで構成され、外部電極接続部分11bは図中横方向に分
断され、その間に連続した空気抜き通路12を有する。
[Embodiment] FIG. 1 shows a magnetic material sheet 10 before being laminated, pressure-bonded and cut.
Is formed into a sheet shape from magnetic powder such as ceramics, and the conductor 11 is provided on the surface by a method such as printing in a fixed pattern. The conductor 11 includes a central conductor portion 11a and an external electrode connecting portion 11b for each U-shaped pattern.
The external electrode connecting portion 11b is divided in the horizontal direction in the figure, and has a continuous air vent passage 12 therebetween.

前記磁性体シート10は、第2図に示す様に、所定枚数の
ものが積層,圧着される。なお、最上層の磁性体シート
10′には導体が設けられていない。
As shown in FIG. 2, a predetermined number of magnetic sheets 10 are laminated and pressure-bonded. The top magnetic sheet
10 'has no conductor.

この圧着時において、磁性体シート10′,10,10間の空気
は空気抜き通路12を通じて矢印C方向に抜けてしまい、
内部に気泡として残留することはない。従って、磁性体
シート10′,10,10は導体11を介在した状態で完全に密着
することとなる。
At the time of this pressure bonding, the air between the magnetic material sheets 10 ', 10, 10 escapes in the direction of arrow C through the air vent passage 12,
It does not remain as bubbles inside. Therefore, the magnetic material sheets 10 ′, 10, 10 are in complete contact with the conductor 11 interposed.

圧着後、磁性体シート10′,10,10は第1図中一点鎖線A,
Bでパターンごとにカットされチップ化される。このと
き、導体11はコ字形状となる。そして、焼成された後、
導体11の外部電極接続部分11bに外部電極(図示せず)
が、例えば銀ペーストを焼き付ける等の方法によって形
成される。この外部電極形成時において、カットされて
いる外部電極接続部分11bはチップ角隅部に露出してい
るため、外部電極との接触面積が増加し、外部電極接続
部分11bと外部電極の接続の信頼性が向上する。
After crimping, the magnetic material sheets 10 ', 10, 10 are shown by the alternate long and short dash line A in FIG.
B is cut for each pattern and made into chips. At this time, the conductor 11 has a U-shape. And after being baked,
An external electrode (not shown) on the external electrode connecting portion 11b of the conductor 11
Are formed by a method such as baking a silver paste. When this external electrode is formed, the cut external electrode connecting portion 11b is exposed at the corner portion of the chip, so that the contact area with the external electrode increases, and the reliability of the connection between the external electrode connecting portion 11b and the external electrode is increased. The property is improved.

なお、本発明に係る積層型チップインダクタは、以上の
実施例に限定するものではなく、その要旨の範囲内で種
々に変更することができる。
The multilayer chip inductor according to the present invention is not limited to the above embodiments, but can be variously modified within the scope of the gist thereof.

特に、導体11のパターン形状は種々のものが考えられる
し、空気抜き通路12の形状についても同様である。ま
た、磁性体シート10の積層枚数も要求されるインダクタ
ンス値に応じて選択されることは勿論であり、例えば、
2枚の磁性体シート10を積層したものであってもよい。
In particular, various pattern shapes of the conductor 11 are conceivable, and the same applies to the shape of the air vent passage 12. Further, it goes without saying that the number of laminated magnetic sheets 10 is also selected according to the required inductance value.
It may be a stack of two magnetic sheets 10.

[発明の効果] 以上の説明で明らかな様に、本発明によれば、カットす
る前の導体がパターンごとに外部電極接続部分で分断さ
れ、連続した空気抜き通路を備えているため、基板を積
層,圧着した際に内部の空気は空気抜き通路を通じて外
部に抜け出し、気泡として残留することはない。従っ
て、基板間の密着性が良好であるし、前記従来のものの
様に焼成時に気泡が膨張して基板にクラックが発生した
り、剥離することはなく、製品の信頼性を大きく向上さ
せることができる。また、磁性体シートは導体の外部接
続部分が各チップの各隅部で露出する様にカットされて
いるため、外部電極とそれへの接続部分との接触面積が
増加し、両者の接続信頼性を向上させることができる。
[Effects of the Invention] As is clear from the above description, according to the present invention, since the conductor before cutting is divided by the external electrode connecting portion for each pattern and the continuous air vent passage is provided, the substrates are laminated. , When crimped, the internal air does not escape to the outside through the air vent passage and does not remain as bubbles. Therefore, the adhesion between the substrates is good, and unlike the above-mentioned conventional one, the bubbles do not expand during firing to cause cracks in the substrate or peeling, and the reliability of the product can be greatly improved. it can. In addition, the magnetic sheet is cut so that the external connection part of the conductor is exposed at each corner of each chip, so the contact area between the external electrode and the connection part to it increases, and the connection reliability of both Can be improved.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例である積層型チップインダク
タのカット前の磁性体シートを示す平面図、第2図はそ
の製造工程の要部を示す断面図である。第3図は従来の
積層型チップインダクタのカット前の磁性体シートを示
す平面図、第4図はその製造工程の要部を示す断面図で
ある。 10……磁性体シート、11……導体、11a……中心導体部
分、11b……外部電極接続部分、12……空気抜き通路。
FIG. 1 is a plan view showing a magnetic sheet before cutting of a multilayer chip inductor that is an embodiment of the present invention, and FIG. 2 is a sectional view showing the main part of its manufacturing process. FIG. 3 is a plan view showing a magnetic material sheet of a conventional multilayer chip inductor before being cut, and FIG. 4 is a sectional view showing an essential part of its manufacturing process. 10 ... Magnetic sheet, 11 ... Conductor, 11a ... Central conductor part, 11b ... External electrode connection part, 12 ... Air vent passage.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】表面に導体を一定のパターン状に設けた磁
性体シートを積層,圧着し、パターンごとにカットし、
導体の端部に外部電極を設けた積層型チップインダクタ
において、 カットする前の導体がパターンごとに外部電極接続部分
で分断され、連続した空気抜き通路を有し、 前記磁性体シートは導体の外部電極接続部分が各チップ
の角隅部に露出する様にカットされている、 ことを特徴とする積層型チップインダクタ。
1. A magnetic material sheet having a conductor provided on the surface in a fixed pattern is laminated, pressure-bonded, and cut for each pattern,
In a multilayer chip inductor in which an external electrode is provided at the end of the conductor, the conductor before cutting is divided at each external electrode connection portion for each pattern, and has a continuous air vent passage, and the magnetic sheet is the external electrode of the conductor. A multilayer chip inductor characterized in that the connection portion is cut so as to be exposed at the corners of each chip.
JP61270604A 1986-11-13 1986-11-13 Multilayer Chip Inductor Expired - Lifetime JPH0799725B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61270604A JPH0799725B2 (en) 1986-11-13 1986-11-13 Multilayer Chip Inductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61270604A JPH0799725B2 (en) 1986-11-13 1986-11-13 Multilayer Chip Inductor

Publications (2)

Publication Number Publication Date
JPS63124404A JPS63124404A (en) 1988-05-27
JPH0799725B2 true JPH0799725B2 (en) 1995-10-25

Family

ID=17488410

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61270604A Expired - Lifetime JPH0799725B2 (en) 1986-11-13 1986-11-13 Multilayer Chip Inductor

Country Status (1)

Country Link
JP (1) JPH0799725B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6024826B2 (en) * 2013-07-01 2016-11-16 株式会社村田製作所 Multilayer inductor element and manufacturing method thereof

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55145333A (en) * 1979-04-27 1980-11-12 Tdk Electronics Co Ltd Chip type electronic component and method of fabricating same
JPS57198617A (en) * 1981-05-30 1982-12-06 Nippon Electric Co Method of producing laminated ceramic condenser

Also Published As

Publication number Publication date
JPS63124404A (en) 1988-05-27

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