JPH0810780B2 - Method for manufacturing semiconductor laser - Google Patents

Description

The present invention relates to a method for manufacturing a semiconductor laser, and more particularly to a method for manufacturing a semiconductor laser having a buried structure using a p-type semiconductor as a substrate.

[Prior Art] In recent years, various semiconductor lasers have been developed for applications such as a light source for optical communication. As such a semiconductor laser, a semiconductor laser having a buried structure using a p-type semiconductor as a substrate has been developed. .

FIG. 6 is a sectional view of a semiconductor laser using p-type InP as a p-type semiconductor substrate. That is, 1 in the figure is p-type In
On the p-type InP substrate 1, a p-type InP clad layer 2, an active layer 3 made of InGaAsP, and an n-type InP clad layer 4 are laminated on the p-type InP substrate 1. The surroundings of the clad layer 2, the active layer 3 and the clad layer 4 which are stacked are covered with an n-type InP burying layer 5 and a p-type InP burying layer 6. And electrodes on both sides
7,8 are installed.

A method for manufacturing a semiconductor laser having such a structure is disclosed in Japanese Patent Application Laid-Open No. 57-206082, for example, as disclosed in
A p-type InP clad layer 2 is formed on the InP substrate 1 by the epitaxial growth method, and an InGaAsP active layer 3 is further grown on the p-type InP clad layer 2 by the epitaxial growth method. The n-type InP cladding layer 4 is formed by an epitaxial growth method. Then this n
An insulating layer made of SiO ₂ is formed at the stripe forming pattern position of the clad layer 4 of the InP-type InP, and this epitaxial layer is used as a mask to p-type InP substrate 1 in the <110> direction.
Etch into an inverted mesa shape until reaching. After that, an n-type InP buried layer 5 is epitaxially grown on the mesa-etched portion, and further on the n-type InP buried layer 5,
The p-type InP buried layer 6 is epitaxially grown. Then, the insulating layer of SiO ₂ is removed, and electrodes 7 and 8 are vapor-deposited on both sides.

In this case, the n-type InP buried layer 5 and the p-type I that serve as the current limiting layer
By arranging the position of the pn junction 9 between the nP buried layer 6 and the nP buried layer 6 below the active layer 3, the leakage current shown by the dotted line in FIG. Since it passes through the layer 6, its value is reduced, and a semiconductor laser with high efficiency and high output can be realized.

[Problems to be Solved by the Invention] However, the semiconductor laser shown in FIG. 6 manufactured by the above-described manufacturing method still has the following problems. That is, in order to obtain a stable laser beam and a low threshold current in a semiconductor laser, the width W of the active layer 3 is made as narrow as possible so that light is emitted in a single oscillation mode in the lateral direction. It is necessary to control. However, in the semiconductor laser having the structure shown in FIG.
The width W of the active layer 3 is always larger than the width d of the constricted portion of the inverted mesa structure. Therefore, in order to narrow the width W of the active layer 3, it is necessary to make the width d of the constricted portion as narrow as possible.
However, if the width d of the constricted portion is narrowed, the current path indicated by the solid line is narrowed, so that the resistance in the vertical direction rapidly increases and heat is generated, resulting in a problem that a high output cannot be obtained. For example, depending on the required wavelength of the laser beam, it may be desirable to control the width W of the active layer 3 to 2 μm or less. In the semiconductor laser of FIG. Width W of layer 3 is 2μ
If the width is less than or equal to m, the width d of the constricted portion needs to be further narrowed. Therefore, as a practical matter, it is very difficult to reduce the width of the active layer 3 to less than 2 μm.

It is considered that the position of the active layer 3 is made closer to the constricted portion. However, when the active layer 3 and the constricted portion are transiently brought close to each other, the relationship with the dimensional accuracy in the etching process and the epitaxial growth process of the buried layer is considered. However, there is a problem that defective products frequently occur and the yield of manufactured products decreases.

The present invention has been made in view of such circumstances, and an object thereof is to reduce the width of the active layer by etching in a vertical shape so as to eliminate the constricted portion. By using the same p-type as the substrate as the buried layer, it is possible to reduce the series resistance and to stabilize the oscillation mode of the laser beam while maintaining a high output, and to achieve a low value current. To provide.

[Means for Solving Problems] According to the method for manufacturing a semiconductor laser of the present invention, the first epitaxial growth is performed to form a multilayer film structure wafer in which a semiconductor layer including at least an InGaAsP active layer is laminated on a p-type semiconductor substrate. A first etching step of forming a strip-shaped insulating film on the surface of the multi-layered structure wafer and etching the multi-layered structure wafer on which the insulation film is formed into a reverse mesa shape with a first etching solution until the active layer is reached. A second etching step of etching a portion below the active layer into a vertical shape and a regular mesa shape with a second etching solution;
Of the p-type first buried layer, the n-type second buried layer, and the p-type mesa stripe, which are formed by the etching process of FIG. The second buried layer is formed so as to form the third buried layer in this order.
And an epitaxial growth step.

[Operation] According to such a semiconductor laser manufacturing method, the multilayer film structure wafer formed in the first epitaxial growth step is etched into an inverted mesa shape by the first etching step until it reaches the active layer, and then the first etching step is performed. The lower part of the active layer is etched into a vertical shape and a forward mesa shape by the second etching process. As a result, the multi-layered structure wafer is etched from above into a mesa stripe in which an inverted mesa shape, a vertical shape, and a regular mesa shape are continuous. Then, a buried layer is formed in this mesa stripe in the order of p-n-p.
As a result, the conventional constricted portion is eliminated, and the width of the active layer can be made substantially equal to the width of the vertical portion. Also, the series resistance below the active layer can be reduced.

[Embodiment] An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a sectional view of a semiconductor laser manufactured by the method for manufacturing a semiconductor laser of the embodiment. P-type In
On the P substrate 11, a p-type InP clad layer 12, an active layer 13 made of InGaAsP, and an n-type InP clad layer 14 are laminated. The surroundings of the laminated clad layer 12, active layer 13, and clad layer 14 are covered with a p-type InP buried layer 15, an n-type InP buried layer 16 and a p-type InP buried layer 17. The electrodes 18 and 19 are attached to both sides.

In such a structure, the clad layer 14 and the active layer 13 form an inverted mesa-shaped portion 20, and the clad layer 12 and the upper end of the p-type InP substrate 11 form a vertical-shaped portion 21. A forward mesa-shaped portion 22 is formed on the upper part of the.

Next, a method of manufacturing the semiconductor laser shown in FIG. 1 will be described with reference to FIG.

First, as shown in FIG. 2A, a p-type InP substrate having a (100) plane with Zn as an impurity (carrier concentration 5 × 10 ¹⁸ cm ⁻³ ).
Similarly, Zn is an impurity on top of 11 (carrier concentration 2 × 10 ¹⁷ cm ^-3 ).
P-type InP clad layer with a thickness of 2.0 μm, active layer of p-type In _1-x GaxAs _1-y Py with a thickness of 0.1 μm using Zn as an impurity (carrier concentration 2 × 10 ¹⁷ cm ⁻³ ). A clad layer 14 of n-type InP having a thickness of 2.0 μm and containing 13, Sn as an impurity (carrier concentration of 7 × 10 ¹⁷ cm ⁻³ ) is sequentially grown to each of the above dimensions by a normal liquid phase epitaxial growth method. Then, a multilayer film structure wafer is obtained. However, 0 ≦ x ≦ 0.47 and 0 ≦ y ≦ 1.

Next, as shown in FIG. 2B, the n-type InP clad layer 1
On the 4 <011> parallel to the stripe forming patterns positioned in a direction to form a silicon oxide (SiO ₂₎ or silicon nitride (Si ₃ N ₄₎ is a strip as the insulating layer 23. After that, as shown in FIG. 2 (c), etching is performed with a bromou methanol solution (Br ₂ —CH ₃ OH) as a first etching solution until the p-type InP clad layer 12 is slightly crossed beyond the active layer 13. To form the inverted mesa shape portion 20 {(111) A surface}.

Next, as shown in FIG. 2 (d), a hydrochloric acid solution (HCl: H ₂ O = 4: 1) is used as the second etching solution at room temperature, for example.
Etching is performed up to an intermediate position of the p-type InP substrate 11 for about 35 seconds. Then, as shown in the figure, the cladding layer 12 and the p-type InP
A vertical shape portion 21 {(01) plane} and a normal mesa shape portion 22 {(111) B plane} are formed on the substrate 11. Then, finally, a mesa stripe in which the inverted mesa-shaped portion 20, the vertical-shaped portion 21, and the normal mesa-shaped portion 22 are continuous from top to bottom is obtained. The height of the vertical shape portion 21 is about 2.0 μm.

Next, as shown in FIG. 2 (e), in order to fill the periphery of the mesa stripe, a supersaturation degree of 12 is used as the first buried layer.
Zn as impurity (carrier concentration 2 × 10 ¹⁷ cm ^-3 ) at ℃ p
The type InP buried layer 15 is grown by an epitaxial growth method.
In this case, the upper end of the p-type InP burying layer 15 is located slightly above the intermediate portion of the vertical shaped portion 21 of the mesa stripe. Next, the n-type InP buried layer 1 containing Sn as an impurity (carrier concentration 1 × 10 ¹⁷ cm ⁻³ ) is used as a second buried layer next to the first buried layer 15.
6 is grown by the two-phase melt method. In this case, n-type InP buried layer
The upper end of 16 is directly below the active layer 13 of the vertical shape part 21. Finally, Zn was used as an impurity (carrier concentration 2 × 10
^The p-type InP buried layer 17 of ¹⁷ cm ⁻³ ) is grown to the height of the insulating layer 23 at a supersaturation degree of 12 ° C.

After that, as shown in FIG. 2 (f), the insulating layer 23 is removed, and Au—Ge—Ni is vapor-deposited on the surfaces of the n-type InP cladding layer 14 and the p-type InP burying layer 17 to remove the n-side material. Electrode 18 is formed and p-type In
Au-Zn is deposited on the back surface of the P substrate 11 to form the p-side electrode 19. Thus, the semiconductor laser having the structure shown in FIG. 1 is obtained.

Next, when a voltage is applied between the electrodes 18 and 19 of the semiconductor laser manufactured by such a manufacturing method, a current flows from the p-type InP substrate 11 to the normal mesa-shaped portion 22 and the vertical direction as shown by the solid arrow in FIG. It passes through the shaped portion 21 and flows into the active layer 13. In addition to the current indicated by the solid line, as indicated by the alternate long and short dash line arrow in the figure, p
The current from the type InP substrate 11 via the p-type InP buried layer 15 also flows into the active layer. Therefore, the active layer 13 is excited by these currents.

In this case, the width W of the active layer 13 becomes substantially equal to the width w of the vertical shape portion 21. That is, the dimensional relationship between the width W of the active layer 13 and the width w of the vertical shape portion 21 is such that the width W of the active layer 3 of the conventional semiconductor laser shown in FIG. It is greatly improved compared to the dimensional relationship of. Therefore,
Even if the width W of the active layer 13 is narrowed, the width d of the constricted portion, which is narrower than the width W, does not exist, so that the width of the current path is not limited, so that the series resistance is not significantly increased. Absent. In addition, since the current also flows through the p-type InP buried layer 15, the series resistance further decreases. As a result, it is possible to stabilize the oscillation mode of the laser beam and reduce the threshold current by narrowing the width W of the active layer 13 while maintaining the high output.

FIGS. 3 and 4 are characteristic diagrams of the semiconductor laser having the structure of the embodiment shown in FIG. 1, and are shown in comparison with the semiconductor laser having the conventional structure shown in FIG. However, the widths W of the active layers 13 and 3 of the semiconductor lasers of the example structure and the conventional structure are both 1.5.
The figure shows the case of μm. In this case, the width w of the vertical shape portion 21 in the embodiment structure is 1.5 μm, while the width d of the constricted portion in the conventional structure is 0.5 μm. As is clear from FIG. 3, in the structure of the embodiment, since the constriction does not exist, the resistance in the vertical direction is small, and therefore the voltage increase is small with respect to the current increase, and the voltage withstanding characteristic is excellent. Understandable.

Further, also in FIG. 4, it can be understood that the output of the laser beam can be increased for the same current value.

Further, since the width w of the vertical shape portion 21 and the width W of the active layer 13 are almost the same, when the same active layer width W is obtained, the width W control of the active layer 13 is controlled by the conventional structure shown in FIG. The control at the time of manufacture is easier than the width W control of the active layer 3.
Further, the minimum width to be controlled during the etching step is the width d of the constricted portion in the conventional structure shown in FIG. 6, whereas it is the width W of the active layer 13 in the embodiment. Therefore, when the controllable minimum width is restricted by the etching accuracy, the active width W can be set narrower than that of the conventional structure.

Further, as shown in FIG. 5 (a), since the forward mesa portion 22 is formed by etching so that the (111) B surface is exposed, the p-type InP buried layer 15 is epitaxially grown at a supersaturation degree of 12 ° C. In this case, the crystal growth proceeds smoothly. As a result, the dimensional accuracy of the buried layers 15 and 16 in the vicinity of the forward mesa shape portion 22 and the vertical shape portion 21 can be significantly improved.

By the way, as shown in FIG. 5 (b), if the normal mesa shape portion is not formed and only the vertical shape portion is formed, the vertical shape portion grows too fast and the buried layer In many cases, the crystal does not grow smoothly and a discontinuity occurs at the boundary surface.

Further, the mesa stripe is formed by the inverted mesa shaped portion 20, the heavy straight shaped portion 21 having the (01) plane, and the forward mesa shaped portion 22 having the (111) B plane, and the active layer 13 and the inverted mesa shaped portion are formed.
Since it is located right above the connection portion with the vertical shape portion 21 in 20, the tip of the n-type InP buried layer 16 is stopped immediately below the active layer 13 by using the epitaxial growth method by the two-phase melt method. It is easy to do. Therefore, n-type
Since the position of the boundary pn junction between the InP buried layer 16 and the p-type InP buried layer 17 can be formed immediately below the active layer 13, the leakage current can be further reduced.

[Effect of the Invention] According to the method for manufacturing a semiconductor laser of the present invention as described above, since the etching is performed in the vertical shape so as to eliminate the constricted portion, the width of the active layer can be narrowed. further,
Since the same type as the substrate is used as the first buried layer, it is possible to stabilize the oscillation mode of the laser beam and reduce the threshold current while maintaining a high output. Also, since the lower portion of the vertical shape is etched into a regular mesa shape, the dimensional accuracy of the buried layer can be improved, and the product yield can be greatly improved.

[Brief description of drawings]

FIG. 1 is a sectional view showing a semiconductor laser manufactured by a method for manufacturing a semiconductor laser according to an embodiment of the present invention, and FIG. 2 is a drawing showing each manufacturing step of the manufacturing method of the embodiment, FIGS. 4 is a characteristic diagram showing the effect of the manufacturing method of the embodiment, FIG. 5 is a diagram for explaining the dimensional accuracy of the manufacturing method of the embodiment, and FIG. 6 is a cross section of a semiconductor laser manufactured by the conventional manufacturing method. It is a figure. 11 ... p-type InP substrate, 12 ... p-type InP clad layer, 13 ...
… Active layer, 14 …… n-type InP cladding layer, 15 …… p-type InP
Buried layer, 16 ... n-type InP buried layer, 17 ... p-type InP buried layer,
18,19 ...... Electrode, 20 ...... Inverse mesa shape part, 21 …… Vertical shape part, 22 …… Mesa shape part, 23 …… Insulating layer, W …… Active layer width, d …… Constricted part width .

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Akihiko Asai 5-1027 Minamiazabu, Minato-ku, Tokyo Anritsu Co., Ltd. (72) Inventor Katsuo Makita 5-1027 Minamiazabu, Minato-ku, Tokyo Anri Tsu Co., Ltd.

Claims (1)

[Claims] 1. At least InGaAsP on a p-type semiconductor substrate.
A first epitaxial growth step of forming a multilayer film structure wafer in which semiconductor layers including an active layer are laminated; an insulating film is formed in a strip shape on the surface of the multilayer film structure wafer, and the multilayer film structure wafer having the insulating film formed thereon is formed. A first etching step of etching in a reverse mesa shape with a first etching solution until it reaches the active layer; a second etching step of etching a portion below the active layer into a vertical shape and a forward mesa shape with a second etching solution. A step of: forming a p-type first buried layer and an n-type first buried layer around a mesa stripe formed by the first and second etching steps and having a continuous continuous reverse mesa shape, vertical shape, and forward mesa shape. A method of manufacturing a semiconductor laser, comprising a second epitaxial growth step of burying a second buried layer and a p-type third buried layer in this order.