JPH0810995B2 - Control method of pulse width modulation inverter - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a controller for an induction motor using a pulse width modulation inverter, and more particularly to a controller for improving the switching of the number of pulses of the inverter output voltage between 3 pulses and 1 pulse.

[0002]

2. Description of the Related Art Heretofore, as control techniques of this kind, Japanese Patent Laid-Open Nos. 57-132772, 57-85583 and 60-24670 are known.

[0003]

In Japanese Patent Laid-Open No. 57-132772, there is a large amount of change in the output voltage of the inverter when switching from 3 pulses to 1 pulse in a variable voltage / variable frequency pulse width modulation inverter. The problem is that a phase control with three pulses to reduce the amount of change in this voltage and a control method that eliminates the phase shift of the fundamental wave of the inverter output voltage when switching to one pulse caused by this phase control are shown. There is. However, this control method has a problem that the control is complicated and that the phase of the fundamental wave of the inverter output voltage changes when the phase control is performed with three pulses, as can be seen from FIG. In addition, JP-A-57-85
Japanese Patent No. 583 discloses a modulation means by comparing two sine waves and a triangular wave. As can be seen from FIG.
There is a problem that a phase shift occurs in the fundamental wave of the inverter output voltage (FIG. 6 (f)) at the time of switching. Also, FIG. 6 (b)
Θ (gate signal (b) of FIG. 6 to thyristors 1 and 4 of FIG. 1)
Even if the gate signal (b) disappears during the period (and (c) is absent), the motor current does not immediately become 0 due to the inductance action of the motor. But not
It usually circulates through a diode that is connected in antiparallel. This means that the gate signal (c) is given to the thyristor 4, and the inverter output voltage does not become as shown in FIG. 6 (f). That is, there is a problem that it is very difficult to calculate in advance the inverter output voltage for one pulse, which has the same magnitude as the inverter output voltage for three pulses.

On the other hand, Japanese Examined Patent Publication No. 60-24670 discloses that a current source inverter has a multi-pulse current every half cycle of the fundamental frequency. Reference numeral 1 in FIG. 1 of this publication
Is a "DC power source capable of controlling current", and a converter that can compare the motor current with its reference value and adjust the output voltage by the deviation is used. FIG. 4 and FIG. 5 compare the content ratios of harmonics, and it is stated that the harmonics become smaller when the pulse is divided into multiple pulses.
Therefore, one “specific” number of pulses in FIG. 4 is selected,
As a result of the current control being adjusted by the output voltage of the converter, the peak value of the current in FIG. 5 changes and the current average value is adjusted. Here, there is no technical idea of switching the number of output voltage pulses included in a half cycle in the process of controlling the output voltage and frequency of the inverter. However, when the induction motor is driven by the inverter, it is necessary to actually switch the number of pulses due to the switching time of the GTO and the transistor.

An object of the present invention is to provide a control method in which the change amount of the inverter output voltage is small and the phase shift of the fundamental wave of the inverter output voltage does not occur when the number of pulses of 3 pulses and 1 pulse is switched. .

[0006]

SUMMARY OF THE INVENTION The present invention applies a DC voltage.
Input to generate a variable frequency AC output voltage.
Touching element (UP, VP, WP, UN, VN, WN)
The inverter consists of the magnitude of the fundamental wave of the AC output voltage.
The carrier wave is compared with the modulated wave that determines the frequency.
Generating a gate signal for the switching element, thereby
It has a modulation means (5) for operating the inverter in PWM
It is one, the voltage pulse in a half cycle of the AC output voltage
The pulse mode of PWM control defined by the
Within the period of 120 ° in terms of electrical angle of the flow output voltage,
AC output from the first 3-pulse mode in which pressure pulse exists
Positioned in the center of 120 ° period in terms of electrical angle of force voltage 1
Positioned in contrast to one pulse and both sides of the 120 ° period
Second 3-pulse mode consisting of two side pulses
Through a single voltage pattern within a half cycle of the AC output voltage.
Pulse width modulation to switch to 1-pulse mode including only pulse
In the inverter control method, the first three-pulse mode is used.
Mode to the second 3-pulse mode,
Of the voltage pulse of the AC output voltage in the first 3-pulse mode
The width θ ° is the minimum arc extinction period θ required for the switching element.
It is characterized in that it is performed at the time when it becomes almost equal to _min ° .

[0007]

With this, by appropriately adjusting the two pulse widths on both sides and the width of the blank portion between these pulses and the central pulse, the average output voltage in the 3-pulse mode is 1 pulse. It is possible to match that of the mode, and it is possible to eliminate voltage jump and phase shift when switching the number of pulses.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a circuit configuration of an induction motor control device using a pulse width modulation inverter according to an embodiment of the present invention, in which 1 is a DC power source and 2 is a control switching element UP to WN such as a cyclistor. Pulse width modulation inverter, 3 is an induction motor, 5 is carrier wave generating means 51, modulated wave generating means 52, comparing means 53 and pulse number switching means 5
The output of this modulation circuit 5 is
Through the gate signal processing circuit 4, the control switching elements UP to WN of the inverter 2 are turned on / off in a predetermined order.

In FIG. 1, the rotation frequency f _n of the induction motor 3 is detected by the detection circuit 6 and the slip frequency f _n is detected.
_S is added by the adder / subtractor circuit 9 during power running, and subtracted during regeneration. This is the output frequency f (= f _n ± of the inverter 2
f _S ). The slip frequency f _S is controlled via the slip frequency control circuit 8 by comparing the command value I _P with the value I _M detected by the detection circuit 7 for the current of the induction motor 3 and the deviation thereof.

On the other hand, in the modulation circuit 5, in response to the output of the adder / subtractor circuit 9, 511 in the carrier wave generating means 51 normally generates the triangular wave shown in (a) of FIG. 2A, and the modulating wave generating means 52. 521 in FIG. 2 is usually (b), (c) in FIG.
A sine wave of U, V, and W phases in (d) is generated, and the sine wave and the triangular wave are compared by the comparison means 53 to obtain control switching elements UP, VP, and WP pulses as shown in FIG. 2B. Output. (The inverted version of FIG. 2B becomes the pulses for the control switching elements UN, VN, WN). The output voltage (between U and V) waveform of the inverter 2 at this time is as shown in FIG. The output voltage of the inverter 2 is shown in FIG.
Of the output frequency f of the inverter 2 by changing the width θ ° of the sine wave, that is, the peak value of the sine wave of FIG.
The number of pulses of the output voltage of the inverter 2 (three pulses in FIG. 2) included in the half cycle of is obtained by switching the frequency ratio of the triangular wave and the sine wave of FIG. Control. This pulse number is output to the output frequency f of the inverter 2 by the pulse number switching means 54, for example, as shown in FIG.
-5-3 (FIG. 3 (A)), and the output voltage V _M of the inverter 2 is continuous with the output frequency f of the inverter 2 as shown in FIG. The crest value of the sine wave is controlled by calculating the ratio of the crest value of the sine wave / the crest value of the triangular wave in FIG. 2A, that is, the modulation factor V _C.

By the way, the output voltage V of the inverter 2
_In order to increase _M to the maximum voltage that the inverter 2 can output, from the three pulses in FIG. 2 (FIG. 3A) to FIG.
When the output frequency of the inverter 2 at which the width θ ° of the inverter becomes equal to the minimum arc extinguishing period θ _min ° required for the control switching elements UP to WN, switching to 1 pulse as shown in FIG.
The output voltage V _M of the inverter 2 suddenly changes as shown by the dotted line in FIG. 3 as will be easily understood from FIG. 4 (the amount of change will be described later).

Therefore, with the three pulses in FIG. 2 (FIG. 3A),
At the output frequency of the inverter 2 where the width θ ° in FIG. 2 becomes equal to the minimum arc extinguishing period θ _min ° required for the control switching elements UP to WN, the pulse number switching means 54 is used.
Switching is made from 511 to 512 in the carrier wave generating means 51 and from 521 to 522 in the modulation generating means 52. 512 in the carrier wave generating means 51 is usually an inverted trapezoidal wave of U, V and W phases (upper side width is 180 °, lower side width is 60 °) of FIGS. 5 (A), 5 (C) and 5 (E). 522 in the modulated wave generating means 52 is normally generated (A) in FIG.
Square waves of U, V and W phases of (C) and (E) are generated, and the square wave and the inverse trapezoidal wave are compared by the comparison means 53, and (B), (D) and (F) of FIG. ) Control switching element U such as
Outputs P, VP, and WP pulses ((B) of FIG. 5,
Inversions of (D) and (F) become pulses for control switching elements UN, VN, and WN). As a result, the waveform of the output voltage (between U and V) of the inverter 2 is as shown in FIG.
There are 3 pulses consisting of 2 pulses located on both outer sides of 20 °. The output voltage of the inverter 2 is as shown in FIG.
The width θ ° of (B), that is, the peak value of the square wave of (A), (C), and (E) of FIG. 5 is controlled by changing the output V _C of the modulation factor calculation circuit 10 (FIG. B)).

Next, in order to increase the output voltage of the inverter 2 up to the maximum voltage that the inverter 2 can output, FIG.
At the output frequency of the inverter 2 where the width θ ° of (B) becomes equal to the minimum arc extinguishing period θ _min required for the control switching elements UP to WN, the pulse number switching means 54 is used.
The carrier wave generating means 51 is switched from 512 to 513. 513 in the carrier wave generating means 51 generates 0, and the 0 and the square wave of 522 in the modulated wave generating means 52 generate square waves of FIGS. 5A, 5C and 5E. 53
Then, the pulse as shown in FIG. 6B is output. As a result, the output voltage (between U and V) waveform of the inverter 2 becomes one pulse having a width of 120 ° as shown in FIG. 6B. Comparing the switching of 3 pulses and 1 pulse of FIG. 5 as shown in FIG. 6 with the switching of 3 pulses and 1 pulse of FIG. 2 as shown in FIG. 4, the voltage area of 3 pulses of FIG. 1 of 6 (B)
While the voltage area of three pulses in FIG. 4A is smaller than the voltage area of one pulse in FIG. 4B, the switching of 3 pulses and 1 pulse in FIG. It is easily understood that the amount of change in the output voltage of the inverter 2 is small and the fundamental wave component of the output voltage of the inverter 2 does not shift.

Here, the amount of change in the output voltage of the inverter 2 at the time of switching 3 pulses and 1 pulse (FIG. 6) in FIG. 5 is compared with that in the case of switching 3 pulses and 1 pulse of FIG. 2 (FIG. 4). To do.

When the output voltage waveform of the inverter 2 at the time of three pulses in FIG. 5 is expanded into a Fourier series, the magnitude (effective value) V _N3 of the fundamental wave component is

[0016]

[Equation 1]

Similarly, the fundamental wave component (effective value) V _O3 of the output voltage waveform of the inverter 2 at the time of three pulses in FIG.

[0018]

[Equation 2]

It becomes However, Es in _Equations 1 and 2 is the voltage value of the DC power supply 1.

From Equations 1 and 2, V _N3 and V for the width θ °
The _O3, normalized by the value at 1 pulse clogging theta = 0, when the figure expressed by V _N3 'and V _O3' respectively, is shown in FIG. As can be seen from FIG. 7, the output voltage of the inverter 2 is higher in the three pulses (V _N3 ′) of FIG. 5 than in the case of the three pulses (V _O3 ′) of FIG. When the three pulses of FIG. 2 (FIG. 3 (a)) and the three pulses of FIG. 5 (FIG. 3 (b)) are switched, the width θ is set so that the output voltage V _M of the inverter 2 becomes continuous as shown in FIG. Is controlled by the output V _C of the output of the modulation factor calculation circuit 10. Then, taking the vehicle inverter as an example, the minimum arc extinguishing period T _min required for the control switching elements UP to WN is 240 μm.
s If the output frequency f of the inverter 2 when switching to 1 pulse is f = 75 Hz, the minimum extinction period θ _min corresponding to T _min (= 240 μs) is

[0021]

(Equation 3)

Therefore, from FIG. 7 (Equations 1 and 2), the voltage of 88.7% of one pulse can be obtained with the three pulses of FIG. 2, while the one of the three pulses of FIG. 98.
It can be seen that the voltage is increased to 7% and the amount of voltage change when switching to one pulse is very small.

Finally, FIG. 1 is used to generate the three pulses shown in FIGS. 2B and 5B and the one pulse shown in FIG. 4B.
8 shows a specific detailed configuration of the modulation circuit 5 of FIG. In addition,
The same numbers and reference numerals in FIG. 1 and FIG. 8 have the same functions.
However, although the modulation operation is described in FIG. 1 by directly comparing the AC waveforms of the modulation wave and the carrier wave, in the specific example of FIG. 8, in order to simplify the circuit, as described below with reference to FIG. Comparison result of carrier wave ((a), (f), (nu) in FIG. 9) and DC level (V _{C in} FIG. 9) ((a), (g) in FIG. 9)
(Le)) is a direct current modulated wave ((d), (h),
In (e)), the method is divided into positive period and negative period.
The operation of FIG. 8 will be described with reference to FIG.

In FIG. 8, the frequency f ₀ according to the inverter frequency f is counted by the counter 514, and the ROM 4 (Read Only Memory) of the carrier triangular wave storage element 511 'is counted.
From the square wave memory element ROM1 of the modulated wave generating means 52,
The triangular wave and the square wave as shown in (a) and (d) of FIG. 9 are output. The triangular wave shown in FIG. 9A is compared with the DC level output V _C of the modulation factor calculation circuit 10 by the comparator 531, and the comparator 53
1 outputs a pulse as shown in FIG. 9B, and its output is given to the exclusive OR 532 together with the square wave of FIG. 9D, and the exclusive OR 532 is as shown in FIG. That is, the same three pulses as in FIG. 2B are generated. The ROMs 5 to 8 of the carrier triangular wave storage element 511 'have the number of pulses (pulse train) obtained by comparing the triangular wave and the sine wave, for example, 5,
A triangular wave that can obtain the same number of pulses as 9, 15, 27 is stored, and the number of pulses is switched by the pulse number switching means 54 in accordance with the inverter frequency f as shown in FIG. That is, the pulse frequency selector 541 presets the output frequency of the inverter 2 for switching the pulse frequency according to the output frequency f of the inverter 2.
One of the switching elements 5421 to 5427 of the pulse number switch 542 is selected by selecting one pulse number signal and outputting the selected signal.
One of them is operated to switch the output (ROMs 2 to 8) of the carrier wave generating means 51, that is, the number of pulses via the adder element 5428.

Next, the pulse number switching means 54 switches from the carrier triangular wave memory element 511 '(ROM4) to the inverted trapezoidal wave memory element 512' (ROM3). An inverted trapezoidal wave (upper side width 180 °, lower side width 60 °) like 9 (f) is output.
The inverted trapezoidal wave of FIG. 9F is compared with the DC level output V _C of the modulation factor calculation circuit 10 by the comparator 531, and the comparator 53
1 outputs a pulse as shown in FIG. This output is given to the exclusive OR 532 together with the square wave as shown in FIG. 9C (FIG. 9D) which is the output of the square wave storage element ROM1 of the modulated wave generating means 52, and the non-other logical OR. 532 is shown in FIG.
As in (i), that is, the same three pulses as in FIG. 5B are generated.

Further, by the pulse number switching means 54,
Reverse trapezoidal wave storage element 512 '(ROM3) to 0 storage element 51
Switching to 3 '(ROM2), 0 storage element 513' (R
OM2) outputs a 0 signal as shown in FIG. The 0 signal of FIG. 9 () is compared with the DC level output V _C of the modulation factor calculation circuit 10 by the comparator 531 and the comparator 531 outputs the 0 signal as shown in FIG. 9 (L). This output is given to the exclusive OR 532 together with the square wave as shown in FIG. 9 (e) ((d) and (h) in FIG. 9) which is the output of the square wave storage element ROM1 of the modulated wave generating means 52, The exclusive OR 532 generates one pulse as shown in FIG. 9A, that is, the same pulse as that in FIG. 4B.

The above description is for switching from the three pulses in FIG. 2 (FIG. 9 (e)) to the one pulse (FIG. 9 (w)) through the three pulses in FIG. 5 (FIG. 9 (i)). However, it goes without saying that the three pulses in FIG. 2 may be omitted and the five pulses may be directly switched to the one pulse through the three pulses in FIG. In this case, the three pulses in FIG. 2 are replaced by the three pulses in FIG. 5, and the number of parts hardly increases. However, when switching from 5 pulses to 3 pulses of FIG. 5, as can be seen from FIG. 3, the output voltage V _M of the inverter 2 is smaller than when switching from 3 pulses of FIG. 2 to 3 pulses of FIG. Since the width θ ° is large (see FIG. 7), the output current waveform of the inverter 2 becomes bad (ripple becomes large), which causes the commutation capacity of the inverter 2 to increase (increases the size of the inverter 2). Need careful consideration.

That is, as in the embodiment shown in FIGS. 1 and 8, one pulse (see FIG. 9 (e) from the three pulses in FIG. 2 (FIG. 9 (e)) is passed through the three pulses in FIG. 5 (FIG. 9 (re)). W)) is switched to a method in which the three pulses in FIG. 2 are omitted and one pulse is switched from five pulses directly through the three pulses in FIG.
The ripple of the output current is not increased, that is, the commutation capability of the inverter 2 is not increased (the inverter 2 is upsized).

Further, in the three pulses shown in FIG. 5 (FIGS. 9F to 9R), the output voltage V _M (V _N3 ′) of the inverter 2 has a width θ.
10 becomes non-linear as shown by the solid line in FIG. 7, so that from 512 ′ in the carrier wave generating means 51, the inverse trapezoidal wave shown in FIG. If a curved inverse trapezoidal wave like the solid line is generated, the change of the width θ ° becomes non-linear with respect to the change of the output V _C of the modulation factor calculation circuit 10, and the output voltage V _M of the inverter 2 becomes linear. It has the effect of changing. Further, from 512 'in the carrier wave generating means 51, not the inverse trapezoidal wave shown in FIG. 9 (f) as shown by the dotted line in FIG. 11, but a waveform having flat sides on both sides of the inverse trapezoidal wave as shown by the solid line in FIG. Then, if the flat width is made equal to the minimum arc extinction period θ _min required for the control switching elements UP to WN, the output V _C of the modulation factor calculation circuit 10 is automatically increased so that θ < θ _min. Since one pulse is used, there is an effect that 513 'in the carrier wave generating means 51 can be omitted.

The above-mentioned pulse number switching is intended for the case where the output frequency f of the inverter 2 increases, but the pulse number switching when the output frequency f of the inverter 2 decreases is the reverse control (see FIG. 3). Of course, the above effects are not impaired.

[0031]

According to the present invention, when the number of pulses is switched between 3 pulses and 1 pulse, the amount of change in the inverter output voltage is very small, and the phase shift of the fundamental wave component does not occur. The current jump is very small, the inverter does not fail in commutation (reduction of commutation capability), and the torque fluctuation is very small, and the induction motor can be operated smoothly.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram of a control device for an induction motor using a pulse width modulation inverter according to an embodiment of the present invention.

FIG. 2 is a 3-pulse waveform diagram obtained by comparing a sine wave and a triangular wave.

FIG. 3 is a diagram showing the relationship between the number of pulses and the inverter output voltage with respect to the inverter output frequency.

FIG. 4 is a waveform relationship diagram of 3 pulses and 1 pulse of FIG.

FIG. 5 is a waveform diagram of three pulses in which a square wave is a comparison of an inverse trapezoidal wave.

FIG. 6 is a waveform relationship diagram of the pulse of FIG. 5 and one pulse.

FIG. 7 is a characteristic diagram of the inverter output voltage in the three pulses shown in FIGS. 2 and 5.

FIG. 8 is a detailed configuration diagram of a modulation circuit.

FIG. 9 is an operation explanatory diagram of FIG. 8;

10 is an explanatory diagram of the operation of FIG.

FIG. 11 is an operation explanatory diagram of FIG. 8;

[Explanation of symbols]

1 ... DC power supply, 2 ... inverter, 3 ... induction motor, 4 ...
Gate signal processing circuit, 5 ... Modulation circuit, 51 ... Carrier wave generation means, 52 ... Modulated wave generation means, 53 ... Comparison means, 54 ...
Pulse number switching means.

Claims (2)

[Claims] 1. A DC voltage is inputted and an AC output having a variable frequency is inputted.
A plurality of switching elements (UP, VP,
Inverter consisting of WP, UN, VN, WN)
A modulation wave that determines the magnitude and frequency of the fundamental wave of the output voltage
Comparing the carrier wave, the gate signal of the switching element
Generated, thereby causing the inverter to operate in PWM
Having a modulation means (5) that is defined by the number of voltage pulses in a half cycle of the AC output voltage
The PWM control pulse mode is
There are three voltage pulses within a period of 120 °
The electrical angle of the AC output voltage from the first 3-pulse mode
And one pulse in the middle of the 120 ° period
Two rhinos located symmetrically on either side of the 120 ° period
AC through the second 3-pulse mode consisting of
Includes only a single voltage pulse within a half cycle of output voltage
Control of pulse width modulation inverter that switches to 1 pulse mode
In the control method, from the first 3-pulse mode to the second 3-pulse mode.
To switch to the AC mode, the AC output in the first 3-pulse mode is used.
The width θ ° of the voltage pulse of the input voltage must be
When the minimum arc extinction period required is approximately equal to θ _min °
The pulse width modulation inverter characterized by the above
Control method. 2. The method according to claim 1, wherein the second 3-pulse mode is used.
Mode and 1-pulse mode can be switched by the second 3 pulse mode.
The width θ ° of the voltage pulse of the AC output voltage in
Approximately equal to the minimum arc extinction period θ _min ° required for the switching element
A pal characterized by doing it when it became difficult
Control method for a width modulation inverter.