JPH0812545B2 - Pattern data output controller - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Use of the Invention] The present invention relates to a visible output data such as a character or a figure of a whole one screen (one page) in a display device or a printing device used as a visible output means of an electronic computer. Pattern data output control device for rotating the pattern data of 90 ° to the left or right and outputting the pattern data.

[Background of the Invention]

A conventional character pattern rotation method is disclosed in, for example, Japanese Patent Laid-Open No. 55-12.
As shown in Japanese Patent No. 3788, when a pattern such as a character or a figure is rotated left or right, it is rotated for each character, or one page is divided into a plurality of blocks and the blocks are rotated for each block. However, there is a drawback that the rotation process requires a long time.

[Object of the Invention]

An object of the present invention is to perform rotation processing in comparison with a conventional method when outputting pattern data of visible output data such as characters and figures for one page by 90 ° to a visible output means such as a display device or a printing device, as compared with the conventional case. It is to save a lot of time.

[Outline of Invention]

According to the present invention, pattern data for one page is read out in word units in a direction perpendicular to the output scanning direction of the visible output means from a full dot memory in which pattern data of visible output data for one page is vertically expanded. Once the pattern data for one page is collectively written by sequentially writing to the high-speed buffer memory, sequentially reading from the high-speed buffer memory bit by bit in the direction perpendicular to the output scanning direction of the visible output means, and outputting to the visible output means. And then rotate. Further, according to the present invention, the high-speed buffer memory has a two-sided structure, and while the pattern data is read out in bit units from one side,
The pattern data for each next word unit from the full dot memory is written on the other surface.

Example of Invention

2 and 3 are diagrams for explaining the rotation of the page character pattern. FIG. 2 shows the relationship between the full dot memory and the output result when outputting without rotation, and FIG. 3 shows the output after rotating. The relationship between the full dot memory and the output result is shown below. As for the rotation of the pattern, the data is dot-developed in the upright state on the full-dot memory to the last, and the rotation is added when sending the data to the printer or the display device. Hereinafter, one word of the full dot memory is composed of 16 bits, and a case will be described in which the data dot-developed in the full dot memory is printed as it is or rotated.

As shown in FIG. 2, normally, the data 208 expanded in the upright state in the full dot memory 201 is printed in the upright state. Therefore, one word 202 of the full dot memory 201 is printed in 16 horizontal directions. Bits, 1 bit in the vertical direction. Print data is read from the full dot memory 201,
Since it is serialized and sent to the printer 204, the printer 2
The traveling direction 205 of the scanning line such as the laser beam of 04 and the memory reading 203 of the full dot memory 201 are in the same direction. That is, in the memory reading order 203 of the full-dot memory 201, one line is read from left to right, and when it is completed, the lower line is read from left to right. At this time, since one word 202 has 16 bits in the horizontal direction, the next data may be read from the memory while the printer 204 is performing 16-bit printing. Therefore, the print data is 1 from the read data by the selector.
You can select each bit and send it to the printer. As a result, the print pattern 209 is printed on the paper 206 in an upright state with respect to the paper feeding direction 207.

FIG. 3 is an illustration of a state in which the dot-developed data 308 in the upright state in the full dot memory 301 is rotated 90 ° from the full dot memory 301 and printed on the paper 306. In this figure, 90 ° counterclockwise rotation is described as an example, but the same applies to 90 ° clockwise rotation.

In the full dot memory 301, the print data 308 in the upright state is displayed in the same manner as in the case of not rotating as described in FIG.
The dots are expanded, whereas the print pattern 309
In order to output the image rotated by 90 ° to the left, the reading order 303 of the memory must be the same as the traveling direction 305 of the scanning line such as the laser beam. That is, as shown in FIG. 3, it is necessary to read one column from top to bottom and then read one column on the left side. In this way, the printer 304 prints on the paper 306 a print pattern 3 rotated 90 ° to the left with respect to the paper feeding direction 307.
Can print 09.

Here, the problem is 1 of full dot memory 301
Since the word 302 has only one bit in the vertical direction, there is only one bit effective as a print dot in one memory access. The present invention solves this point as follows.

 FIG. 1 shows the principle configuration of the present invention.

FIG. 1 (a) shows a case where the page pattern data is not rotated but is printed in the state of being developed in the full dot memory 101. That is, the data stored in the full dot memory 101 is sequentially read in the horizontal direction in units of one word 102 in the same direction as the running direction 105 of the scanning line such as the printing laser beam of the printer. The read data is a register
The data is stored in 103, narrowed down to 1 bit by the selector 104, and sent to the printer.

On the other hand, FIG. 1B shows a case where the page pattern data is rotated and printed, and the full dot memory 101
In the same manner as in the traveling direction 109 of the scanning line such as the printing laser beam of the printer, one word (16 dots) of data is read vertically from top to bottom. This is received by the register 103 once, and it is 2 before the next 16 bits are read.
Dots are selected dot by dot by the selector 104 and written in the high speed buffer memories 105 and 106. The buffers 105 and 106 are memories each having a 1-bit width, and the combined capacity of the two is equal to or larger than the two columns of the full dot memory 101. Two buffers 105 and 106 are prepared, one for the 0th surface and the other for the 1st surface. While writing on one surface, the other surface is read-only, and when 16 raster scanning lines have finished scanning, the buffers for writing and reading Swap the faces. The 0th surface and the 1st surface are switched by the most significant address bits of the high speed buffer memories 105 and 106. That is, the line 108 in FIG. 1 (b) is a boundary line between the 0th surface and the 1st surface. While the data is written on the 0th surface, the 1st surface is for reading, but 16 rasters of data has already been written on the 1st surface. Two dots are read from one surface at a time, and the dots are narrowed down to one dot by the selector 107 and sent to the printer.

FIG. 4 shows how to store and read the print dots in the high-speed buffer memories 105 and 106 for rotating in the configuration of FIG. 1 (b).

In FIG. 4, one word is arranged as 102 in the full dot memory 101. If the bit positions are 00,01,02,03, ... 0E, 0F in order from the left, and the bit position of one word underneath is 10,11,12,13 …… 1E, 1F, high speed When writing to the buffer memories 105 and 106, first, 00, 01, ...
… Write the even bits of 0F to 105 and the odd bits to 106. At this time, 2 bits in the dotted line indicated by 406 are bits which are written in the high speed buffer memories 105 and 106 at one time. Next, when writing 1 word 10, 11, 12, ... 1F read from the full dot memory 101 to the high speed buffer memory 105, 106, contrary to the immediately preceding 1 word, an even number of bits is 10
6. Write odd bits to 105. The operation of reversing the write bit is performed by the selector 104 in FIG. 1 (b). In the next 1 word of the full dot memory 101, the even bits are written in 105 and the odd bits are written in 106, contrary to the previous 1 word.

Reading from the high speed buffer memories 105 and 106 is performed as follows. For example, when sequentially reading the rightmost one column in one word, that is, in the order of 0F, 1F, 2F, 3F, ..., As shown by the dotted line 407, 0F and 1F are read simultaneously, and the first By selecting one dot at a time with the selector 107 in FIG. 9B, the dots can be sent to the printer in the order of 0F and 1F. Next, it is sufficient to read out as shown by the dotted line 408, but in order to read out in this way, 8 addresses of the high speed buffer memories 105 and 106 are considered as one block (405 in FIG. 4 indicates a block boundary). (Shown), the last three digits of the address may be fixed, and the inverted fourth of the buffer 105 may be used as the address of the buffer 106 for the fourth digit from the bottom. Then, if the bits of the fifth digit or more from the bottom are sequentially added one by one, two bits of the dotted line 408 are read after the dotted line 407.

After reading the rightmost column in one word as described above, the bit in the fourth digit from the bottom (of the address of the high-speed buffer memory) is inverted, and the fifth digit or more is reset. Above, add one by one. As a result, 0E, 1E, 2E, 3E are read, and the second column from the right in one word of the full dot memory 101 is read. When the reading of the two columns is completed in this manner, the fixed intra-block address, that is, the lower three digits of the addresses of the high-speed buffer memories 105 and 106 are subtracted by one. In this state, if you repeat reading in the same way,
The full dot memory 101 is sequentially read out one column at a time.

Next, an embodiment for realizing reading from the full dot memory, writing into the high speed buffer memory, and reading as described above will be described.

FIG. 5 shows the configuration of an address counter for reading data from the full dot memory 101. The control device has a counter in order to know at which position on the scan line (hereinafter referred to as a raster) the laser beam or the like is provided, and the time is monitored. This is called an H counter and a B counter. B
The counter is composed of 4 bits, and 1 is added at the same clock as when one dot of printing is printed. The H counter is composed of 8 bits, and 1 is added when the B counter overflows. The H counter and B counter are reset at the beginning of every raster. The V counter monitors the position of the raster within one page, is reset at the beginning of the page, and is incremented by 1 at the start of each raster. The J counter consists of 12 bits, is reset at the beginning of the page, and is 1 every 16 bits for printing.
Is added. It is added as above for 16 rasters and reset at the beginning of the 17th raster. The VR counter is made up of 12 bits and moves at the same timing as the V counter, but is decremented by one. The initial value of the VR counter is loaded at the beginning of the page, and the value is a value for selecting the rightmost column of the full dot memory 101. As described above, the V counter and the VR counter move at the same timing, and one hardware can be commonly used as long as the addition operation is performed when the rotation is not performed and the subtraction operation is performed when the rotation is performed.

Fig. 5 (a) shows full dot memory 10 when it is not rotated.
1 shows an address configuration of 1. As described above, the H counter is incremented by 1 every 16 dots, and this becomes the horizontal word address of the full dot memory 101. On the other hand, the V counter serves as a vertical address of the full dot memory 101. This allows full dot memory 10
1 is read from left to right for every 16 dots printed, and when one raster is completed, it moves to the line below it and is read from left to right.

FIG. 5B shows the full dot memory 10 when rotating.
1 shows an address configuration of 1. Full dot memory 1
The horizontal address of 01 depends on the VR counter. However, the upper 8 bits of the VR counter are used as the horizontal address. As a result, the horizontal address is decremented by 1 every 16 rasters. The vertical address of the full dot memory 101 depends on the J counter. The J counter is incremented by 1 every 16 dots. As a result, the full dot memory 101 is
First, the rightmost column is read every 16 dots from top to bottom, and it reaches the bottom at the 16th raster. And the 17th raster is 1
The column on the left is read again from the top.

As described above, the manner in which the data read from the full-dot memory is written in the high-speed buffer memory in the arrangement as shown in FIG. 4, the data is read, serialized into 1 bit, and sent to the printer is explained. It is a figure.

The data read from the full dot memory 101 is once stored in the register 801 (corresponding to 103 in FIG. 1).
Although the register 801 is connected to the two selectors 804 and 805, the even bit of the register 801 enters the selector 804 and the odd bit of the register 801 enters the selector 805. 802 in the figure is a byte, 803
Indicates a bit. Selectors 804 and 805 select 1 bit each from the upper 3 bits of the B counter.
In other words, when the B counter (0,1,2) bit is 0, the leftmost bit is selected, and the value is incremented by 1 and moved to the right. Selector 80
The bits selected by 4,805 enter the selector 806. When the least significant bit (B) of the J counter is 0, the selector 806 outputs the input of the high speed buffer memory 807 (to 105 in FIG. 1) to the output of the selector 804 and the high speed buffer memory 808.
80 when the input (corresponding to 106 in FIG. 1) becomes the output of the selector 805 and the least significant bit (B) of the J counter is 1.
Select 7 inputs to be 805 outputs and 808 inputs to be 804 outputs. Each of the high-speed buffer memories 807 and 808 is 1 bit per word, and the total number of bits of 807 and 808 may be larger than the number of bits of the full dot memory 101 read vertically for two columns. In this embodiment, the high speed buffer memory 80
Each of 7,808 has 64K bits.

The high-speed buffer memories 807 and 808 are each divided into two by the highest address, and the first half is called the 0th surface and the latter half is called the 1st surface.
While the read data from the full dot memory 101 is being written on the 0th surface, the 1st surface is read and the data is sent to the printer. The roles of plane 0 and plane 1 alternate every 16 rasters.

Writing / reading of the high speed buffer memories 807 and 808 is performed by the write address register 809 and the read address register 810. In the configuration of the write address 809, the most significant bit is the above-mentioned 0-side and 1-side switching bit,
Use (7) bit of VR counter. The lowest 3 bits are the upper 3 bits (0, 1, 2) of the B counter, and 1 is added for every 2 dots. The rest is called the JD register. This register is a delay register of the J counter that loads the value immediately before the addition of the J counter when the J counter is incremented by 1. The JD register is constant for printing 16 dots. At this time, the J counter is concurrently operating to read the next data from the full dot memory.
The configuration of the read address register 810 of the high-speed buffer memories 807 and 808 is such that the most significant bit is the inverted (7) bit of the VR counter, the next 8 bits are the H counter, and the next 3 bits are the upper 3 bits of the B counter. (0,1,2)
Is. One is added for every 2 bits of the higher 3 bits of H and B. The next 1 bit is the least significant (B) bit of the VR counter for the high speed buffer memory 807, and for the high speed buffer memory 808, only that bit is inverted in the address by the inverter 813, and the ) Becomes the address. The lowest 3 bits are (8,9, A) bits of the VR counter. VR counter is 1 as described above
Since it is subtracted for each raster, the read address 810 can select bits as a whole as described in FIG.

The selectors 811 and 812 select the write address register 809 and the read address register 810. When the least significant bit (3) of the B counter is 0, the read address register 810 is set, and when it is 1, the write address register 809 is set.
You should choose.

The register 814 is a 1-bit register that temporarily stores the data read from the high-speed buffer memories 807 and 808, and holds the read data for the time of 2-bit printing. The selector 815 selects one bit from the registers 814 and 817. When the (B) bit of the VR counter is 0, the 814 is set to 1 if the (3) bit of the B counter is 0.
If the (B) bit of the VR counter is 1, then 817 is selected if the (3) bit of the B counter is 0.
If 1, select 814. As a result, the data can be sent to the printer in the order of printing. selector
The 815 also selects another bit when it does not rotate.
That is, in the case of no rotation, the selector 804 is selected when the (3) bit of the B counter is 0, and the selector 805 is selected when the B counter is 1. As a result, the output of the full dot memory 101 can be sent to the printer without rotating. The register 816 holds the 1-bit print data selected by the selector 815 for 1 dot, and sends the output to the printer.

〔The invention's effect〕

According to the present invention, a high-speed buffer memory is arranged between a full dot memory in which pattern data of visible output data for one page is vertically expanded and visible output means such as a display device or a printing device. 90 minutes pattern data at once
By performing the rotation processing by °, it is possible to significantly reduce the processing time required to rotate the entire page, as compared with the conventional rotation for each character or block. Further, in the present invention, the high-speed buffer memory has a two-sided structure, and while the pattern data is read from one side in bit units, the pattern data in the next word unit from the full dot memory is written to the other side. Thus, the pattern data can be rotated at a higher speed. Further, in the present invention,
Since the rotation process is performed in page units, the rotation process of graphic data other than characters can be easily achieved.

[Brief description of drawings]

FIG. 1 is a diagram showing the principle configuration of the present invention, FIGS. 2 and 3 are diagrams for explaining pattern rotation, and FIG. 4 is a diagram for explaining the principle of writing / reading to / from a high-speed buffer memory according to the present invention. FIG. 5 is a diagram showing the address configuration of the full dot memory, and FIG. 6 is a diagram showing an embodiment of the present invention. 101 …… Full dot memory, 103 …… Register, 104,107
...... Selector, 105,106 …… High-speed buffer memory.

Claims (1)

[Claims] 1. The pattern data of visible output data for one page to be output to a visible output means such as a display device or a printing device is n.
A full dot memory for storing in order the output scanning direction of the visible output means in word units of bits, and the pattern memory data for one page from the full dot memory is in the same direction as the output scanning direction of the visible output means. In the pattern data output control device which reads out in word units and sends it to the visible output means in a non-rotating manner, while writing on one surface in order to send the rotated pattern data to the visible output means, A two-sided high-speed buffer memory capable of reading from the other side, and the one-page pattern data from the full-dot memory are read word by word in a direction perpendicular to the output scanning direction of the visible output means. Means for writing on one side of the high speed buffer memory, and while writing on one side of the high speed buffer memory, From the other surface of the high-speed buffer memory, a means for outputting in a bit unit in a direction perpendicular to the output scanning direction of the visible output means, a writing surface and a reading surface of the high-speed buffer memory are the visible output means. And a means for alternately selecting at least every n scans corresponding to the output scan of 1.