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JPH0812944B2 - Method for manufacturing semiconductor laser - Google Patents
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JPH0812944B2 - Method for manufacturing semiconductor laser - Google Patents

Method for manufacturing semiconductor laser

Info

Publication number
JPH0812944B2
JPH0812944B2 JP58224783A JP22478383A JPH0812944B2 JP H0812944 B2 JPH0812944 B2 JP H0812944B2 JP 58224783 A JP58224783 A JP 58224783A JP 22478383 A JP22478383 A JP 22478383A JP H0812944 B2 JPH0812944 B2 JP H0812944B2
Authority
JP
Japan
Prior art keywords
layer
active layer
gaas
semiconductor laser
cladding layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58224783A
Other languages
Japanese (ja)
Other versions
JPS60116187A (en
Inventor
隆夫 山口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP58224783A priority Critical patent/JPH0812944B2/en
Publication of JPS60116187A publication Critical patent/JPS60116187A/en
Publication of JPH0812944B2 publication Critical patent/JPH0812944B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/227Buried mesa structure ; Striped active layer
    • H01S5/2275Buried mesa structure ; Striped active layer mesa created by etching

Landscapes

  • Semiconductor Lasers (AREA)

Description

【発明の詳細な説明】 (イ) 産業上の利用分野 本発明は半導体レーザの製造方法に関する。The present invention relates to a method for manufacturing a semiconductor laser.

(ロ) 従来技術 第1図A、Bは従来のCSP(チヤネルサブストレート
プレーナ)型及び埋込み型の半導体レーザを夫々示す。
(B) Prior Art FIGS. 1A and 1B show a conventional CSP (channel substrate planar) type and a buried type semiconductor laser, respectively.

第1図Aに示したCSP型半導体レーザは、紙面垂直方
向に延在する溝を有するn型GaAs(ガリウム砒素)基板
(1)上にn型Ga1−xAlxAs(ガリウムアルミ砒素)
(0<x<1)からなる第1クラツド層(2)、ノンド
ープGa1−yAlyAs(0≦v<x)からなる活性層
(3)、p型Ga1−xAlxAsからなる第2クラツド層
(4)、n型GaAsからなるキヤツプ層(5)を順次積層
し、その後溝直上のキヤツプ層(5)表面よりZn(亜
鉛)を第2クラツド層(4)に達する深さまで選択的に
拡散し拡散領域(6)を形成することにより得られる。
The CSP type semiconductor laser shown in FIG. 1A has an n-type Ga 1 -xAlxAs (gallium aluminum arsenide) on an n-type GaAs (gallium arsenide) substrate (1) having a groove extending in the direction perpendicular to the paper surface.
The first cladding layer (2) made of (0 <x <1), the active layer (3) made of non-doped Ga 1 -yAlyAs (0 ≦ v <x), and the second cladding layer made of p-type Ga 1 -xAlxAs ( 4), a cap layer (5) made of n-type GaAs is sequentially laminated, and then Zn (zinc) is selectively diffused from the surface of the cap layer (5) directly above the groove to a depth reaching the second cladding layer (4). Obtained by forming a diffusion region (6).

また、第1図Bに示した埋込み型半導体レーザはn型
GaAs基板(11)上にn型Ga1−xAlxAsからなる第1クラ
ツド層(12)、ノンドープGa1−yAlyAsからなる活性層
(13)、p型Ga1−xAlxAsからなる第2クラツド層(1
4)、p型GaAsからなるキヤツプ層(15)を順次積層
し、その後上記成長層を紙面垂直方向に延在するストラ
イプ形状に部分的にエツチング除去すると共に斯るエツ
チング除去部分に実質的に高抵抗となる埋込み層(16)
を形成することにより得られる。
In addition, the embedded semiconductor laser shown in FIG. 1B is an n-type semiconductor laser.
A first cladding layer (12) made of n-type Ga 1 -xAlxAs, an active layer (13) made of undoped Ga 1 -yAlyAs, and a second cladding layer (1) made of p-type Ga 1 -xAlxAs on a GaAs substrate (11).
4) A cap layer (15) made of p-type GaAs is sequentially laminated, and then the growth layer is partially etched away in a stripe shape extending in the direction perpendicular to the plane of the drawing, and a substantially high level is formed on the etching removed portion. Buried layer as resistance (16)
Is obtained.

尚、図中(7)及び(17)は夫々のキヤツプ層とオー
ミツク接触する第1電極であり、(8)及び(18)は夫
々の基板とオーミツク接触する第2電極である。
In the figure, (7) and (17) are the first electrodes in ohmic contact with the respective cap layers, and (8) and (18) are the second electrodes in ohmic contact with the respective substrates.

上記両半導体レーザにおいて夫々第1、第2電極間に
順方向バイアスを印加すると、CSP型半導体レーザでは
溝直上部の活性層(3)より、また埋込み型半導体レー
ザでは活性層(13)より夫々単一モードで高効率なレー
ザ光が発振する。
When a forward bias is applied between the first and second electrodes of both semiconductor lasers, the active layer (3) immediately above the groove in the CSP type semiconductor laser and the active layer (13) in the buried type semiconductor laser respectively. Highly efficient laser light oscillates in a single mode.

然るに斯る両半導体レーザより発振されるレーザ光は
水平方向のビーム広がり角θが20゜程度、垂直方向の
ビーム広がり角θ⊥が40゜以上となりビームの真円率θ
/θ⊥が0.5前後であつた。
Therefore, the laser light oscillated from both semiconductor lasers has a horizontal beam divergence angle θ of about 20 ° and a vertical beam divergence angle θ⊥ of 40 ° or more, and the circularity of the beam θ
/ Θ⊥ was around 0.5.

これは活性層の層厚が0.1μm以下であるのに対して
実質的にレーザ光を発振する活性層の水平方向の幅が2
〜5μmと広いためである。
This means that while the active layer has a thickness of 0.1 μm or less, the width of the active layer that oscillates laser light in the horizontal direction is substantially 2
This is because it is as wide as ~ 5 μm.

従来より実質的にレーザ光を発振する活性層の断面形
状が正方形あるいは円形に近いものであると発振された
レーザ光が真円になることは理論的に確認されている。
然るにこのような形状に活性層を形成する方法は未だ開
発されていなかつた。
It has been theoretically confirmed that the oscillated laser light becomes a perfect circle if the cross-sectional shape of the active layer that substantially oscillates the laser light is a square or a circle.
However, the method of forming the active layer in such a shape has not been developed yet.

(ハ) 発明の目的 本発明は斯る点に鑑みてなされたもので、活性層の断
面形状が略正方形となる半導体レーザの製造方法を提供
せんとするものである。
(C) Object of the invention The present invention has been made in view of the above circumstances, and an object thereof is to provide a method for manufacturing a semiconductor laser in which an active layer has a substantially square cross-sectional shape.

(ニ) 発明の構成 本発明は、半導体基板の一主面上に溝を形成する工
程、該基板の一主面上に第1クラッド層及び活性層を夫
々の表面形状が上記溝を有した一主面形状と略同一にな
るように順次形成する工程、上記活性層を上記溝上のみ
に残してその断面形状が略正方形になるようにメルトバ
ックする工程、該メルトバックにより露出した表面上に
第2クラッド層を形成する工程、を備えたことを特徴と
する。
(D) Structure of the Invention In the present invention, the step of forming a groove on one main surface of a semiconductor substrate, the surface shape of each of the first cladding layer and the active layer on the main surface of the substrate has the groove. A step of sequentially forming so as to have substantially the same main surface shape, a step of melting back the active layer only on the groove so that its cross-sectional shape becomes a substantially square shape, and a surface exposed by the meltback And a step of forming a second clad layer.

(ホ) 実施例 第2図A乃至Fは本発明の一実施例を示す工程別断面
図である。
(E) Example FIG. 2A to FIG. 2F are cross-sectional views by process showing one example of the present invention.

第2図Aは第1工程を示し、Si(シリコン)がドープ
されたキヤリア濃度して1〜2×1018/cm3のn型GaAs基
板(30)の一主面上に紙面垂直方向に延在し、溝巾B=
1.0μm、深さD=1.0μmの溝(31)を形成する。斯る
溝(31)形成には周知のエツチング技術を用いることに
より行なう。
The Figure 2 A shows a first step, in the direction perpendicular to the paper surface on one main surface of the Si n-type GaAs substrate (silicon) with carrier concentration is doped 1~2 × 10 18 / cm 3 ( 30) Extending, groove width B =
A groove (31) having a depth of 1.0 μm and a depth D of 1.0 μm is formed. The groove (31) is formed by using a known etching technique.

第2図Bは第2工程を示し、基板(30)の一主面上に
斯る一主面の表面形状と略同一の表面形状を有する第1
クラツド層(32)、活性層(33)、第1GaAs層(34)を
順次積層する。上記第1クラツド層(32)はSn(錫)を
ドーパントとしてそのキヤリア濃度が約7×1017/cm3
n型Ga0.5Al0.5Asからなり、活性層(33)はノンドープ
Ga0.85Al0.15Asからなり、第1GaAs層(34)はノンドー
プGaAsからなる。
FIG. 2B shows a second step, in which the first main surface of the substrate (30) has substantially the same surface shape as that of the first main surface.
The cladding layer (32), the active layer (33), and the first GaAs layer (34) are sequentially laminated. The first cladding layer (32) is made of n-type Ga0.5Al0.5As having a carrier concentration of about 7 × 10 17 / cm 3 with Sn (tin) as a dopant, and the active layer (33) is non-doped.
The first GaAs layer (34) is made of Ga0.85Al0.15As and the undoped GaAs.

また上記各層の表面形状を基板(30)の一主面と略同
一とするためには上記各層を分子線エピタキシヤル成長
方法もしくは有機金属気相成長方法により形成すること
が好ましい。
In order to make the surface shape of each layer substantially the same as the main surface of the substrate (30), it is preferable to form each layer by a molecular beam epitaxial growth method or a metal organic chemical vapor deposition method.

下表は分子線エピタキシヤル成長方法により上記各層
を形成する際の成長条件を示す。尚、表中TGa、TAs、TA
l、TSnは夫々ガリウムセル、砒素セル、アルミニウムセ
ル、錫セルの温度を示し、また分子線エピタキシヤル成
長装置内の成長前のバツクズラウンド真空度は10-10Tor
r以下とすると共に成長中の基板温度は700℃〜750℃と
した。
The table below shows the growth conditions for forming the above layers by the molecular beam epitaxial growth method. In addition, TGa, TAs, TA in the table
l and TSn represent the temperatures of gallium cell, arsenic cell, aluminum cell, and tin cell, respectively, and the backs-round vacuum degree before growth in the molecular beam epitaxial growth apparatus is 10 -10 Tor.
The substrate temperature during the growth was set to 700 ° C. to 750 ° C. while being set to r or less.

上記条件により形成された第1クラツド層(32)、活
性層(33)、第1GaAs層(34)の層厚は夫々0.8μm、0.
6μm、0.5μmである。
The layer thicknesses of the first cladding layer (32), the active layer (33) and the first GaAs layer (34) formed under the above conditions are 0.8 μm and 0.1 μm, respectively.
6 μm and 0.5 μm.

第2図Cは第3工程を示し、第1GaAs層(34)上に表
面が平坦な第2GaAs層(35)を形成する。斯る第2GaAs層
(35)の形成は周知の液相エピタキシヤル成長方法によ
り形成し、その厚みは約1μmとする。
FIG. 2C shows the third step, in which the second GaAs layer (35) having a flat surface is formed on the first GaAs layer (34). The second GaAs layer (35) is formed by the well-known liquid phase epitaxial growth method, and its thickness is about 1 μm.

第2図Dは第4工程を示し、第1、第2GaAs層(35)
(34)及び活性層(33)の一部を第2GaAs層(35)表面
より第1クラツド層(32)の平坦な表面に達するまで均
一にメルトバツクにより除去する。具体的には例えばGa
AlAs成長用融液等を上記第2GaAs層(35)表面上に接触
させ785℃で2分間保持することにより行える。
FIG. 2D shows the fourth step, the first and second GaAs layers (35).
(34) and part of the active layer (33) are uniformly removed from the surface of the second GaAs layer (35) by melt back until reaching the flat surface of the first cladding layer (32). Specifically, for example, Ga
This can be performed by bringing a melt for growing AlAs or the like into contact with the surface of the second GaAs layer (35) and holding it at 785 ° C. for 2 minutes.

第2図Eは第5工程を示し、上記第4工程により露出
した第1クラツド層(32)及び活性層(33)表面にGe
(ゲルマニウム)をドーパントし5×1017〜3×1018/c
m3のキヤリア濃度を有するp型Ga0.5Al0.5Asからなる第
2クラツド層(35)及びn型GaAsからなるキヤツプ層
(36)を順次積層する。斯る第2クラツド層(35)、キ
ヤツプ層(36)の形成は周知の液相エピタキシヤル成長
方法により行ない、その層厚は第2クラツド層(35)が
0.8μm、キヤツプ層(36)が約1.0μmとした。
FIG. 2E shows a fifth step, and Ge is formed on the surfaces of the first cladding layer (32) and the active layer (33) exposed by the fourth step.
Dopant (germanium) 5 × 10 17 to 3 × 10 18 / c
A second cladding layer (35) made of p-type Ga0.5Al0.5As having a carrier concentration of m 3 and a cap layer (36) made of n-type GaAs are sequentially laminated. The formation of the second cladding layer (35) and the capping layer (36) is performed by a known liquid phase epitaxial growth method, and the thickness of the second cladding layer (35) is the same as that of the second cladding layer (35).
The thickness of the cap layer (36) was 0.8 μm, and the cap layer (36) was about 1.0 μm.

上記第3乃至第5工程は一連の液相エピタキシヤル成
長工程により連続的に処理できる。第3図は斯る処理工
程の温度プログラムを示し、まず時刻t0において780℃
に保持されたGaAs成長用融液を第1GaAs層(34)表面と
接触せしめ冷却速度0.5℃/minで775℃まで冷却すること
により表面が平坦な第2GaAs層(35)が形成できる。次
いで上記融液を接触させた状態でGaAs成長用融液の濃度
を785℃まで昇温し約2分間保持することにより第1、
第2GaAs層(34)(35)及び活性層(33)の一部が除去
(メルトバツク)できる。その後時刻t1で785℃に保持
された第2クラツド層成長用融液を上記メルトバツクに
より露出した第1クラツド層(32)及び活性層(33)表
面に接触せしめ、冷却速度0.5℃/minで780℃まで降温す
ることにより第2クラツド層(35)が成長する。次いで
時刻t2において780℃に保持されたキヤツプ層成長用融
液を上記第2クラツド層(35)表面に接触せしめ、冷却
速度0.5℃/minで775℃まで降温し、時刻t3で融液を切り
離し室温まで冷却することによりキヤツプ層(36)が成
長する。
The above third to fifth steps can be continuously performed by a series of liquid phase epitaxial growth steps. FIG. 3 shows a temperature program for such a treatment process. First, at time t 0 , 780 ° C.
The second GaAs layer (35) having a flat surface can be formed by bringing the melt for GaAs growth held in contact with the surface of the first GaAs layer (34) and cooling it to 775 ° C. at a cooling rate of 0.5 ° C./min. Then, the concentration of the GaAs growth melt is raised to 785 ° C. in the state where the above melt is in contact with the melt, and the temperature is maintained for about 2 minutes.
Part of the second GaAs layers (34) (35) and the active layer (33) can be removed (melt back). Then, at time t 1 , the melt for growing the second cladding layer kept at 785 ° C. was brought into contact with the surfaces of the first cladding layer (32) and the active layer (33) exposed by the melt back, and the cooling rate was 0.5 ° C./min. The second cladding layer (35) grows by lowering the temperature to 780 ° C. Then contacted a cap layer growth melt held in the 780 ° C. at time t 2 to the second Kuratsudo layer (35) surface, the temperature was lowered to 775 ° C. at a cooling rate of 0.5 ° C. / min, it melts at time t 3 The cap layer (36) grows by disconnecting and cooling to room temperature.

第2図Fは最終工程を示し、活性層(33)直上のキヤ
ツプ層(36)表面より第2クラツド層(35)に達する深
さまでZn(亜鉛)を拡散し、p型の拡散領域(37)を形
成すると共にキヤツプ層(36)表面に拡散領域(37)と
オーミツク接触する第1電極(38)及び基板(30)裏面
とオーミツク接触する第2電極(39)を夫々形成する。
FIG. 2F shows the final step, in which Zn (zinc) is diffused from the surface of the cap layer (36) immediately above the active layer (33) to a depth reaching the second cladding layer (35), and a p-type diffusion region (37) is formed. ) Is formed on the surface of the cap layer (36) and a second electrode (38) in ohmic contact with the diffusion region (37) and a second electrode (39) in ohmic contact with the back surface of the substrate (30) are formed.

このようにして形成された半導体レーザでは、活性層
(33)の共振器端面と平行な断面形状が0.4×0.4μm2
略正方形となり、またその電流−電圧特性は第4図中実
線Iで示す如くなつた。更にビームの垂直方向広がり角
θ⊥及び水平方向広がり角θは第5図に示す如く略20
゜となり一致した。また上記活性層(33)の断面形状を
0.6×0.6μm2とした際にはその電流−電圧特性は第4図
中実線で示す如くなりかつビームの真円率は略1とな
つた。
In the semiconductor laser thus formed, the cross-sectional shape of the active layer (33) parallel to the cavity facet is a square of 0.4 × 0.4 μm 2 , and its current-voltage characteristic is shown by the solid line I in FIG. It was as shown. Further, the vertical divergence angle θ⊥ and the horizontal divergence angle θ of the beam are approximately 20 as shown in FIG.
It became a degree and agreed. In addition, the cross-sectional shape of the active layer (33) is
When it was set to 0.6 × 0.6 μm 2 , the current-voltage characteristic was as shown by the solid line in FIG. 4 and the circularity of the beam was about 1.

尚、本実施例ではGaAs−GaAlAs系材料からなる半導体
レーザについて説明したが、本発明はInAsP−InAlAsP等
の他の材料からなる半導体レーザに適用することも可能
である。
Although the semiconductor laser made of a GaAs-GaAlAs-based material has been described in this embodiment, the present invention can also be applied to a semiconductor laser made of another material such as InAsP-InAlAsP.

(ヘ) 発明の効果 本発明によれば活性層の断面形状を略正方形となすこ
とができるので、出力ビームの真円率が略1となる半導
体レーザを得ることができる。
(F) Effect of the Invention According to the present invention, since the cross-sectional shape of the active layer can be made substantially square, it is possible to obtain a semiconductor laser in which the circularity of the output beam is approximately 1.

【図面の簡単な説明】[Brief description of drawings]

第1図は従来例を示す断面図、第2図乃至第5図は本発
明の実施例を示し、第2図は工程別断面図、第3図は温
度プログラム図、第4図及び第5図は特性図である。 (30)……基板、(32)……第1クラツド層、(33)…
…活性層、(35)……第2クラツド層。
FIG. 1 is a sectional view showing a conventional example, FIGS. 2 to 5 show an embodiment of the present invention, FIG. 2 is a sectional view according to steps, FIG. 3 is a temperature program diagram, FIG. 4 and FIG. The figure is a characteristic diagram. (30) …… Substrate, (32) …… First cladding layer, (33)…
… Active layer, (35) …… Second cladding layer.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】半導体基板の一主面上に溝を形成する工
程、該基板の一主面上に第1クラッド層及び活性層を夫
々の表面形状が上記溝を有した一主面形状と略同一にな
るように順次形成する工程、上記活性層を上記溝上のみ
に残してその断面形状が略正方形になるようにメルトバ
ックする工程、該メルトバックにより露出した表面上に
第2クラッド層を形成する工程、を備えたことを特徴と
する半導体レーザの製造方法。
1. A step of forming a groove on a main surface of a semiconductor substrate, wherein a surface of each of a first cladding layer and an active layer is formed on the main surface of the substrate and the main surface shape has the groove. A step of sequentially forming the layers so that they are substantially the same, a step of melting back the active layer only on the groove so that its cross-sectional shape becomes a square shape, and a second clad layer on the surface exposed by the meltback. And a step of forming the semiconductor laser.
JP58224783A 1983-11-28 1983-11-28 Method for manufacturing semiconductor laser Expired - Lifetime JPH0812944B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58224783A JPH0812944B2 (en) 1983-11-28 1983-11-28 Method for manufacturing semiconductor laser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58224783A JPH0812944B2 (en) 1983-11-28 1983-11-28 Method for manufacturing semiconductor laser

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JPS60116187A JPS60116187A (en) 1985-06-22
JPH0812944B2 true JPH0812944B2 (en) 1996-02-07

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JP58224783A Expired - Lifetime JPH0812944B2 (en) 1983-11-28 1983-11-28 Method for manufacturing semiconductor laser

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Family Cites Families (1)

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Publication number Priority date Publication date Assignee Title
JPS5925399B2 (en) * 1979-11-28 1984-06-16 三菱電機株式会社 Manufacturing method of semiconductor laser

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JPS60116187A (en) 1985-06-22

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