JPH0813559B2 - Data generator for pulse generator - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus (PWM pulse generation circuit) for generating a pulse having a controlled pulse width. Specifically, in order to generate a pulse having an arbitrary target pulse width from a pulse generator in which the width of the output pulse with respect to the input data varies (or is unknown), a pulse generator for generating a pulse having an arbitrary target pulse width from the source data corresponding to the target pulse width The present invention relates to a data generation device that generates input data.

2. Description of the Related Art Some laser printers used in digital copying machines, laser printers, and the like control the print density by modulating the laser output. In this case, since the laser output is usually controlled by the pulse width, pulse width control (PWM) for converting the print data into pulses having a pulse width corresponding to the print data is required.

In a high-speed laser printer, the processing speed of print data is also high, and the width of the pulse for transferring data is also very short. Here, if information regarding the print density (gradation information) is added to the data of each print dot and the pulse width is controlled according to the print density, it is necessary to use a very high-speed reference clock pulse.
For example, if the print density (gradation) is to be expressed in eight steps, it is necessary to prepare a reference pulse having a width of 1/8 as compared with the case where there is no gradation. However, if the speed of the reference clock pulse is increased, it is necessary to use high-speed peripheral devices accordingly, which significantly increases the cost of the device as a whole. Is difficult to adopt.

Therefore, in order to perform such pulse width control (PWM), a method of generating a PWM pulse by using a delay element instead of using a high-speed reference clock has been considered. This delays a reference pulse (usually a clock pulse) by passing it through several delay elements, and delays it with the delayed pulse (not delayed).
A pulse having a short width (delay time corresponds to this width) is obtained by the difference between the reference pulses.

Problems to be Solved by the Invention A PWM pulse generation circuit (hereinafter, P
To obtain a pulse of arbitrary width from the WM circuit),
The number of delay elements in the PWM circuit, which is the number of delay elements to be used, is input to the PWM circuit.

However, the delay element has slightly different characteristics for each PWM circuit (generally integrated into an IC), and even if the same number of stages of data is input, the pulse width output for each PWM circuit (IC) differs. Even in one PWM circuit, the output pulse width for the same input data (stage number data) varies depending on the temperature of the environment in which it is used and the fluctuation of the power supply voltage.

Conventionally, the variation between individual PWM circuits (IC) was adjusted by taking the relationship between input and output for each IC, but this was time-consuming and labor-intensive. Although this method can eliminate individual differences, it cannot deal with fluctuations in output pulse width due to fluctuations in environmental temperature and power supply voltage.

On the other hand, when the PWM circuit is used in a specific device such as a laser printer, the data (primitive data) for specifying the pulse width output from the PWM circuit cannot be changed according to the temperature of the environment or the power supply voltage. . For example, in a laser printer in which the print density is controlled by the laser output time, data related to print density (hereinafter simply referred to as print data) is input to a PWM circuit to generate a pulse of a predetermined width to be given to a laser generator. Although it is output, it is not possible to change the print data according to the individual difference or characteristic change of the PWM circuit. Therefore, a device for generating the input data of the pulse generation circuit based on the original data (print data in the above example) for generating the pulse of the desired width from the PWM circuit is required.

The relationship between the print data (primary data), the step number data to be input to the PWM circuit, and the pulse width (relative value when the width of the reference pulse is 100%) output from the PWM circuit is shown in the diagram below. It looks like Figure 2. The three straight lines shown in the left half of this graph are the PWM circuit CMIN composed of delay elements with a very short delay time, the PWM circuit CMAX composed of delay elements with a very long delay time, and the middle of them. Comprised of delay elements with a delay time of about
3 shows the relationship between the input stage number data and the output pulse width for three types of PWM circuits, the PWM circuit CMD. For example, to obtain a 50% wide pulse from a PWM circuit CMIN using a delay element with a very short delay time,
It is necessary to input the stage number data having a value larger than that of the intermediate PWM circuit CMD (that is, more delay elements must be used). Also, as mentioned above,
Even with a single PWM circuit, the delay time of the delay element changes due to changes in environmental temperature and power supply voltage, so the relationship between the input data (stage number data) and the output pulse width changes from CMIN to CMAX in some cases.

In this way, even if the step number data obtained by converting the print data into a single with a constant relation L is input to the PWM circuit in which the output pulse width fluctuates with respect to the input data, the pulse widths obtained by the individual circuit are obtained. It varies from time to time or according to the environmental temperature and power supply voltage. For example, even if the print data P50 corresponding to the 50% density is input, the pulse width (that is, the actual print density) obtained by that is less than 50% t1.
There is a case where it becomes the value (in the case of CMIN), 100%
(In other words, black) in some cases (in the case of CMAX).
In addition, even if the print data P100 corresponding to 100% density (black) is input, there are cases where only halftone (pulse width t2) is printed (in the case of CMIN).

Another problem of the PWM pulse generation circuit using the delay element is that the pulse generation circuit cannot obtain a pulse having a width equal to or smaller than a predetermined minimum width or larger than a maximum width. Since the pulse generation principle of the PWM circuit using the delay element is as described above, the output pulse of the PWM circuit is originally 0 to 10 of the cycle T of the reference pulse (Fig. 4 (a)).
It should be possible to take any value between 0% (if the number of stages of delay elements is large enough), but in reality, it is limited by the delay characteristics of the output buffer of the PWM circuit, and as shown in FIG. Further, no pulse having a predetermined minimum width tMIN or less is output, and no pulse having a maximum width tMAX or more is output. That is, even if the data of the number of steps corresponding to the width of tMIN or less is input to the PWM circuit, the output remains 0 ((c) in the figure).
Even if the data of the number of stages corresponding to the width of tMAX or more is input, the output remains 1 ((d) in the same figure). Input stage number data and output pulse width for this PWM circuit (reference pulse period T
Is shown in FIG. 3. Therefore, this problem must be taken into consideration when adjusting the PWM output.

The present invention solves these problems, generates an accurate pulse having an arbitrary pulse width, and further takes into account the characteristics of the PWM circuit, and an input for a PWM circuit to obtain a pulse output that correctly corresponds to the original data. An object is to provide a data generation (or data conversion) device.

Means for Solving the Problems In order to achieve the above object, in the present invention, as shown in FIG. 1, in order to generate an output pulse So having a target pulse width from a pulse generator 10, the target pulse width is adjusted. In the device for generating the input data for the pulse generator from the source data Do, the source data Do is generated based on a predetermined conversion relation.
A conversion means 12 for converting the input data Di into 10 and a conversion relation changing means 14 for changing the predetermined conversion relation.
Pulse detection means 18 for detecting whether or not a pulse exists in the output So of the pulse generator 10, and the source data Do and the input data Di at the time when a pulse starts to be generated in the output So of the pulse generator 10. A first conversion relationship holding means 16 for holding the conversion relationship with, a phase comparison means 19 for comparing the output pulse So of the pulse generator 10 with a calibration pulse Sc having a predetermined pulse width, and both pulses in the phase comparison means 19. The second that holds the conversion relationship between the calibration source data Doc and the input data Di corresponding to the pulse width of the calibration pulse Sc at the time when the widths of So and Sc match
The conversion relationship holding means 17 is provided.

When the source data Do is supplied to the work conversion means 12, the conversion means 12 converts the source data Do into input data Di based on a predetermined conversion relationship and supplies the input data Di to the pulse generator 10. The conversion relation changing means 14 changes the input data Di to the pulse generator 10 by changing the conversion relation. Input data Di
The pulse So generated from the pulse generator 10 in response to the pulse is given to the pulse detecting means 18 and the phase comparing means 19.

The pulse detection means 18 and the conversion relation variation means 14 cooperate with each other,
The conversion relation at the time when a pulse starts to be output from the pulse generator 10 is detected. That is, if the pulse is not yet output, the conversion relationship in the conversion means 12 is changed to change the input data Di in the direction in which the pulse is output, and if the pulse is already output, it is output. The input data Di is changed so that it disappears. here,
The state in which no pulse is output means not only the state shown in FIG. 4 (c) but also the state shown in FIG. 4 (d). The conversion relation between the original data Do and the input data Di at the time when the pulse starts to be output is held by the first conversion relation holding means 16.

In the phase comparison means 19, the output pulse So of the pulse generator 10
Is compared with the calibration pulse Sc in phase, and the result is fed back to the conversion relation changing means 14. As a result, the conversion relation changing means 14 changes the conversion means 1 so that the widths of So and Sc become equal.
The conversion relation in 2 is changed and reflected in the input data Di. When the pulse width of the output pulse So of the pulse generator 10 and the pulse width of the calibration pulse Sc match, the conversion relation between the calibration source data Doc and the input data Di at that time is held in the second conversion relation holding means 16. To do.

In this way, after the calibration related to the data conversion by pulse detection and phase comparison is completed, when the source data Do corresponding to the desired pulse width is put into the conversion means 12, the conversion means
The pulse generator 10 generates input data Di based on the relationship held in the first and second conversion relationship holding means 16 and 17.
To enter. As a result, the pulse generator 10 can generate a pulse So having a desired width, and can always generate the pulse So for any source data Do.

Embodiments Embodiments of the present invention will be described below with reference to the drawings.
FIG. 5 is a block diagram of a pulse width control (PWM) pulse generation circuit for adjusting the laser output of the laser printer of the digital copying machine. In this embodiment, the pulse generation circuit 50 includes an inverter INV, four delay elements D1, D2,
It is composed of D3, D4, a selector 32 for selecting whether or not to include these delay elements in the circuit, and an AND circuit AND. The pulse generating circuit 50 generates a pulse Sb having an arbitrary width (however, within the period of the reference pulse Sa) based on the reference pulse Sa, and its principle is as follows.

The reference pulse Sa is divided into two routes in the pulse generation circuit 50, one route (upper side in FIG. 5) is inverted and delayed, and the other route is directly ANDed together.
Input to the circuit. Therefore, the AND circuit outputs a pulse Sb having a width corresponding to the time delayed by the delay element.
Is output.

Here, by inputting the stage number data Di to the selector 32, the delay elements (D1, D2,
One or a combination of two or more of D3 and D4) is selected and the delay time can be adjusted, so that a pulse having a width corresponding to the input data Di is eventually output from the pulse generation circuit 50. The pulse generation circuit 50 plays a role of generating a pulse having a width proportional to the print density from data for adjusting the print density used in the laser printer (hereinafter, simply referred to as print data). is there. Therefore, a multiplier 36 for multiplying the correction coefficient Da for converting the print data into the step number data and an adder 38 for adding the offset value Db are provided.

However, the delay element unit that forms the pulse generation circuit 50 (one in which D1, D2, D3, and D4 are formed on one substrate)
There is individual difference, and even with one delay element unit, the delay time varies due to the influence of environmental temperature, power supply voltage, etc. Therefore, the relationship between the input stage number data Di and the output pulse width varies. (Fig. 2). When the print data has a value close to 0 or a value close to 100%, due to the characteristics of the PWM circuit as shown in Fig. 3, the print of the density corresponding to the print data is not always performed. There are cases where it does not exist.

Therefore, in the present embodiment, by using the microcomputer 30, the correction coefficient data Da and the offset data Db when converting the print data into the step number data Di are sequentially corrected as follows, and the print data and the PWM output Sb ( That is, the adjustment is performed so as to approach an ideal state in which the relationship with the print density is always correct.

First, in this embodiment, a pulse detection circuit 40 for detecting whether or not a pulse is output from the AND circuit, and a phase comparison circuit 42 for comparing the phases of the PWM output Sb and the calibration pulse Sc are provided. Here, the pulse detection circuit 40 detects the time when a pulse starts to be detected as shown in FIG. 4 (b) from the state shown in FIG. 4 (c) or (d).
The calibration pulse Sc input to the phase comparison circuit 42 is
It is a pulse having a width of one point value within the range of the PWM output Sb. Normally, it is desirable to set the pulse width of the PWM circuit that is used most frequently (or should be controlled most accurately).

6 (a) and 6 (b) show specific configuration examples of the pulse detection circuit and the phase comparison circuit. Here, the pulse detection circuit (a) is composed of three D flip-flops DFF and one AND circuit. Further, the phase comparison circuit (b) can be composed of only one flip-flop DFF.

Next, the operation of the microcomputer 30 in the case of calibrating the relationship between the print data and the width of the output pulse in the PWM pulse generation circuit having the above configuration will be described. First, i) print data corresponding to a print density of 0 (white) is given, the offset data Db is calibrated until a pulse is generated from the pulse generation circuit 50 for this print data, and then 50% A two-step calibration is performed in which print data corresponding to the density is given, and the correction coefficient data Da is calibrated by a calibration pulse so that the width of the output pulse from the pulse generation circuit 50 at this time is just 50%. The method will be described.

In this case, the microcomputer 30 performs the processing shown in FIG. First, in step # 10, the value "0" is given to the first location of the register 34 as the test data IP. In addition,
This position of the register 34 is a place where the print data P is input in the normal state. In the next step # 12, the offset data Db is incremented by 1 from the current value. The correction coefficient data Da remains the current value. This allows
In the multiplier 36, the test data IP (= 0) and the correction coefficient data
Multiply by Da, and the adder 38 adds the multiplication result Dc (= 0) and the offset data Db to input data (stage number data).
Di and give it to the selector 32. In step # 14, the input data Di (= Db) created in this way is processed.
Whether or not a pulse is detected in the PWM output Sb is determined based on the detection result from the pulse detection circuit 40. If no pulse is detected here, the process returns to step # 12 and the value of the offset data Db is incremented by one.

Step # when a pulse is detected in step # 14
Proceeding to 16, the offset data Db at that time (denoted as NMIN) is set in the third location of the register 34.

Next, in step # 18, the test data IP is set to the print data P50 corresponding to the 50% print density, and is given to the first location of the register 34. Then, in step # 20, the correction coefficient data Da is increased or decreased by 1 from the current value. The test data P50 is multiplied by the correction coefficient data Da increased or decreased by the multiplier 36, and the above-set offset data MMIN is added to the multiplication result Dc by the adder 38 to become the input data Di. The input data Di generated in this way
In step # 22, the PWM output Sb corresponding to is compared with the calibration pulse Sc having a 50% pulse width accurately. If the pulse widths of Sb and Sc do not match, the process returns to step # 20 and the correction coefficient data Da is increased or decreased by 1. Specifically, when the width of the output pulse Sb of the pulse generation circuit 50 is narrower than the width of the 50% calibration pulse Sc, the correction coefficient data Da is increased by 1, and when Sb> Sc, Da is decreased by 1. To do. When Sb = Sc in step # 22, the process proceeds to step # 24, the correction coefficient data Da at that time is set in the register 34, and the calibration process ends.

The above calibration process will be described as follows with reference to FIG. Initially, the relationship between the input (stage number) data of the PWM circuit and the pulse width is the line Co on the left side of the graph in the figure,
In line with this, conversion from print data to step number data is also possible.
It is assumed that Lo is used and the print data is correctly converted into the pulse width. That is, when the print data P50 corresponding to the 50% density is input, the line Lo and the line Co are exactly 50.
A pulse of% width was output from the PWM circuit. However, due to changes in environmental temperature or fluctuations in power supply voltage
It is assumed that the characteristics of the delay element of the PWM circuit have changed (the delay time has become shorter) and the relationship between the output pulse width and the input stage number data has changed as shown by line C1. At this time, if the print data P50 of 50% density is converted into the step number data by the line Lo, the output pulse width is t1, which is a value smaller than 50%, and the density as the print data cannot be obtained. (Print density becomes lighter). Further, even if the print data Po which is very small but is not 0 is given, the PWM circuit does not output a pulse for such a small number of steps data. In this case, even if non-zero print (density) data is input, no print is performed (PWM output = 0%), which is not preferable for a printer.

Therefore, in the processes up to step # 16 of the above calibration process, the test data IP is first set to 0, the offset data Db is increased, and the point where a pulse starts to be output from the PWM circuit is detected. This is equivalent to () moving the data conversion line Lo in parallel with the line L1, but this ensures that a pulse is always output for print data that is not 0, and print data that has a value close to 0. This means that the output pulse width for the can be calibrated.

However, due to the variation of the delay characteristic of the delay element, the pulse of the correct width is not yet output for the general print data. Therefore, in the processing of steps # 18 to # 24, the print data P50 of 50% density is set as the second step. Since the output of the pulse generation circuit 50 for is compared with a calibration pulse having a width of exactly 50%, the correction coefficient data Da is calibrated (the slope of the data conversion line L1 is changed) and the correct conversion line L2 is obtained. is there().

As described above, the pulse detection circuit 40 and the phase comparison circuit 42
By using both of the above, the two-step calibration process at the 0% density (white) point and the 50% density point makes it possible to obtain the correct print density over almost the entire print data, as can be seen from the line L2. Therefore, the calibrated correction coefficient data Da and the offset data Db are set in the register 34, and thereafter, the actual print data P is given to the place where the test data IP of the register 34 is placed. , Converted into a pulse having a width corresponding to the density value it represents,
Output to laser printer. In the above example, the 50% density point was set as the calibration point as a representative of the intermediate density points,
This can be 30% or 70%.

Next, a method of calibrating the correction coefficient data Da and the offset data Db by different methods while using both the pulse detection circuit 40 and the phase comparison circuit 42 will be described. Here, ii) first, the print data corresponding to the 100% density is given, and the correction coefficient data Da is set so that the pulse does not occur from the pulse generation circuit 50 to this print data.
Then, the print data corresponding to 50% density is given, and the offset data Db is calibrated by the calibration pulse so that the width of the output pulse from the pulse generation circuit 50 at this time is just 50%. An explanation will be given of a method of performing two-step calibration such as.

In this case, the microcomputer 30 performs the processing shown in FIG. 7 (b). First, in step # 30, register the value P100 corresponding to 100% print density (black) as the test data IP in the register 34.
The correction coefficient data Da in step # 32.
Is incremented or decremented by 1 from the current value. The offset data Db remains at the current value. This allows
The multiplier 36 multiplies the test data P100 by the correction coefficient data Da, and the adder 38 multiplies the multiplication result Dc by the offset data.
Db is added and given to the selector 32 as input data (stage number data) Di. In step # 34, the PWM output Sb corresponding to the input data Di created in this way has just the pulse disappeared (the maximum width pulse tMAX of (b) from the state of (d) of FIG. 4 is generated. Time point) is detected. When this point is detected, the process proceeds to step # 36, and the correction coefficient data Da at that time is set in the second location of the register 34.

Next, in step # 38, the test data IP is set to the print data P50 corresponding to the 50% print density, and is given to the first location of the register 34. Then, in step # 40, the offset data Db is incremented or decremented by 1 from the current value. The test data P50 is multiplied by the correction coefficient data Da set above by the multiplier 36, and the offset data Db increased or decreased by the adder 38 is added to the multiplication result Dc to become the input data Di. For the PWM output Sb corresponding to the input data Di generated in this way, exactly 5
A phase comparison is performed with a calibration pulse Sc having a pulse width of 0%. If the pulse widths of both Sb and Sc do not match, the process returns to step # 40 and the offset data Db is increased or decreased by 1. Specifically, when the width of the output pulse Sb of the pulse generation circuit 50 is narrower than the width of the 50% calibration pulse Sc, the offset data Db is increased by 1, and when Sb> Sc, Db is decreased by 1. . When Sb = Sc in step # 42, the process proceeds to step # 44, the offset data Db at that time is set in the register 34, and the calibration process ends.

The above calibration process will be explained as follows with reference to FIG. Similar to the case of FIG. 8 (a), the correct conversion was performed at first, but the characteristics of the delay element of the PWM circuit changed due to the change of the environmental temperature or the change of the power supply voltage, and the output for the input stage number data was output. The relationship of pulse width is a line
Suppose it changed like C1. Of the above calibration processes, in the process up to step # 36, the test data IP is first set to P100.
Then, the correction coefficient data Da is calibrated, and the point where the pulse just disappears is detected from the output Sb of the PWM circuit. This is equivalent to changing the slope of the data conversion line Lo to line L1 (), but this allows halftones to be printed for print data of 100% density (black), and print data of less than that. A situation in which black is printed for (for example, 90% density) is prevented, and black is just printed for 100% print data.

In the second-stage processing of steps # 38 to # 44, the offset data Db is obtained by accurately phase-comparing the output of the pulse generation circuit 50 for the print data P50 of 50% density with the calibration pulse having the width of 50%. It is calibrated (the data conversion line L1 is moved in parallel), and the conversion line L2 is obtained at which exactly the correct printout is made at the 50% density point (). As a result, the print data and pulse output were calibrated at two points, the maximum density (100% density) point and the intermediate density (50% density) point. Considering the linearity of both outputs, both The conversion line of is close to the ideal relation for the entire print data as shown by the line Cx.

An example of the third calibration method will be described with reference to FIGS. 7 (c) and 8 (c). Here, iii) the pulse generation circuit 50 searches for offset data at which a pulse starts to occur with respect to print data corresponding to print density 0 (white), and then gives this offset data with a negative value,
The correction coefficient data Da is calibrated so that the pulse generation circuit 50 does not generate a pulse just for the print data corresponding to the% density, and finally the print corresponding to the 50% density is printed. A method of performing three-step calibration in which data is given and the offset data Db is calibrated by the calibration pulse so that the width of the output pulse from the pulse generation circuit 50 at this time is just 50% will be described.

In this case, the microcomputer 30 performs the processing shown in FIG. 7 (c). First, 0 (corresponding to white) is given to the first location of the register 34 as the test data IP in step # 50, and the offset data Db is incremented by 1 in step # 52. As a result, the multiplier 36 multiplies the test data IP (= 0) by the correction coefficient data Da, and the adder 38 multiplies the multiplication result Dc.
(= 0) and the offset data Db are added to obtain input data (stage number data) Di, which is given to the selector 32. In step # 54, the input data Di (=
Whether a pulse is detected in the PWM output Sb corresponding to Db) is determined based on the detection result from the pulse detection circuit 40. If no pulse is detected here step #
Returning to 52, the value of the offset data Db is incremented by 1.

When a pulse is detected in step # 54, step #
The process proceeds to step 56, and the offset data Db (NMIN) at that time is stored in the memory. In FIG. 8 (c), the above processing corresponds to the step () of obtaining the minimum delay stage number NMIN at which the current PWM circuit outputs a pulse.

Next, in step # 58, the value P100 corresponding to 100% print density (black) is given to the first location of the register 34 as the test data IP, and the minimum stage number data NMIN stored in the memory is multiplied by -1 to register. Put in the third place of 34. this is,
The current conversion line Lo is translated downward by NMIN, and the line L
Equivalent to 1 (). And step # 60
The correction coefficient data Da is incremented or decremented by 1 from the current value, and the time point at which the pulse just disappears from the PWM output Sb is detected in step # 62. This corresponds to the line L2 by changing the inclination of the line L1 (). 100%
When the point at which the pulse just disappears coincides with the density print data P100, the process proceeds to step # 64, and the correction coefficient data Da at that time is set in the second location of the register 34.

Next, in step # 66, the test data IP is set to the print data P50 corresponding to the 50% print density and given to the first location of the register 34. Then, in step # 68, the offset data Db is incremented or decremented by 1 from the current value. In step # 70, the output pulse Sb at this time is accurately phase-compared with the calibration pulse Sc having a pulse width of 50%. When Sb = Sc in step # 70, the process proceeds to step # 72, the offset data Db at that time is set in the register 34, and the calibration process ends. In this last process, the conversion line L2 is translated to L3 in FIG. 8 (c), and the intermediate density point (50% in this case)
This corresponds to matching the density point) with an accurate value (). In this, the relationship between the print data and the output pulse width is accurately calibrated, especially in the intermediate density range.

Although the embodiment of FIG. 5 described above is software-controlled by the microcomputer 30, an example of performing similar PWM control in hardware by a counter or the like will be described next with reference to FIG. The basic configuration of this embodiment is the same as that of the circuit of FIG. 5, and the pulse generation circuit 50, the pulse detection circuit 40, the phase comparison circuit 42, the multiplier 36, and the adder 38 are the same as those of FIG.
In the second embodiment, an up / down (U / D) counter 58 is used instead of the microcomputer 30. Based on the result of pulse detection and phase comparison, correction coefficient data Da and offset data
The value of Db is incremented or decremented by 1 by this counter 58 to determine the optimum correction coefficient data Da and offset data Db.

In this PWM circuit, from the mode switching signal generation circuit 64, the switching signal T1 is input to the data selector 52, the switching signal T2 is input to the correction coefficient data Da register 56, and the offset data Db register 62 is input.
By applying a switching signal T3 to the detection mode switching device 60 and a switching signal T4 to the detection mode switching device 60 respectively, calibration in various modes (including (i), ii), and iii) above can be performed as in the case of the above microcomputer control. it can. Here, as an example, the procedure in the case of performing the above-mentioned i) is shown below.

In the case of this calibration mode, in order to first set the offset data Db (steps # 10 to # 16 of FIG. 7 (a) and FIG. 8 (a)), the mode switching signal generation circuit 64 causes 1) Switching signal T1 for switching the data selector 52 to the test data IP side, 2) Switching signal T2 for not outputting data from the correction coefficient data register 56 to the multiplier 36, 3) Offset data register 62 to the adder 38 Switching signals T3 for outputting data, 4) Switching signal T4 for switching the mode selector switch 60 to the pulse detection circuit 40 side, and four switching signals T1 to T4 are output.

When the pulse detection calibration mode is entered by giving such a switching signal, the test data IP is first set to 0 and given to the multiplier 36 via the register 54. The test data IP is multiplied by the correction coefficient data Da here, and is the product of the products.
Dc (= 0) is added to the offset data Db by the adder 38 to become input data Di (= Db). The output Sb of the pulse generation circuit 50 which becomes the input data Di is checked by the pulse detection circuit 40 whether or not a pulse is generated therein.
When no pulse is generated, the output value of the U / D counter 58 is incremented by 1. As a result, the input data Di also increases by 1, and the pulse generation circuit 50 generates an output corresponding to the increased input data Di. The value of the U / D counter 58 at the time when the pulse starts to be generated is set in the register 62, and the offset data Db is calibrated by this.

At the next stage, the mode switching signal generation circuit 64 outputs the data 2) ′ from the correction coefficient data register 56 to the multiplier 36, the switching signal T2 and 3) ′ the offset data register 62 to the adder 38. Is sent to the registers 56 and 62, respectively. A switching signal T3 for not outputting the 4) ′ mode switching switch 60 and a switching signal T4 for switching the mode switching switch 60 to the phase comparison circuit 42 side are sent. T1 remains the same. In this state, when the 50% density print data P50 as test data IP is given to the multiplier 36 via the register 54, P50 is multiplied by the current correction coefficient data Da, and the offset data Db set above is added by the adder 38. Input data Di is added. When the pulse Sb corresponding to this input data Di is output from the pulse generation circuit 50, this pulse Sb is compared in phase with the calibration pulse Sc having a width of 50% accurately in the phase comparison circuit 42. When the two widths are different, the counter value of the U / D counter 58 is increased or decreased by 1, and the input data Di is increased or decreased. When Sb = Sc, U / D counter 5
8 stops, and the value at that time is set in the register 56 as the correction coefficient data Da.

After calibrating the offset data Db and the correction coefficient data Da in this way, the data selector 52 is switched and the normal print data P is put in the data register 54, whereby the print data P is corrected by the multiplier 36. The offset data Db, which is multiplied by the data Da and calibrated by the adder 38, is added to create the correct stage number data Di.

As described above, the Hano circuit shown in FIG.
The relationship between the print data and the output pulse width can be calibrated in exactly the same procedure as the circuit using the microcomputer 30 of FIG.

As described above, according to the present invention, the relationship between the input data and the output pulse width changes (or is unknown).
It is possible to always generate a pulse with a desired width even by using a pulse generator. Therefore, when a pulse generator with individual differences is incorporated in an applied device, or when the pulse width of a PWM pulse generator incorporated in the device is not stable due to factors such as ambient temperature and power supply voltage, the present invention It is possible to use a data generator related to the above, and by doing this, it is not necessary to change the source data (print data, etc.) and to perform PWM control that can always obtain a stable pulse width output for the source data. You can Further, even if the pulse generator has a characteristic that it cannot generate a pulse having a width less than a predetermined minimum width or more than a maximum width, such characteristics are compensated for and the most preferable of the original data and the output pulse width is obtained. You can set up relationships.

[Brief description of drawings]

FIG. 1 is a diagram corresponding to the claims of the present invention. FIG. 2 is a graph showing the relationship between the stage number data and the print data of the pulse generator using the delay element (right side) and the relation between the input stage number data and the output pulse width (left side). FIG. 3 is a graph showing the difference between the input stage number data and the output pulse width of the pulse generator using the delay element, particularly when the input stage number data is very small and very large. FIGS. 4 (a) to 4 (d) are explanatory views showing the state of the pulse generated from the pulse generator using the delay element. FIG. 5 is a block diagram showing the configuration of the PWM pulse generation circuit according to the first embodiment of the present invention. FIGS. 6A and 6B are circuit diagrams showing specific configuration examples of the pulse detection circuit and the phase comparison circuit. 7 (a), (b), (c)
4 is a flowchart of various calibration processes performed by the microcomputer of the first embodiment. FIGS. 8A, 8B, and 8C are explanatory views for explaining each calibration process. FIG. 9 is a block diagram showing the configuration of the PWM pulse generation circuit according to the second embodiment of the present invention.

Claims (1)

[Claims] 1. An apparatus for generating input data for a pulse generator from source data corresponding to a target pulse width in order to generate an output pulse having a target pulse width from a pulse generator, wherein the source data has a predetermined conversion relation. A conversion means for converting the input data of the pulse generator based on the above, a conversion relation changing means for changing the predetermined conversion relation, and a pulse detection means for detecting whether or not a pulse exists in the output of the pulse generator, First conversion relationship holding means for holding the conversion relationship between the original data and the input data at the time when the pulse starts to be generated at the output of the pulse generator, and the calibration pulse having the output pulse of the pulse generator having a predetermined pulse width. And the calibration source data corresponding to the pulse width of the calibration pulse at the time when the widths of both pulses match in the phase comparison means. Pulse generating dexterity data generating device, characterized in that it comprises a second conversion relationship holding means for holding a conversion relationship between the data.