JPH0814831B2 - Code reader - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention scans and reads a code (for example, a bar code display) displayed on a medium with a photoelectric converter or the like, and calculates the information indicated by the code. The present invention relates to a code reading device that decodes and outputs a signal that can be processed by, and particularly relates to a code reading device that suppresses the output of meaningless error signals and improves comfort during use.

[Conventional technology]

A code reading device photoelectrically converts a code displayed in various code systems on a medium such as a form or article surface with a scanner such as an optical reading device and decodes it into a signal that can be processed by a computer such as a microprocessor. It is what is output. The codes to be displayed include special display codes such as bar codes and carla codes and general characters, and a certain standard is given to the display method for decoding these. This standard defines the display interval and display range. For example, for barcodes, Japanese Industrial Standards [JIS X 0502] (April 30, 1987 first
Issued) Pages 3 to 9 and American
Some are specified on page 8 of the National Standard [ANSI: MH10.8M-1983].

FIG. 2 is an explanatory view of a bar code code example as an example of a display code and its read waveform. (A) is a displayed bar code, S is a start code (or stop code), and C1 is a ground. Toki Lacta code, C2 is the second character code. In addition, (b) is a read waveform obtained by scanning the barcode of (a) in the direction of the arrow, and here, the bar shown in black in (a) (there is a narrow bar and a wide bar) is at a high level (“H”). For white spaces (there are narrow spaces and wide spaces), the read waveform is shown as low level (“L”).

When reading such a code, the photoelectric conversion section (scanner) is scanned in the direction of the fast charactor C1 from the position immediately before the start code in FIG.
At this time, the start code S determines whether or not the code reading operation has started normally. If it is determined that the start is not normal, the device is reset, and if it is determined that the start is normal, decoding is performed according to the count value of the pulse such as the clock corresponding to the bar and space (“H” and “L”) of the code. Done. When the reading of the code is completed and the stop code is confirmed, read data is output from the decoder.

There is also a system in which each character is sequentially decoded and output.

FIG. 3 is a block diagram for explaining the circuit configuration of a conventional code reading device. 101 is a photoelectric conversion unit, 104 is a counter unit, 106 is a stop determination unit, 107 is a decoder unit, and 109 is a start determination unit. .

In FIG. 2, the photoelectric conversion unit 101 scans and reads a barcode, converts it into a binary signal of "H" and "L", and outputs it. The counter unit 104 counts the “H” and “L” times from the photoelectric conversion unit 101 with the clock signal CL, and outputs the count. The count is (i) the value being counted (count value). To output sequentially, (ii) "H" and "L"
A method of outputting the count value each time the counting of
i) Store the “H” and “L” count values once,
There is a method of outputting after completion of counting the barcode, and the like.

Also, the start determination unit 109 makes a start determination based on the count value from the counter unit 104, and resets the operation of the counter unit 104 when a start error is determined. The stop determination unit 106 makes a stop determination based on the count value output from the counter unit 104. When the stop determination is made, the decoder unit 107 decodes the count value output from the counter unit 104. The decoder unit 107 decodes the count value from the counter unit 104 and outputs the result as read data.

The photoelectric conversion unit 101 is provided with a photoelectric converter (not shown), a binarization circuit, a first space detector, a first edge detector, a second edge detector and a first bar / space determination circuit. The electrical signal read by scanning the barcode is scanned by the binarization circuit to "H".
It is converted into a binary signal of "L" and output. Then, when the fast space detector detects a space, the change from the first space of this electric signal to the bar (“L” → “H”)
Or the change from bar to space (“H” → “L”) is the first
The change from the bar to space (“H” → “L”) or the change from space to bar (“L” →) detected by the edge detector and following the change detected by this first edge detector.
"H") is detected by the second edge detector.

The counter unit 104 is reset by the first edge detector and the second edge detector to count the respective "H" and "L" times, and this count value is a preset overflow value. If it exceeds (for example, if the scanning is stopped midway), a reset signal is issued to reset the device. When the count values of “H” and “L” of the electric signal do not exceed the overflow value, the count value of these bars or spaces is sent to the decoder unit 107.

Further, the start determination unit 109 compares at least the first bar and the count value of the space counted by the counter unit 104, and the count value of the space or bar is equal to or less than a certain constant multiple of the count value of the immediately preceding space or bar. If there is, it is determined to start. In this case, the fast bar / space determination unit counts the sum of the bar and the space after detecting the first bar, and when the number reaches a predetermined value, the start determination unit 109 makes a start determination.

When it is determined by the start determination unit 109 that the count value of the space or bar exceeds a certain constant multiple of the count value of the immediately preceding space or bar, the start determination is not performed and the reset signal is issued, and the device is To be reset.

In addition, the stop determination unit 106 determines that the count value of the bar or space currently being read is a stop when the count value of the immediately preceding space or bar becomes a certain constant multiple or more, and the stop determination unit 106 performs the stop determination. Therefore, the decoding operation of the decoder unit 107 is controlled.

The decoder unit 107 decodes the meaning of the code of the bar code based on the count value of the clock CL corresponding to the width of the bar or space of the bar code that has been read, and as shown in FIG. Image converter 23,
It is composed of a bit image memory 24, a character converter 25 and an output circuit 26.

The bit image converter 23 operates by the detection output of the second edge detector from the signal line i, converts the count value input from the signal line t into a bit image, and stores it in the bit image memory 24 via the signal line w. Remember. If an error occurs during this conversion, a reset signal is output. The bit image memory 24 (i) stores the bit image from the signal line w, and (ii) sends the bit image stored by the signal input from the signal line v to the character converter 25 via the signal line x. Yes, (iii) When the reset signal is input, the stored bit image is cleared and each operation is performed.

The charactor converter 25 starts its operation by the signal input from the signal line v, converts the bit image coming from the bit image memory 24 into charactor, and supplies it to the output circuit 26 via the signal line y. If an error occurs during character conversion, a reset signal is output.

Then, the output circuit 26 sends the charactor signal from the signal line y to the output line z and supplies it to the display means (not shown).
Upon completion of this transmission, the reset signal is output.

FIG. 4 is a circuit diagram showing the structure of the charactor converter 25, in which 253 is a start code bit image memory and 2 is a start code bit image memory.
54 is a start code bit image comparator, 255 is a stop code bit image memory, 256 is a stop code bit image comparator, 257 is a character code bit image memory, 258 is a character code bit image comparator, and 259 is a character code. Lactor code memory, 263 is a buzzer control circuit, 252 is a switch, 250, 251, 265, 42 are OR circuits, 2
4 is a bit image memory.

As shown in the figure, the bit image converter 23 of FIG.
The bit image memory 24 connected to the signal line w is connected to the charactor converter 25 to the switch 252 by the signal line x.
One of the input terminals of the start code image comparator 254, the stop code bit image comparator 256 and the charactor code bit image comparator 258 is connected to the switch 252.
The signal lines are connected by signal lines and signal lines, respectively.

The other input terminals of the start code bit image comparator 254, the stop code bit image comparator 256 and the charactor code bit image comparator 258 are respectively connected to the start code bit image memory 25.
3. The stop code bit image memory 255 and the character code bit image memory 257 are connected by a signal line S, a signal line T and a signal line. One output terminal of the start code bit image comparator 254 is connected to the switch 252 and one input terminal of the OR circuit 251 by a signal line, and the charactor code bit image comparator 25 is connected.
One of the output terminals of 8 is connected to the above-mentioned OR circuit 251 by a signal line
Is connected to the other input terminal of.

The output terminal of the OR circuit 251 is connected by a signal line to one input terminal of the OR circuit 42, and the other input terminal of the OR circuit 42 has the output terminal of the stop determination unit 106 of FIG. It is connected by a signal line v. The output terminal of the OR circuit 42 is connected to the bit image memory 24.

The other output terminal of the start code bit image comparator 254 is connected to one input terminal of the OR circuit 250 and one input terminal of the OR circuit 265 by a signal line. Similarly, the other output terminal of the charactor code bit image comparator 258 is connected to the other input terminal of the OR circuit 250 and the other input terminal of the OR circuit 265 by a signal line D.

Further, the output terminal of the stop code bit image comparator 256 is connected to the output circuit 26 of FIG. 3 by a signal line, and one of the output terminals of the character code bit image comparator 258 is connected to the signal line Is connected to the input terminal of the charactor code memory 259, and the output terminal of the charactor code memory 259 is connected to the output circuit 26 of FIG. 2 by the signal line y. The output terminal of the OR circuit 265 is connected to the buzzer control circuit 263 by a signal line marker.

In the conventional code reading apparatus having such a configuration, when the stop determination unit makes the stop determination and outputs the stop determination signal, the stop determination signal is sent from the signal line v to the OR circuit.
It is input to the bit image memory 24 via 42, and the decoding operation of the decoder unit 107 is controlled.

First, the bit image for the first character is read from the bit image memory 24, and the start code bit image comparator 254 is sent from the switch 252 through the signal line.
Is input to Then, the bit image of the start code previously stored in the start code bit image memory 253 is compared with the bit image input from the signal line set. If they do not match, the reset signal is sent to the signal line switch. This reset signal is output and the OR circuit 25
The device is reset by being output via 0, and this reset signal is input to the buzzer control circuit 263 as an error signal via the OR circuit 265, and a buzzer alarm is issued.

When the comparisons in the start code bit image comparator 254 match, a match signal is output to the signal line, and the switch 252 is switched by this match signal to connect the signal line x and the signal line. At the same time, the match signal is OR circuit 251, O
It is input to the bit image memory 24 via the R circuit 42,
Bit images for the next character are read from the bit image memory 24 and input to the stop code bit image comparator 256 and the character code bit image comparator 258 via the switch 252.

The charactor code bit image comparator 258 is configured to have, for example, a charactor comparison circuit represented by a bar code, and a bit image corresponding to the charactor code stored in the charactor code bit image memory 257 in advance ( The character image represented by the bar code is stored) and the bit image input from the signal line are sequentially compared to confirm whether or not they match. As a result of this comparison, if the bit image stored in the charactor code bit image memory 257 matches the bit image input from the signal line, a signal is sent to the signal line and the matched charactor code. Character code corresponding to bit image,
It is read from the character code memory 259 and input to the output circuit 26 of FIG. 2 via the signal line y.

At this time, the character code bit image comparator
A signal is also sent from the signal line 258 to the signal line NU, and this signal is input to the bit image memory 24 via the OR circuit 251 and the OR circuit 42, and the bit image for the next character is read from the bit image memory 24.

If the bit image matching the bit image input from the signal line is not found in the bit images stored in the charactor code bit image memory 257 by comparison with the charactor code bit image comparator 258. Outputs an error signal to the signal line D. This error signal is input to the buzzer control circuit 263 via the OR circuit 265, an alarm is issued by the buzzer, and this error signal is output as a reset signal via the OR circuit 250 to reset the device. Done.

In this manner, the bit images for each character of the charactor code are compared with the bit images stored in the charactor code bit image memory 257 one after another. The bit image input from the signal line to the stop code bit image comparator 256 is
When it matches the stop code bit image stored in advance in the stop code bit image memory 255, it is confirmed that the reading of the code is completed, and the stop code bit image comparator 256 outputs an end signal to the signal line. This end signal is input to the output circuit 26 of FIG. 2, and the read data of the code is output from the output circuit 26,
It is supplied to display means (not shown).

[Problems to be Solved by the Invention]

In the above prior art, the bit image input from the signal line coincides with any bit image stored in advance in the charactor code bit image memory 257 by comparison in the charactor code bit image comparator 258. If it cannot be decoded, an error signal is immediately output, and the buzzer control circuit 263 issues an alarm by the buzzer.

However, in this type of code reading device, erroneous input may occur when the circuit is unstable immediately after the power is turned on.
A character is printed near a code such as a bar code to be read, and a binary signal may be erroneously input from the character during the reading operation.

The error signal generated in response to such an erroneous input is essentially meaningless, and in this type of code reading device, the code such as a bar code which is to be read due to adhesion of dirt or change in scanning speed is used. Only if no reading is possible should an error signal be output and an alarm issued.

The present invention has been made based on the current state of the above-described code reading device, and its purpose is to output only an error signal related to the reading of a code such as a target barcode, and to issue a meaningless error signal. An object of the present invention is to provide a code reading device having a comfortable operability without any trouble.

[Means for solving the problem]

In order to achieve the above object, the present invention provides a photoelectric conversion unit for reading a code displayed on a medium and a counter unit for counting a time corresponding to a change in a binary signal output from the photoelectric conversion unit with a clock signal. A start determination section for making a read start determination based on the count value output from the counter section; a stop determination section for making a read stop determination based on the count value output from the counter section; And a decoder unit for decoding the count value output from the unit, the start determination unit has reset means for resetting the counter unit at the time of a start determination error, and the stop determination unit outputs the decoder unit at the time of stop determination. The decoder section has an operating means for activating, and the decoder section is connected to Only after Kutomo one Kiyarakutakodo has been decoded, characterized by being configured to include an output means does not output an error signal indicating a decoding error.

[Action]

The output means provided in the decoder section outputs an error signal indicating a decoding error unless after decoding at least one character code adjacent to the start code (stop code when reverse reading is performed). Since it does not work, even if there is an erroneous input due to circuit instability immediately after turning on the power or an erroneous input based on reading characters other than barcodes, an error signal will not be output and an alarm will be output. Is never emitted. On the other hand, if a decoding error occurs after the regular decoding, an error signal is output at that time.When reading the barcode, the scan speed changes and dirt adheres to the space. An error signal is output and an alarm is issued only when an error related to the original reading of a barcode occurs.

〔Example〕

 An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of a charactor converter according to an embodiment of the present invention, and the same reference numerals as those in FIG. 4 correspond to the same parts.

In the figure, 253 is a start code bit image memory, 254 is a start code bit image comparator, 2
55 is a stop code bit image memory, 256 is a stop code bit image comparator, 257 is a charactor code bit image memory, 258 is a charactor code bit image comparator, 259 is a charactor code memory, 2
Reference numeral 60 is a counter circuit, 261 is a constant memory, 262 is a charactor number comparator, and 263 is a buzzer control circuit. Also 42,250,
251 is an OR circuit, 264 is an AND circuit, 252 is a switch, and 24 is a bit image memory.

In the embodiment shown in the figure, a counter circuit 260, a constant memory 261 and a charactor number comparator 262 are added to the charactor converter of the conventional code reading apparatus described in FIG. It is connected to the input terminal of the circuit 260, and the output terminal of the counter circuit 260 is connected to one input terminal of the charactor number comparator 262 by a signal line. The output terminal of the constant memory 261 is connected to the other input terminal of the charactor number comparator 262 by a signal line, and the output terminal of the charactor number comparator 262 is
It is connected to one of the input terminals of the AND circuit 264 by a signal line.

Note that, in FIG. 1, unlike the charactor converter shown in FIG. 4, the signal line H is not connected to the input terminal of the OR circuit 265.

The configuration of the other parts in the embodiment of the present invention is the same as that of the conventional code reading apparatus already described with reference to FIGS. 3 and 4.

In such a configuration, the OR circuit 42 constitutes the operating means, and the counter circuit 260, the constant memory 261, the charactor number comparator 262 and the AND circuit 264 constitute the output means.

 The operation of the above configuration will be described below.

The stop determination signal from the stop determination unit is the signal line v
When input to the bit image memory 24 via the OR circuit 42, the bit image for the first character is read from the bit image memory 24. This first bit image is the start code bit image comparator 25 as in the case of the conventional code reader already described.
Input to 4 and start code bit image memory 253
Is compared with the bit image of the start code stored in advance.

When the start code is confirmed by this comparison, a match signal is output to the signal line switch, and the match signal connects the signal line x and the signal line t in the switch 252, and the OR circuit 251, By the coincidence signal given to the bit image memory 24 through the OR circuit 42, the bit image for the next charactor is read from the bit image memory 24,
It is input to the stop code bit image comparator 256 and the character code bit image comparator 258. If the start code is not confirmed by the comparison by the start code bit image comparator 254, a reset signal is output from the signal line via the OR circuit 250.

When the start code is confirmed by the start code bit image comparator 254, the charactor code bit image memory is compared with the bit image input to the charactor code bit image comparator 258 as described above.
A comparison is made with the bit image corresponding to the charactor code stored in 257. If the bit images do not match in this comparison, the OR circuit 250
A reset signal is issued via.

When the comparison by the charactor code bit image comparator 258 confirms that the bit images match, a signal is output to the signal line, and the charactor code represented by the bar code is set in advance by this signal. The corresponding charactor code is read from the charactor code memory 259, output to the signal line y, and output to an output circuit (not shown).

At the same time, the counter circuit 260 is incremented by the signal on the signal line NA, and the count value is input to the charactor number comparator 262 from the signal line N. This charactor number comparator 262
Outputs a signal to the signal line NO when the count value from the signal line N reaches a constant (for example, 2) preset in the constant memory 261. For example, if the constant memory 261 is set to 2, the character code bit image comparator 258
After the two charactor codes are read by, the error signal is output from the AND circuit 264 by the signal output from the charactor code bit image comparator 258 to the signal line D, and the buzzer control circuit 263 outputs the error signal. A buzzer alerts.

Therefore, for example, if an erroneous input occurs due to an unstable state of the circuit immediately after the power is turned on, or an erroneous input from a character other than the code such as a bar code to be read, the buzzer does not warn and the dirt is attached. The alarm is issued only when it is impossible to read the target code, such as the change in skimming speed. Therefore, it is possible to comfortably and efficiently perform the code reading operation without being bothered by a meaningless alarm.

The operation of the other parts, such as the confirmation of the stop code by the stop code bit image comparator 256 and the output of the code read data from the output circuit to the display means based on this confirmation, has already been explained. Is the same as the case of.

In the above embodiment, the charactor code bit image comparator has a construction in which an error signal is output after reading two charactor codes from the codes, but the present invention is embodied. The present invention is not limited to the example, and for example, when one character code is read, an error signal after that can be output.

Further, although the embodiment has been described in which the decoding operation is performed in the order of the start code, the character code and the stop code, the present invention is also capable of reverse scanning, and the decoding operation is performed in the order of the stop code, the character code and the start code. It is also possible to have a configuration that allows

〔The invention's effect〕

As described in detail above, according to the present invention, an error signal is not output due to an unstable state of the circuit immediately after the power is turned on or an erroneous input due to reading of characters other than the code, and dirt is attached or a change in scanning speed occurs. The error signal is output only for the situation where the reading of the code becomes impossible. Therefore, it is possible to efficiently and comfortably read the code without being bothered by a meaningless alarm.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of the essential parts of an embodiment of the present invention, FIG. 2 is an example of a bar code display as an example of a code and its read waveform diagram, and FIG. 3 is a configuration of a conventional code reading device. FIG. 4 is a block diagram shown in FIG. 4, and FIG. 4 is a block diagram showing the configuration of the main part of FIG. 24 …… bit image memory, 42,250,251 …… OR circuit,
264 …… AND circuit, 252 …… Switcher, 253 …… Start code bit image memory, 254 …… Start code bit image comparator, 255 …… Stop code bit image memory, 256 …… Stop code bit image comparison 257 …… Character code bit image memory, 258 …… Character code bit image comparator, 2
59 …… Character code memory, 260 …… Counter circuit, 261 …… Constant memory, 262 …… Character number comparator.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Koji Nakase 1-7 Yukiya Otsuka-cho, Ota-ku, Tokyo Alps Electric Co., Ltd. (56) Reference JP-A-58-3073 (JP, A) 62-53750 (JP, U) Actual development Sho 55-96427 (JP, U)

Claims (1)

[Claims] 1. A photoelectric conversion unit that reads a code displayed on a medium, a counter unit that counts a time corresponding to a change in a binary signal output from the photoelectric conversion unit with a clock signal, and a counter unit from the counter unit. A start determination unit that makes a read start determination based on the output count value, a stop determination unit that makes a read stop determination based on the count value output from the counter unit, and a count output from the counter unit. The start determination unit has a reset unit that resets the counter unit when a start determination error occurs, and the stop determination unit has an operation unit that operates the decoder unit when a stop determination is made. However, the decoder section
A code reading device comprising an output means for outputting an error signal indicating a decoding error only after at least one character code adjacent to a start code or a stop code has been decoded.